Transactional memory

Industry

CPC
G06F9/467

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

Current Industry

G06F9/467Transactional memory

Industries

Patents Grantslast 30 patents

Information Patent Grant
Parallelized scrubbing transactions
- Patent number 12,147,301
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global coherence operations
- Patent number 12,141,601
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherence shared state suppression
- Patent number 12,135,646
- Issue date Nov 5, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for concurrent logging and event capture
- Patent number 12,072,818
- Issue date Aug 27, 2024
- Infineon Technologies AG
- Neal Manson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tag update bus for updated coherence state
- Patent number 12,056,051
- Issue date Aug 6, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-random way selection
- Patent number 12,045,644
- Issue date Jul 23, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction exchange platform with classification microservice to g...
- Patent number 12,045,242
- Issue date Jul 23, 2024
- CAPITAL ONE SERVICES, LLC
- Nishant Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level cache security
- Patent number 12,038,840
- Issue date Jul 16, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Working memory management
- Patent number 12,026,540
- Issue date Jul 2, 2024
- KYNDRYL, INC.
- Brian M. O'Connell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Persistent transactional memory metadata-based buffer caches
- Patent number 12,026,513
- Issue date Jul 2, 2024
- Oracle International Corporation
- Unmesh Rathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling non-correctable errors
- Patent number 12,019,514
- Issue date Jun 25, 2024
- Texas Instruments Incorporated
- David Matthew Thompson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of executing programmable atomic unit resources within a mul...
- Patent number 12,020,062
- Issue date Jun 25, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline arbitration
- Patent number 12,014,206
- Issue date Jun 18, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable routing in a multi-chip system
- Patent number 11,960,392
- Issue date Apr 16, 2024
- Amazon Technologies, Inc.
- Guy Nakibly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer prewarming
- Patent number 11,954,044
- Issue date Apr 9, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal processor, processor system and method for transferring data
- Patent number 11,954,052
- Issue date Apr 9, 2024
- ams AG
- Johannes Wolkerstorfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive hardware transactional memory based concurrency control
- Patent number 11,947,994
- Issue date Apr 2, 2024
- SAP SE
- Thomas Legler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
End-to-end data protection for far memory data transfer from host t...
- Patent number 11,947,995
- Issue date Apr 2, 2024
- Intel Corporation
- Kuan Hua Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling memory requests
- Patent number 11,941,430
- Issue date Mar 26, 2024
- Imagination Technologies Limited
- Mark Landers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Persistent multi-word compare-and-swap
- Patent number 11,941,429
- Issue date Mar 26, 2024
- Oracle International Corporation
- Virendra J. Marathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing erasure coding with persistent memory
- Patent number 11,928,497
- Issue date Mar 12, 2024
- International Business Machines Corporation
- Daniel Waddington
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller with caching and non-caching modes
- Patent number 11,907,753
- Issue date Feb 20, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with separate transaction table for real time tra...
- Patent number 11,900,146
- Issue date Feb 13, 2024
- Apple Inc.
- Ilya Granovsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual channel support using write table
- Patent number 11,893,413
- Issue date Feb 6, 2024
- Apple Inc.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Remap address space controller
- Patent number 11,886,349
- Issue date Jan 30, 2024
- NXP USA, INC.
- Roderick Lee Dorris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable exactly-once data processing using transactional streaming...
- Patent number 11,880,290
- Issue date Jan 23, 2024
- Google LLC
- Pavan Edara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to efficiently rinse memory-side cache of dirty data
- Patent number 11,874,774
- Issue date Jan 16, 2024
- Advanced Micro Devices, Inc.
- Ravindra N. Bhargava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient loop execution for a multi-threaded, self-scheduling reco...
- Patent number 11,868,163
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computational graph critical sections
- Patent number 11,868,820
- Issue date Jan 9, 2024
- Google LLC
- Eugene Brevdo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for enhancing content collaboration by conflict d...
- Patent number 11,868,800
- Issue date Jan 9, 2024
- EGNYTE, INC.
- Upendra Singh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PSEUDO-RANDOM WAY SELECTION
- Publication number 20240345868
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG UPDATE BUS FOR UPDATED COHERENCE STATE
- Publication number 20240345956
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION SCHEDULING FOR A USER DATA CACHE BY ASSESSING UPDATE CR...
- Publication number 20240345867
- Publication date Oct 17, 2024
- BillGO, Inc.
- Stephen Ryan Gordon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transaction Exchange Platform with Classification Microservice to G...
- Publication number 20240338372
- Publication date Oct 10, 2024
- Capital One Services, LLC
- Nishant Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTIONS IN PROCESSING ENVIRONMENTS
- Publication number 20240320030
- Publication date Sep 26, 2024
- International Business Machines Corporation
- Andrew Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL CACHE SECURITY
- Publication number 20240320154
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING NON-CORRECTABLE ERRORS
- Publication number 20240311235
- Publication date Sep 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- David Matthew THOMPSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ENHANCING CONTENT COLLABORATION BY CONFLICT D...
- Publication number 20240311177
- Publication date Sep 19, 2024
- Egnyte, Inc.
- Upendra Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE ARBITRATION
- Publication number 20240281278
- Publication date Aug 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER PREWARMING
- Publication number 20240184715
- Publication date Jun 6, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Brad WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPLICATION PROGRAMMING INTERFACE TO PERFORM DELAYED MEMORY TRANSAC...
- Publication number 20240168795
- Publication date May 23, 2024
- NVIDIA Corporation
- Harold Carter Edwards
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPLICATION PROGRAMMING INTERFACE TO STORE MEMORY TRANSACTION INFOR...
- Publication number 20240168794
- Publication date May 23, 2024
- NVIDIA Corporation
- Harold Carter Edwards
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONAL GRAPH CRITICAL SECTIONS
- Publication number 20240160497
- Publication date May 16, 2024
- Google LLC
- Eugene Brevdo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER WITH CACHING AND NON-CACHING MODES
- Publication number 20240152385
- Publication date May 9, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE EXACTLY-ONCE DATA PROCESSING USING TRANSACTIONAL STREAMING...
- Publication number 20240143469
- Publication date May 2, 2024
- Google LLC
- Pavan Edara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE-HARDWARE MEMORY MANAGEMENT MODES
- Publication number 20240126703
- Publication date Apr 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SIZE CHANGE
- Publication number 20240095169
- Publication date Mar 21, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PERIPHERAL AND/OR MULTI-FUNCTION EXPORT
- Publication number 20240061768
- Publication date Feb 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Sriramakrishnan Govindarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE FOR DATA PROCESSING ARRAY CONTROL
- Publication number 20240045692
- Publication date Feb 8, 2024
- Xilinx, Inc.
- Xiao Teng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COHERENCE SIGNALING PROTOCOL
- Publication number 20240045803
- Publication date Feb 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BANDWIDTH ALLOCATION IN MULTI-ENTITY SYSTEMS
- Publication number 20240028400
- Publication date Jan 25, 2024
- NVIDIA Corporation
- Gaspar Mora Porta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Safely Subscribing to Locks Using Hardware...
- Publication number 20240028424
- Publication date Jan 25, 2024
- Oracle International Corporation
- David Dice
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION EXCHANGE PLATFORM WITH CLASSIFICATION MICROSERVICE TO G...
- Publication number 20240012820
- Publication date Jan 11, 2024
- Capital One Services, LLC
- Nishant Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADOW CACHES FOR LEVEL 2 CACHE CONTROLLER
- Publication number 20240004793
- Publication date Jan 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MERGING DATA FOR WRITE ALLOCATE
- Publication number 20240004694
- Publication date Jan 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MULTIMODAL COMPUTER ADDRESS SPACE PROVISIONING
- Publication number 20230418737
- Publication date Dec 28, 2023
- UNIFABRIX LTD.
- Ronen Aharon HYATT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL COHERENCE OPERATIONS
- Publication number 20230409376
- Publication date Dec 21, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTING CODES FOR MULTI-MASTER MEMORY CONTROLLER
- Publication number 20230393933
- Publication date Dec 7, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR CONCURRENT LOGGING AND EVENT CAPTURE
- Publication number 20230350820
- Publication date Nov 2, 2023
- Neal Manson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COHERENCE FOR MEMORY CONTROLLER
- Publication number 20230333982
- Publication date Oct 19, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING

Transactional memory

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Parallelized scrubbing transactions

Global coherence operations

Cache coherence shared state suppression

Systems and methods for concurrent logging and event capture

Tag update bus for updated coherence state

Pseudo-random way selection

Transaction exchange platform with classification microservice to g...

Multi-level cache security

Working memory management

Persistent transactional memory metadata-based buffer caches

Handling non-correctable errors

Method of executing programmable atomic unit resources within a mul...

Pipeline arbitration

Configurable routing in a multi-chip system

Translation lookaside buffer prewarming

Signal processor, processor system and method for transferring data

Adaptive hardware transactional memory based concurrency control

End-to-end data protection for far memory data transfer from host t...

Handling memory requests

Persistent multi-word compare-and-swap

Implementing erasure coding with persistent memory

Controller with caching and non-caching modes

Memory controller with separate transaction table for real time tra...

Virtual channel support using write table

Remap address space controller

Scalable exactly-once data processing using transactional streaming...

Mechanism to efficiently rinse memory-side cache of dirty data

Efficient loop execution for a multi-threaded, self-scheduling reco...

Computational graph critical sections

System and method for enhancing content collaboration by conflict d...

Patents Applicationslast 30 patents

PSEUDO-RANDOM WAY SELECTION

TAG UPDATE BUS FOR UPDATED COHERENCE STATE

TRANSACTION SCHEDULING FOR A USER DATA CACHE BY ASSESSING UPDATE CR...

Transaction Exchange Platform with Classification Microservice to G...

TRANSACTIONS IN PROCESSING ENVIRONMENTS

MULTI-LEVEL CACHE SECURITY

HANDLING NON-CORRECTABLE ERRORS

SYSTEM AND METHOD FOR ENHANCING CONTENT COLLABORATION BY CONFLICT D...

PIPELINE ARBITRATION

TRANSLATION LOOKASIDE BUFFER PREWARMING

APPLICATION PROGRAMMING INTERFACE TO PERFORM DELAYED MEMORY TRANSAC...

APPLICATION PROGRAMMING INTERFACE TO STORE MEMORY TRANSACTION INFOR...

COMPUTATIONAL GRAPH CRITICAL SECTIONS

CONTROLLER WITH CACHING AND NON-CACHING MODES

SCALABLE EXACTLY-ONCE DATA PROCESSING USING TRANSACTIONAL STREAMING...

SOFTWARE-HARDWARE MEMORY MANAGEMENT MODES

CACHE SIZE CHANGE

MULTI-PERIPHERAL AND/OR MULTI-FUNCTION EXPORT

INSTRUCTION SET ARCHITECTURE FOR DATA PROCESSING ARRAY CONTROL

HARDWARE COHERENCE SIGNALING PROTOCOL

MEMORY BANDWIDTH ALLOCATION IN MULTI-ENTITY SYSTEMS

Systems and Methods for Safely Subscribing to Locks Using Hardware...

TRANSACTION EXCHANGE PLATFORM WITH CLASSIFICATION MICROSERVICE TO G...

SHADOW CACHES FOR LEVEL 2 CACHE CONTROLLER

MERGING DATA FOR WRITE ALLOCATE

SYSTEM AND METHOD FOR MULTIMODAL COMPUTER ADDRESS SPACE PROVISIONING

GLOBAL COHERENCE OPERATIONS

ERROR CORRECTING CODES FOR MULTI-MASTER MEMORY CONTROLLER

SYSTEMS AND METHODS FOR CONCURRENT LOGGING AND EVENT CAPTURE

HARDWARE COHERENCE FOR MEMORY CONTROLLER