using a reference signal

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HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE

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H03K2005/00104using a reference signal

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for precision phase skew generation
- Patent number 11,664,793
- Issue date May 30, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mao-Hsuan Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electronic circuit and method for clock skew-calibration
- Patent number 11,256,286
- Issue date Feb 22, 2022
- Samsung Electronics Co., Ltd.
- Sethu Mathavan Meikanda Muthu Ayyanar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Demodulation methods and devices for frequency-modulated (FM) signals
- Patent number 11,251,783
- Issue date Feb 15, 2022
- Raytheon Company
- Benjamin P. Dolgin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for precision phase skew generation
- Patent number 11,228,304
- Issue date Jan 18, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mao-Hsuan Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fixed-width pulse generator
- Patent number 10,911,035
- Issue date Feb 2, 2021
- NXP USA, INC.
- Rohit Kumar Sinha
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for precision phase skew generation
- Patent number 10,848,138
- Issue date Nov 24, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Mao-Hsuan Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Control system and pulse output device
- Patent number 10,291,233
- Issue date May 14, 2019
- Omron Corporation
- Yoshimi Niwa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Glitch detection in input/output bus
- Patent number 10,277,213
- Issue date Apr 30, 2019
- NXP USA, INC.
- Paul Kimelman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
External clock based clock generator
- Patent number 10,254,783
- Issue date Apr 9, 2019
- Western Digital Technologies, Inc.
- Nitin Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of speeding up output alignment in a digital phase locked loop
- Patent number 10,069,503
- Issue date Sep 4, 2018
- Microsemi Semiconductor ULC
- Changhui Cathy Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hardware delay compensation in digital phase locked loop
- Patent number 9,667,237
- Issue date May 30, 2017
- Microsemi Semiconductor ULC
- Qu Gary Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Distributing multiplexing logic to remove multiplexor latency on th...
- Patent number 9,319,040
- Issue date Apr 19, 2016
- International Business Machines Corporation
- Huu N. Dinh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device including flip-flop and logic circuit
- Patent number 9,059,689
- Issue date Jun 16, 2015
- Semiconductor Energy Laboratory Co., Ltd.
- Kiyoshi Kato
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Waveform generation circuit
- Patent number 9,000,813
- Issue date Apr 7, 2015
- MagnaChip Semiconductor, Ltd.
- Kyu-Young Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Signal processing circuit and signal processing method
- Patent number 8,983,013
- Issue date Mar 17, 2015
- Fujitsu Limited
- Hirotaka Tamura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple samples with delay in oversampling in phase
- Patent number 8,760,210
- Issue date Jun 24, 2014
- Cadence Design Systems, Inc.
- Jeffrey S. Earl
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay line calibration
- Patent number 8,698,572
- Issue date Apr 15, 2014
- QUALCOMM Incorporated
- Chong U. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for glitch-free switching of multiple phase clock
- Patent number 8,680,910
- Issue date Mar 25, 2014
- Integrated Device Technology, Inc.
- Pengfei Hu
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock delay adjustment circuit for semiconductor integrated circuit...
- Patent number 8,514,002
- Issue date Aug 20, 2013
- Renesas Electronics Corporation
- Yusuke Ito
- G11 - INFORMATION STORAGE
Information Patent Grant
Open loop type delay locked loop and method for operating the same
- Patent number 8,482,331
- Issue date Jul 9, 2013
- Hynix Semiconductor Inc.
- Seung-Joon Ahn
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Trimming of a pseudo-closed loop programmable delay line
- Patent number 8,278,986
- Issue date Oct 2, 2012
- STMicroelectronics S.r.l.
- Luca Bettini
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Controlled clock phase generation
- Patent number 8,258,837
- Issue date Sep 4, 2012
- Intel Corporation
- Praveen Mosalikanti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Waveform generation circuit
- Patent number 8,188,772
- Issue date May 29, 2012
- MagnaChip Semiconductor, Ltd.
- Kyu-Young Chung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit and programmable delay
- Patent number 8,098,086
- Issue date Jan 17, 2012
- Qimonda AG
- Kazimierz Szczypinski
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable delay circuit, variable delay circuit controlling method,...
- Patent number 7,944,264
- Issue date May 17, 2011
- Fujitsu Limited
- Ryuichi Nishiyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit and programmable delay
- Patent number 7,928,790
- Issue date Apr 19, 2011
- Qimonda AG
- Kazimierz Szczypinski
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay line calibration
- Patent number 7,855,611
- Issue date Dec 21, 2010
- QUALCOMM Incorporated
- Chong U. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and device for determining trim solution
- Patent number 7,737,750
- Issue date Jun 15, 2010
- Infineon Technologies AG
- Steffen Loeffler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor integrated circuit device and substrate bias controll...
- Patent number 7,532,059
- Issue date May 12, 2009
- NEC Electronics Corporation
- Isao Naritake
- G05 - CONTROLLING REGULATING
Information Patent Grant
Timer circuit with adaptive reference
- Patent number 7,292,084
- Issue date Nov 6, 2007
- Micrel, Incorporated
- Boris Briskin
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION
- Publication number 20220131536
- Publication date Apr 28, 2022
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Mao-Hsuan CHOU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION
- Publication number 20210075412
- Publication date Mar 11, 2021
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Mao-Hsuan CHOU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION
- Publication number 20200099371
- Publication date Mar 26, 2020
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Mao-Hsuan CHOU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CONTROL SYSTEM AND PULSE OUTPUT DEVICE
- Publication number 20180226976
- Publication date Aug 9, 2018
- Omron Corporation
- Yoshimi NIWA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF SPEEDING UP OUTPUT ALIGNMENT IN A DIGITAL PHASE LOCKED LOOP
- Publication number 20170346494
- Publication date Nov 30, 2017
- MICROSEMI SEMICONDUCTOR ULC
- Changhui Cathy Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Hardware Delay Compensation in Digital Phase Locked Loop
- Publication number 20160294401
- Publication date Oct 6, 2016
- MICROSEMI SEMICONDUCTOR ULC
- Qu Gary Jin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DISTRIBUTING MULTIPLEXING LOGIC TO REMOVE MULTIPLEXOR LATENCY ON TH...
- Publication number 20140266356
- Publication date Sep 18, 2014
- International Business Machines Corporation
- HUU N. DINH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20140203859
- Publication date Jul 24, 2014
- Semiconductor Energy Laboratory Co., Ltd.
- Kiyoshi Kato
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING METHOD
- Publication number 20140192938
- Publication date Jul 10, 2014
- Fujitsu Limited
- Hirotaka TAMURA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE COMPARISON DEVICE AND DLL CIRCUIT
- Publication number 20140167820
- Publication date Jun 19, 2014
- MegaChips Corporation
- Shoichiro Kashiwakura
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MATRIX PHASE DETECTOR
- Publication number 20140139276
- Publication date May 22, 2014
- NVIDIA Corporation
- William J. Dally
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAVEFORM GENERATION CIRCUIT
- Publication number 20120212263
- Publication date Aug 23, 2012
- Magnachip Semiconductor, Ltd.
- Kyu-Young CHUNG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
OPEN LOOP TYPE DELAY LOCKED LOOP AND METHOD FOR OPERATING THE SAME
- Publication number 20110291730
- Publication date Dec 1, 2011
- Seung-Joon Ahn
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK DELAY ADJUSTMENT CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT...
- Publication number 20110242914
- Publication date Oct 6, 2011
- RENESAS ELECTRONICS CORPORATION
- Yusuke ITO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIMMING OF A PSEUDO-CLOSED LOOP PROGRAMMABLE DELAY LINE
- Publication number 20110156785
- Publication date Jun 30, 2011
- STMicroelectronics S.r.l.
- Luca BETTINI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WAVEFORM GENERATION CIRCUIT
- Publication number 20110148481
- Publication date Jun 23, 2011
- Magnachip Semiconductor, Ltd.
- Kyu-Young CHUNG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CONTROLLED CLOCK GENERATION
- Publication number 20110148486
- Publication date Jun 23, 2011
- Praveen Mosalikanti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY LINE CALIBRATION
- Publication number 20110080203
- Publication date Apr 7, 2011
- QUALCOMM Incorporated
- Chong U. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT AND PROGRAMMABLE DELAY
- Publication number 20110057699
- Publication date Mar 10, 2011
- QIMONDA AG
- Kazimierz Szczypinski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Variable delay circuit, variable delay circuit controlling method,...
- Publication number 20100123503
- Publication date May 20, 2010
- FUJITSU LIMITED
- Ryuichi Nishiyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT AND PROGRAMMABLE DELAY
- Publication number 20100045351
- Publication date Feb 25, 2010
- QIMONDA AG
- Kazimierz Szczypinski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and device for determining trim solution
- Publication number 20080169854
- Publication date Jul 17, 2008
- Infineon Technologies North America Corp.
- Steffen Loeffler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY LINE CALIBRATION
- Publication number 20080111653
- Publication date May 15, 2008
- QUALCOMM Incorporated
- Chong U. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit device and substrate bias controll...
- Publication number 20070236277
- Publication date Oct 11, 2007
- NEC Electronics Corporation
- Isao Naritake
- G05 - CONTROLLING REGULATING
Information Patent Application
Timer Circuit With Adaptive Reference
- Publication number 20060244545
- Publication date Nov 2, 2006
- MICREL, INC.
- Boris Briskin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Timer circuit with adaptive reference
- Publication number 20060082394
- Publication date Apr 20, 2006
- Boris Briskin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method of optimizing the timing between signals
- Publication number 20050246118
- Publication date Nov 3, 2005
- Aaron John Nygren
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated circuit systems and devices having high precision digita...
- Publication number 20050206426
- Publication date Sep 22, 2005
- Robert J. Proebsting
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay circuit
- Publication number 20050206425
- Publication date Sep 22, 2005
- Toshiyuki Shutoku
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay adjustment circuit, integrated circuit device, and delay adju...
- Publication number 20050134351
- Publication date Jun 23, 2005
- SEIKO EPSON CORPORATION
- Tsuyoshi Tamura
- H03 - BASIC ELECTRONIC CIRCUITRY

using a reference signal

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method and apparatus for precision phase skew generation

Electronic circuit and method for clock skew-calibration

Demodulation methods and devices for frequency-modulated (FM) signals

Method and apparatus for precision phase skew generation

Fixed-width pulse generator

Method and apparatus for precision phase skew generation

Control system and pulse output device

Glitch detection in input/output bus

External clock based clock generator

Method of speeding up output alignment in a digital phase locked loop

Hardware delay compensation in digital phase locked loop

Distributing multiplexing logic to remove multiplexor latency on th...

Semiconductor device including flip-flop and logic circuit

Waveform generation circuit

Signal processing circuit and signal processing method

Multiple samples with delay in oversampling in phase

Delay line calibration

Method and apparatus for glitch-free switching of multiple phase clock

Clock delay adjustment circuit for semiconductor integrated circuit...

Open loop type delay locked loop and method for operating the same

Trimming of a pseudo-closed loop programmable delay line

Controlled clock phase generation

Waveform generation circuit

Integrated circuit and programmable delay

Variable delay circuit, variable delay circuit controlling method,...

Integrated circuit and programmable delay

Delay line calibration

Method and device for determining trim solution

Semiconductor integrated circuit device and substrate bias controll...

Timer circuit with adaptive reference

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION

METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION

METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION

CONTROL SYSTEM AND PULSE OUTPUT DEVICE

METHOD OF SPEEDING UP OUTPUT ALIGNMENT IN A DIGITAL PHASE LOCKED LOOP

Hardware Delay Compensation in Digital Phase Locked Loop

DISTRIBUTING MULTIPLEXING LOGIC TO REMOVE MULTIPLEXOR LATENCY ON TH...

SEMICONDUCTOR DEVICE

SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING METHOD

PHASE COMPARISON DEVICE AND DLL CIRCUIT

MATRIX PHASE DETECTOR

WAVEFORM GENERATION CIRCUIT

OPEN LOOP TYPE DELAY LOCKED LOOP AND METHOD FOR OPERATING THE SAME

CLOCK DELAY ADJUSTMENT CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT...

TRIMMING OF A PSEUDO-CLOSED LOOP PROGRAMMABLE DELAY LINE

WAVEFORM GENERATION CIRCUIT

CONTROLLED CLOCK GENERATION

DELAY LINE CALIBRATION

INTEGRATED CIRCUIT AND PROGRAMMABLE DELAY

Variable delay circuit, variable delay circuit controlling method,...

INTEGRATED CIRCUIT AND PROGRAMMABLE DELAY

Method and device for determining trim solution

DELAY LINE CALIBRATION

Semiconductor integrated circuit device and substrate bias controll...

Timer Circuit With Adaptive Reference

Timer circuit with adaptive reference

Method of optimizing the timing between signals

Integrated circuit systems and devices having high precision digita...

Delay circuit

Delay adjustment circuit, integrated circuit device, and delay adju...