using a slave processor

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

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G06F9/3877using a slave processor

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Patents Grantslast 30 patents

Information Patent Grant
Method and architecture for accelerating deterministic stochastic c...
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- Issue date May 20, 2025
- University of Louisiana at Lafayette
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit-parallel vector composability for neural acceleration
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- Issue date May 20, 2025
- The Regents of the University of California
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Information Patent Grant
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Information Patent Grant
System on chip and method for operating system on chip
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Information Patent Grant
System and method for integration and validation
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Information Patent Grant
Schedule-aware tensor distribution module
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- Gautham Chinya
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Information Patent Grant
Providing a partial reconfiguration (PR) bitstream to a cloud servi...
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- Issue date Apr 29, 2025
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Information Patent Grant
Vector processor with vector data buffer
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Information Patent Grant
Message-based processing with assignment of neural network layers t...
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Information Patent Grant
Configurable vector compute engine
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Information Patent Grant
Coprocessor operation bundling
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Information Patent Grant
Running services in SDL of a RIC
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Information Patent Grant
Buffer checker for task processing fault detection
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Information Patent Grant
Apparatus and method for secondary offloads in graphics processing...
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Information Patent Grant
Criticality-informed caching policies with multiple criticality levels
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Information Patent Grant
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Information Patent Grant
Data shards for distributed processing
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Information Patent Grant
Persistent storage device management
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Information Patent Grant
Application programming interface to indicate accelerator error han...
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- Issue date Feb 18, 2025
- NVIDIA Corporation
- Karthik Raghavan Ravi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for acceleration data structure refit
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- Issue date Feb 18, 2025
- Intel Corporation
- Michael Apodaca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating and executing a control flow
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- Issue date Feb 11, 2025
- Kyle B. Wheeler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing data between processing units indentified by a sequentially...
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Information Patent Grant
Methods and apparatus to conditionally activate a big core in a com...
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- Issue date Feb 4, 2025
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Information Patent Grant
Deep learning-based variant classifier
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Information Patent Grant
Systems and methods for tone mapping of high dynamic range images f...
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Information Patent Grant
System having a hybrid threading processor, a hybrid threading fabr...
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Information Patent Grant
Quantum network node and protocols with multiple qubit species
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- B82 - NANO-TECHNOLOGY
Information Patent Grant
Streaming engine with multi dimensional circular addressing selecta...
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- Issue date Jan 14, 2025
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Information Patent Grant
Command-aware hardware architecture
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- Issue date Jan 14, 2025
- Lilac Cloud, Inc.
- Simon Luigi Sabato
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Information Patent Grant
Technologies for secure device configuration and management
- Patent number 12,189,542
- Issue date Jan 7, 2025
- Intel Corporation
- Reshma Lal
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

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HARDWARE ACCELERATION CIRCUIT, DATA PROCESSING ACCELERATION METHOD,...
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- Weijun Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR PROCESSOR STORAGE
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- Daedalus Cloud LLC
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- Publication number 20250156181
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GENERATING AND EXECUTING A CONTROL FLOW
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- Lodestar Licensing Group LLC
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- G06 - COMPUTING CALCULATING COUNTING
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COMPILER ALGORITHM FOR GPU PREFETCHING
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- QUALCOMM Incorporated
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PERSISTENT STORAGE DEVICE MANAGEMENT
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TECHNOLOGIES FOR SECURE DEVICE CONFIGURATION AND MANAGEMENT
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BUS FOR TRANSPORTING OUTPUT VALUES OF NEURAL NETWORK LAYER
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Coprocessor Prefetcher
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- Brandon H. Dwiel
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SHUFFLING METHOD OF PLAYING CARDS
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- ANGEL GROUP CO., LTD.
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- A63 - SPORTS GAMES AMUSEMENTS
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TECHNIQUES OF ENCRYPTING BMC AND BIOS FIRMWARE AND DATA IN FLASH ME...
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Coprocessors with Bypass Optimization, Variable Grid Architecture,...
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UNBLOCKING THE INTEGER PIPELINE DURING MATH PIPELINE PHASES IN A GR...
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- Publication date Mar 13, 2025
- Intel Corporation
- Shuai Mu
- G06 - COMPUTING CALCULATING COUNTING
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Method, System, and Computer Program Product for Dynamically Assign...
- Publication number 20250068466
- Publication date Feb 27, 2025
- VISA INTERNATIONAL SERVICE ASSOCIATION
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
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- Publication date Feb 27, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Video Compression in Removable Storage Device having Deep Learning...
- Publication number 20250053537
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- Micron Technology, Inc.
- Poorna Kale
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Information Patent Application
MULTI-CARD PROCESSOR ACCESS FRAMEWORK
- Publication number 20250045051
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- Truist Bank
- Naga Mrudula Kalyani Chitturi
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SYSTEMS AND METHODS FOR TONE MAPPING OF HIGH DYNAMIC RANGE IMAGES F...
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- Attila Tamas Afra
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EFFICIENT MULTI-GPU RENDERING OF GEOMETRY BY ASSIGNING GEOMETRY TO...
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HARDWARE-ACCELERATED NEAREST NEIGHBOR QUERIES FOR ARBITRARY DATA PR...
- Publication number 20250037229
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- NVIDIA Corporation
- Nathan Vollmer Morrical
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT MULTI-GPU RENDERING OF GEOMETRY BY CONFIGURING A SHADER T...
- Publication number 20250029202
- Publication date Jan 23, 2025
- Sony Interactive Entertainment Inc.
- Mark E. Cerny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE ACCELERATED DYNAMIC WORK CREATION ON A GRAPHICS PROCESSING...
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- ADVANCED MICRO DEVICES, INC.
- Anthony GUTIERREZ
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DISTRIBUTED GRAPHICS PROCESSOR UNIT ARCHITECTURE
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- Micron Technology, Inc.
- Dmitri Yudanov
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HARDWARE-BASED ACCELERATOR SIGNALING
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AUTOMATIC COMPUTE KERNEL GENERATION
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- NVIDIA Corporation
- Justin Paul Luitjens
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SUPPLEMENTAL AI PROCESSING IN MEMORY
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- Lodestar Licensing Group, LLC
- Honglin Sun
- G06 - COMPUTING CALCULATING COUNTING
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INSTRUCTION DISPATCHING METHOD AND APPARATUS FOR MULTITHREADED PROC...
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- HYGON INFORMATION TECHNOLOGY CO., LTD.
- Hao XIAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST-PREFERRED MEMORY OPERATION
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- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK DEVICE INTERFACE USING NON-VOLATILE PINNED MEMORY
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- Daedalus Cloud LLC
- Stuart John INGLIS
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Information Patent Application
DYNAMIC COMMUNICATION ARCHITECTURE FOR DECENTRALIZED HETEROGENOUS A...
- Publication number 20240362022
- Publication date Oct 31, 2024
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- DEJAN S. MILOJICIC
- G06 - COMPUTING CALCULATING COUNTING

using a slave processor

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method and architecture for accelerating deterministic stochastic c...

Bit-parallel vector composability for neural acceleration

Effective and scalable building and probing of hash tables using mu...

System on chip and method for operating system on chip

System and method for integration and validation

Schedule-aware tensor distribution module

Providing a partial reconfiguration (PR) bitstream to a cloud servi...

Vector processor with vector data buffer

Message-based processing with assignment of neural network layers t...

Configurable vector compute engine

Coprocessor operation bundling

Running services in SDL of a RIC

Buffer checker for task processing fault detection

Apparatus and method for secondary offloads in graphics processing...

Criticality-informed caching policies with multiple criticality levels

Vector processor storage

Data shards for distributed processing

Persistent storage device management

Application programming interface to indicate accelerator error han...

Apparatus and method for acceleration data structure refit

Generating and executing a control flow

Routing data between processing units indentified by a sequentially...

Methods and apparatus to conditionally activate a big core in a com...

Deep learning-based variant classifier

Systems and methods for tone mapping of high dynamic range images f...

System having a hybrid threading processor, a hybrid threading fabr...

Quantum network node and protocols with multiple qubit species

Streaming engine with multi dimensional circular addressing selecta...

Command-aware hardware architecture

Technologies for secure device configuration and management

Patents Applicationslast 30 patents

HARDWARE ACCELERATION CIRCUIT, DATA PROCESSING ACCELERATION METHOD,...

VECTOR PROCESSOR STORAGE

HARDWARE ACCELERATION CIRCUIT, DATA PROCESSING ACCELERATION METHOD,...

GENERATING AND EXECUTING A CONTROL FLOW

COMPILER ALGORITHM FOR GPU PREFETCHING

PERSISTENT STORAGE DEVICE MANAGEMENT

TECHNOLOGIES FOR SECURE DEVICE CONFIGURATION AND MANAGEMENT

BUS FOR TRANSPORTING OUTPUT VALUES OF NEURAL NETWORK LAYER

Coprocessor Prefetcher

SHUFFLING METHOD OF PLAYING CARDS

TECHNIQUES OF ENCRYPTING BMC AND BIOS FIRMWARE AND DATA IN FLASH ME...

Coprocessors with Bypass Optimization, Variable Grid Architecture,...

UNBLOCKING THE INTEGER PIPELINE DURING MATH PIPELINE PHASES IN A GR...

Method, System, and Computer Program Product for Dynamically Assign...

SCALAR CORE INTEGRATION

Video Compression in Removable Storage Device having Deep Learning...

MULTI-CARD PROCESSOR ACCESS FRAMEWORK

SYSTEMS AND METHODS FOR TONE MAPPING OF HIGH DYNAMIC RANGE IMAGES F...

EFFICIENT MULTI-GPU RENDERING OF GEOMETRY BY ASSIGNING GEOMETRY TO...

HARDWARE-ACCELERATED NEAREST NEIGHBOR QUERIES FOR ARBITRARY DATA PR...

EFFICIENT MULTI-GPU RENDERING OF GEOMETRY BY CONFIGURING A SHADER T...

HARDWARE ACCELERATED DYNAMIC WORK CREATION ON A GRAPHICS PROCESSING...

DISTRIBUTED GRAPHICS PROCESSOR UNIT ARCHITECTURE

HARDWARE-BASED ACCELERATOR SIGNALING

AUTOMATIC COMPUTE KERNEL GENERATION

SUPPLEMENTAL AI PROCESSING IN MEMORY

INSTRUCTION DISPATCHING METHOD AND APPARATUS FOR MULTITHREADED PROC...

HOST-PREFERRED MEMORY OPERATION

BLOCK DEVICE INTERFACE USING NON-VOLATILE PINNED MEMORY

DYNAMIC COMMUNICATION ARCHITECTURE FOR DECENTRALIZED HETEROGENOUS A...