using carry switching

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G06F7/503

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/503using carry switching

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Ripple carry adder with inverted ferroelectric or paraelectric base...
- Patent number 12,118,327
- Issue date Oct 15, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full adder circuit and multi-bit full adder
- Patent number 12,073,192
- Issue date Aug 27, 2024
- ZHEJIANG LAB
- Jiani Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-domain combinational logic circuitry
- Patent number 11,941,369
- Issue date Mar 26, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,917,053
- Issue date Feb 27, 2024
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split and duplicate ripple circuits
- Patent number 11,733,967
- Issue date Aug 22, 2023
- Micron Technoloay Inc.
- Donald Martin Morgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder circuitry for very large integers
- Patent number 11,662,979
- Issue date May 30, 2023
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternative data selector, full adder and ripple carry adder
- Patent number 11,581,894
- Issue date Feb 14, 2023
- SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
- Zhijun Fan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full adder, chip and computing device
- Patent number 11,507,347
- Issue date Nov 22, 2022
- SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
- Zhijun Fan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-domain combinational logic circuitry
- Patent number 11,481,192
- Issue date Oct 25, 2022
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic device
- Patent number 11,461,075
- Issue date Oct 4, 2022
- Kabushiki Kaisha Toshiba
- Takao Marukame
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split and duplicate ripple circuits
- Patent number 11,416,217
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- Donald Martin Morgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefix network-directed addition
- Patent number 11,334,318
- Issue date May 17, 2022
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined SHA2 and SHA3 based XMSS hardware accelerator
- Patent number 11,303,429
- Issue date Apr 12, 2022
- Intel Corporation
- Santosh Ghosh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder-subtractor circuit and method of controlling adder-subtractor...
- Patent number 11,294,630
- Issue date Apr 5, 2022
- Fujitsu Limited
- Shiro Kamoshida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-domain combinational logic circuitry
- Patent number 11,068,237
- Issue date Jul 20, 2021
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Continuous carry-chain packing
- Patent number 11,016,733
- Issue date May 25, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder circuitry for very large integers
- Patent number 10,873,332
- Issue date Dec 22, 2020
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressor, adder circuit and operation method thereof
- Patent number 10,848,178
- Issue date Nov 24, 2020
- DigWise Technology Corporation, LTD
- JingJie Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for efficient quantum ternary arithmetic
- Patent number 10,726,350
- Issue date Jul 28, 2020
- Microsoft Technology Licensing, LLC
- Xingshan Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full adder circuits with reduced delay
- Patent number 10,620,915
- Issue date Apr 14, 2020
- Mediatek Inc.
- Ying-Chun Wei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance power optimized full adder
- Patent number 10,613,829
- Issue date Apr 7, 2020
- QUALCOMM Incorporated
- Manish Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance FPGA addition
- Patent number 10,340,920
- Issue date Jul 2, 2019
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder capable of supporting addition and subtraction of up to n-bit...
- Patent number 9,842,085
- Issue date Dec 12, 2017
- Samsung Electronics Co., Ltd.
- Hyeong-Seok Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accumulating data values
- Patent number 9,496,917
- Issue date Nov 15, 2016
- ST-Ericsson SA
- Arnaud Germain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data encryption and decryption with a key by an N-state inverter mo...
- Patent number 8,149,143
- Issue date Apr 3, 2012
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic module including versatile adder for FPGA
- Patent number 8,085,064
- Issue date Dec 27, 2011
- Actel Corporation
- Wenyi Feng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
N-state ripple adder scheme coding with corresponding N-state rippl...
- Patent number 7,924,176
- Issue date Apr 12, 2011
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic module including versatile adder for FPGA
- Patent number 7,772,879
- Issue date Aug 10, 2010
- Actel Corporation
- Wenyi Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
N-state ripple adder scheme coding with corresponding n-state rippl...
- Patent number 7,772,999
- Issue date Aug 10, 2010
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry-ripple adder
- Patent number 7,716,270
- Issue date May 11, 2010
- Infineon Technologies AG
- Joel Hatsch
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LARGE NUMBER INTEGER ADDITION USING VECTOR ACCUMULATION
- Publication number 20240319964
- Publication date Sep 26, 2024
- Onur Kayiran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULL ADDER CIRCUIT AND MULTI-BIT FULL ADDER
- Publication number 20240078086
- Publication date Mar 7, 2024
- ZHEJIANG LAB
- Jiani GU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURON CIRCUITS FOR SPIKING NEURAL NETWORKS
- Publication number 20230376736
- Publication date Nov 23, 2023
- International Business Machines Corporation
- Giovanni Cherubini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT AND DUPLICATE RIPPLE CIRCUITS
- Publication number 20230028060
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Donald Martin Morgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATIVE DATA SELECTOR, FULL ADDER AND RIPPLE CARRY ADDER
- Publication number 20220271756
- Publication date Aug 25, 2022
- SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
- Zhijun FAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULL ADDER, CHIP AND COMPUTING DEVICE
- Publication number 20220269481
- Publication date Aug 25, 2022
- SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
- Zhijun FAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDING LUT FRACTURABILIY TO FPGA 4-LUTS USING EXISTING ADDER CIRCUITRY
- Publication number 20220247413
- Publication date Aug 4, 2022
- EFINIX, INC.
- Marcel Gort
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR
- Publication number 20220224514
- Publication date Jul 14, 2022
- Intel Corporation
- SANTOSH GHOSH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Novel fast adder
- Publication number 20220206748
- Publication date Jun 30, 2022
- Xinyu CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC DEVICE
- Publication number 20210216282
- Publication date Jul 15, 2021
- KABUSHIKI KAISHA TOSHIBA
- Takao MARUKAME
- G05 - CONTROLLING REGULATING
Information Patent Application
ADDER CIRCUITRY FOR VERY LARGE INTEGERS
- Publication number 20210075425
- Publication date Mar 11, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULL ADDER CIRCUITS WITH REDUCED DELAY
- Publication number 20200065065
- Publication date Feb 27, 2020
- MEDIATEK INC.
- Ying-Chun WEI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE POWER OPTIMIZED FULL ADDER
- Publication number 20190354347
- Publication date Nov 21, 2019
- QUALCOMM Incorporated
- Manish SRIVASTAVA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER-SUBTRACTOR CIRCUIT AND METHOD OF CONTROLLING ADDER-SUBTRACTOR...
- Publication number 20190339940
- Publication date Nov 7, 2019
- Fujitsu Limited
- Shiro KAMOSHIDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR
- Publication number 20190319782
- Publication date Oct 17, 2019
- Intel Corporation
- SANTOSH GHOSH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER CIRCUITRY FOR VERY LARGE INTEGERS
- Publication number 20190114140
- Publication date Apr 18, 2019
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR EFFICIENT QUANTUM TERNARY ARITHMETIC
- Publication number 20180365583
- Publication date Dec 20, 2018
- Microsoft Technology Licensing, LLC
- Xingshan Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accumulating Data Values
- Publication number 20140219320
- Publication date Aug 7, 2014
- ST-Ericsson SA
- Arnaud Germain
- G01 - MEASURING TESTING
Information Patent Application
Data Encryption and Decryption with a Key by an N-state Inverter Mo...
- Publication number 20110182423
- Publication date Jul 28, 2011
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC MODULE INCLUDING VERSATILE ADDER FOR FPGA
- Publication number 20100271068
- Publication date Oct 28, 2010
- Actel Corporation
- Wenyi Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
N-State Ripple Adder Scheme Coding with Corresponding N-State Rippl...
- Publication number 20100271243
- Publication date Oct 28, 2010
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
N-State Ripple Adder Scheme Coding with Corresponding N-State Rippl...
- Publication number 20090146851
- Publication date Jun 11, 2009
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Carry-ripple adder
- Publication number 20060235923
- Publication date Oct 19, 2006
- Joel Hatsch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic circuit with array of programmable logic cells
- Publication number 20060164119
- Publication date Jul 27, 2006
- Koninklijke Philips Electronics, N.V.
- Katarzyna Nowak-Leijten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic circuit with array of programmable logic cells
- Publication number 20060158218
- Publication date Jul 20, 2006
- Katarzyna Leijten-Nowak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic circuit with array of programmable logic cells
- Publication number 20060066345
- Publication date Mar 30, 2006
- Katarzyna Leijten-Nowak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
One bit full adder with sum and carry outputs capable of independen...
- Publication number 20050289211
- Publication date Dec 29, 2005
- STMicroelectronics Pvt. Ltd.
- Deboleena Minz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for converting, and adder circuit
- Publication number 20050193052
- Publication date Sep 1, 2005
- Infineon Technologies AG
- Astrid Elbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adder, multiplier and integrated circuit
- Publication number 20050076074
- Publication date Apr 7, 2005
- Kimito Horie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self-timed carry look-ahead adder and summation method thereof
- Publication number 20040167957
- Publication date Aug 26, 2004
- Chang-Jun Choi
- G06 - COMPUTING CALCULATING COUNTING

using carry switching

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Ripple carry adder with inverted ferroelectric or paraelectric base...

Full adder circuit and multi-bit full adder

Dual-domain combinational logic circuitry

Combined SHA2 and SHA3 based XMSS hardware accelerator

Split and duplicate ripple circuits

Adder circuitry for very large integers

Alternative data selector, full adder and ripple carry adder

Full adder, chip and computing device

Dual-domain combinational logic circuitry

Arithmetic device

Split and duplicate ripple circuits

Prefix network-directed addition

Combined SHA2 and SHA3 based XMSS hardware accelerator

Adder-subtractor circuit and method of controlling adder-subtractor...

Dual-domain combinational logic circuitry

Continuous carry-chain packing

Adder circuitry for very large integers

Compressor, adder circuit and operation method thereof

Method and system for efficient quantum ternary arithmetic

Full adder circuits with reduced delay

Performance power optimized full adder

High performance FPGA addition

Adder capable of supporting addition and subtraction of up to n-bit...

Accumulating data values

Data encryption and decryption with a key by an N-state inverter mo...

Logic module including versatile adder for FPGA

N-state ripple adder scheme coding with corresponding N-state rippl...

Logic module including versatile adder for FPGA

N-state ripple adder scheme coding with corresponding n-state rippl...

Carry-ripple adder

Patents Applicationslast 30 patents

LARGE NUMBER INTEGER ADDITION USING VECTOR ACCUMULATION

FULL ADDER CIRCUIT AND MULTI-BIT FULL ADDER

NEURON CIRCUITS FOR SPIKING NEURAL NETWORKS

SPLIT AND DUPLICATE RIPPLE CIRCUITS

ALTERNATIVE DATA SELECTOR, FULL ADDER AND RIPPLE CARRY ADDER

FULL ADDER, CHIP AND COMPUTING DEVICE

ADDING LUT FRACTURABILIY TO FPGA 4-LUTS USING EXISTING ADDER CIRCUITRY

COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR

Novel fast adder

ARITHMETIC DEVICE

ADDER CIRCUITRY FOR VERY LARGE INTEGERS

FULL ADDER CIRCUITS WITH REDUCED DELAY

PERFORMANCE POWER OPTIMIZED FULL ADDER

ADDER-SUBTRACTOR CIRCUIT AND METHOD OF CONTROLLING ADDER-SUBTRACTOR...

COMBINED SHA2 AND SHA3 BASED XMSS HARDWARE ACCELERATOR

ADDER CIRCUITRY FOR VERY LARGE INTEGERS

METHOD AND SYSTEM FOR EFFICIENT QUANTUM TERNARY ARITHMETIC

Accumulating Data Values

Data Encryption and Decryption with a Key by an N-state Inverter Mo...

LOGIC MODULE INCLUDING VERSATILE ADDER FOR FPGA

N-State Ripple Adder Scheme Coding with Corresponding N-State Rippl...

N-State Ripple Adder Scheme Coding with Corresponding N-State Rippl...

Carry-ripple adder

Electronic circuit with array of programmable logic cells

Electronic circuit with array of programmable logic cells

Electronic circuit with array of programmable logic cells

One bit full adder with sum and carry outputs capable of independen...

Apparatus and method for converting, and adder circuit

Adder, multiplier and integrated circuit

Self-timed carry look-ahead adder and summation method thereof