Vector or matrix data

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CPC
G06F2212/454

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/454Vector or matrix data

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix add, subtract, and mul...
- Patent number 12,260,213
- Issue date Mar 25, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process-in-memory architecture based on resistive random access mem...
- Patent number 12,235,927
- Issue date Feb 25, 2025
- Zhejiang University
- Liang Zhao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Streaming engine with multi dimensional circular addressing selecta...
- Patent number 12,197,343
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile load, multiplication and...
- Patent number 12,182,571
- Issue date Dec 31, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile matrix multiplication an...
- Patent number 12,147,804
- Issue date Nov 19, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile transpose
- Patent number 12,124,847
- Issue date Oct 22, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix operations
- Patent number 12,106,100
- Issue date Oct 1, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatus for matrix move
- Patent number 12,039,332
- Issue date Jul 16, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,007,907
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable in memory computing engine, platform, bit cells and la...
- Patent number 12,007,890
- Issue date Jun 11, 2024
- The Trustees of Princeton University
- Naveen Verma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache that supports draining write-miss entries
- Patent number 12,001,345
- Issue date Jun 4, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deterministic memory for tensor streaming processors
- Patent number 12,001,383
- Issue date Jun 4, 2024
- Groq, Inc.
- Dennis Charles Abts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile store
- Patent number 11,977,886
- Issue date May 7, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce read-modify-write cycles for non-al...
- Patent number 11,940,929
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 11,940,930
- Issue date Mar 26, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Streaming engine with flexible streaming engine template supporting...
- Patent number 11,921,636
- Issue date Mar 5, 2024
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device and method for improving route planning computing devices
- Patent number 11,892,309
- Issue date Feb 6, 2024
- Polaris Industries Inc.
- Erik S. Freed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 11,886,353
- Issue date Jan 30, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD
- Publication number 20250004716
- Publication date Jan 2, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE IN MEMORY COMPUTING ENGINE, PLATFORM, BIT CELLS AND LA...
- Publication number 20240330178
- Publication date Oct 3, 2024
- The Trustees of Princeton University
- Naveen VERMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE
- Publication number 20240320001
- Publication date Sep 26, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINISTIC MEMORY FOR TENSOR STREAMING PROCESSORS
- Publication number 20240320185
- Publication date Sep 26, 2024
- Groq, Inc.
- Dennis Charles Abts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE STORE
- Publication number 20240256276
- Publication date Aug 1, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...
- Publication number 20240232100
- Publication date Jul 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH VARIABLE STREAM TEMPLATE FORMAT
- Publication number 20240202123
- Publication date Jun 20, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE
- Publication number 20240193098
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS
- Publication number 20240192954
- Publication date Jun 13, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20240143516
- Publication date May 2, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX ADD, SUBTRACT, AND MUL...
- Publication number 20240134644
- Publication date Apr 25, 2024
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUS FOR TILE CONFIGURATION
- Publication number 20240111533
- Publication date Apr 4, 2024
- Intel Corporation
- Menachem ADELMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20240104026
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatus for Performing Diversity Matrix Operations Wi...
- Publication number 20240078286
- Publication date Mar 7, 2024
- Micron Technology, Inc.
- Fa-Long Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS
- Publication number 20240078190
- Publication date Mar 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20240028523
- Publication date Jan 25, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20240020242
- Publication date Jan 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE MERGING ON STORES WITH DIFFERENT TAGS
- Publication number 20240004800
- Publication date Jan 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20230401162
- Publication date Dec 14, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH MULTI DIMENSIONAL CIRCULAR ADDRESSING SELECTA...
- Publication number 20230359565
- Publication date Nov 9, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20230342305
- Publication date Oct 26, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

Vector or matrix data

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Hybrid victim cache and write miss buffer with fence operation

Methods and apparatus for multi-banked victim cache with dual datapath

Systems, methods, and apparatuses for matrix add, subtract, and mul...

Process-in-memory architecture based on resistive random access mem...

Atomic compare and swap in a coherent cache system

Aggressive write flush scheme for a victim cache

Methods and apparatus to reduce bank pressure using aggressive writ...

Streaming engine with multi dimensional circular addressing selecta...

Fully pipelined read-modify-write support

Methods and apparatus for allocation in a victim cache system

Systems, methods, and apparatuses for tile load, multiplication and...

Systems, methods, and apparatuses for tile matrix multiplication an...

Methods and apparatus for read-modify-write support in multi-banked...

Victim cache with dynamic allocation of entries

Atomic operations and histogram operations in a cache pipeline

Systems, methods, and apparatuses for tile transpose

Methods and apparatus for eviction in dual datapath victim cache sy...

Systems, methods, and apparatuses for matrix operations

Methods and apparatus to facilitate read-modify-write support in a...

Systems, methods, and apparatus for matrix move

Victim cache with write miss merging

Configurable in memory computing engine, platform, bit cells and la...

Victim cache that supports draining write-miss entries

Deterministic memory for tensor streaming processors

Systems, methods, and apparatuses for tile store

Methods and apparatus to reduce read-modify-write cycles for non-al...

Methods and apparatus to facilitate atomic operations in victim cache

Streaming engine with flexible streaming engine template supporting...

Device and method for improving route planning computing devices

Hybrid victim cache and write miss buffer with fence operation

Patents Applicationslast 30 patents

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

CONFIGURABLE IN MEMORY COMPUTING ENGINE, PLATFORM, BIT CELLS AND LA...

SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE

DETERMINISTIC MEMORY FOR TENSOR STREAMING PROCESSORS

VICTIM CACHE WITH WRITE MISS MERGING

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

SYSTEMS, METHODS, AND APPARATUSES FOR TILE STORE

METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...

STREAMING ENGINE WITH VARIABLE STREAM TEMPLATE FORMAT

METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX ADD, SUBTRACT, AND MUL...

SYSTEMS, METHODS, AND APPARATUS FOR TILE CONFIGURATION

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

Methods and Apparatus for Performing Diversity Matrix Operations Wi...

WRITE MERGING ON STORES WITH DIFFERENT PRIVILEGE LEVELS

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

WRITE MERGING ON STORES WITH DIFFERENT TAGS

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

STREAMING ENGINE WITH MULTI DIMENSIONAL CIRCULAR ADDRESSING SELECTA...

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES