where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F11/00Error detection Error correction Monitoring

Current Industry

G06F11/1604where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for early detection of signal excursion out of...
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Information Patent Grant
Control system
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Timing-drift calibration
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Clock data recovery circuit
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Failure recovery in a scaleout system using a matrix clock
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Robust soft error tolerant multi-bit D flip-flop circuit
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Clock data recovery circuit
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Communication node for critical systems
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Differential clock skew detector
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Method, clock recovery module as well as computer program for recov...
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Information Patent Grant
Clock recovery using between-interval timing error estimation
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- Issue date Jan 25, 2022
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Information Patent Grant
Timing-drift calibration
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Information Patent Grant
Clock frequency counting during high-voltage operations for immedia...
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Fault tolerant clock monitor system
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Clock generation circuit and clock signal generation method
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Information Patent Grant
Reducing chip latency at a clock boundary by reference clock phase...
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Information Patent Grant
Counter circuitry and methods including a master counter providing...
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Information Patent Grant
Lockstep processing systems and methods
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Consistency determination
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Fail-safe clock monitor with fault injection
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Timing-drift calibration
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Error recovery within integrated circuit
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Information Patent Grant
Error recovery within integrated circuit
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Information Patent Grant
Method, and a synchronous digital circuit, for preventing propagati...
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Information Patent Grant
Clock jitter emulation
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Programmable clock monitor
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Frequency converter
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Brushless motor drive device
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- Issue date Feb 5, 2019
- PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
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- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
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METHOD AND APPARATUS FOR EARLY DETECTION OF SIGNAL EXCURSION OUT OF...
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TIMING-DRIFT CALIBRATION
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CLOCK DATA RECOVERY CIRCUIT
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METHOD FOR MONITORING A CLOCK GENERATOR MODULE OF AN ELECTRONIC CIR...
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QUADRATURE ERROR CORRECTION CIRCUIT AND MEMORY DEVICE HAVING THE SAME
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METHOD AND SYSTEM FOR TRACING ERROR OF LOGIC SYSTEM DESIGN
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FAILURE RECOVERY IN A SCALEOUT SYSTEM USING A MATRIX CLOCK
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CLOCK SWITCHING METHOD, DEVICE, AND STORAGE MEDIUM
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CLOCK DATA RECOVERY CIRCUIT
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TIMING-DRIFT CALIBRATION
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Heterogeneous Computing Systems and Methods for Clock Synchronization
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- SYNG, Inc.
- Jay Sterling Coggin
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CLOCK DATA RECOVERY CIRCUIT
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- TEXAS INSTRUMENTS INCORPORATED
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CLOCK FREQUENCY COUNTING DURING HIGH-VOLTAGE OPERATIONS FOR IMMEDIA...
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- SANDISK TECHNOLOGIES LLC
- Dan Linnen
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ROBUST SOFT ERROR TOLERANT MULTI-BIT D FLIP-FLOP CIRCUIT
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- STMicroelectronics International N.V.
- Abhishek Jain
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TIMING-DRIFT CALIBRATION
- Publication number 20200312422
- Publication date Oct 1, 2020
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- Yohan U. Frans
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Clock Recovery Using Between-Interval Timing Error Estimation
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- CREDO TECHNOLOGY GROUP LIMITED
- Fang CAI
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METHOD, CLOCK RECOVERY MODULE AS WELL AS COMPUTER PROGRAM FOR RECOV...
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IPS SOC PLL MONITORING AND ERROR REPORTING
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Communication Node for Critical Systems
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COUNTER CIRCUITRY AND METHODS
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Fail-Safe Clock Monitor with Fault Injection
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- Publication date Jan 9, 2020
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LOCKSTEP PROCESSING SYSTEMS AND METHODS
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REDUCING CHIP LATENCY AT A CLOCK BOUNDARY BY REFERENCE CLOCK PHASE...
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Data Transmission Between Computation Units Having Safe Signaling T...
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- HANS-HELMUT SCHWEISSTHAL
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SIGNAL RECEIVING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF
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- Publication date May 9, 2019
- Mstar Semiconductor, Inc.
- CHIA-WEI CHEN
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METHOD, AND A SYNCHRONOUS DIGITAL CIRCUIT, FOR PREVENTING PROPAGATI...
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- NXP B.V.
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Voltage Reference Reconfiguration Fault-tolerant Control Method for...
- Publication number 20180217902
- Publication date Aug 2, 2018
- Shanghai Maritime University
- Tianzhen Wang
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Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20180174667
- Publication date Jun 21, 2018
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING

where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method and apparatus for early detection of signal excursion out of...

Control system

Timing-drift calibration

Clock data recovery circuit

Failure recovery in a scaleout system using a matrix clock

Fault-tolerant time server for a real-time computer sytem

IPS SOC PLL monitoring and error reporting

Robust soft error tolerant multi-bit D flip-flop circuit

Clock data recovery circuit

Communication node for critical systems

Differential clock skew detector

Method, clock recovery module as well as computer program for recov...

Clock recovery using between-interval timing error estimation

Timing-drift calibration

Clock frequency counting during high-voltage operations for immedia...

Fault tolerant clock monitor system

Clock generation circuit and clock signal generation method

Reducing chip latency at a clock boundary by reference clock phase...

Counter circuitry and methods including a master counter providing...

Lockstep processing systems and methods

Consistency determination

Fail-safe clock monitor with fault injection

Timing-drift calibration

Error recovery within integrated circuit

Error recovery within integrated circuit

Method, and a synchronous digital circuit, for preventing propagati...

Clock jitter emulation

Programmable clock monitor

Frequency converter

Brushless motor drive device

Patents Applicationslast 30 patents

FAULT INTERFACE ARCHITECTURE IN SAFETY-RELEVANT SYSTEMS

METHOD AND APPARATUS FOR EARLY DETECTION OF SIGNAL EXCURSION OUT OF...

TIMING-DRIFT CALIBRATION

CLOCK DATA RECOVERY CIRCUIT

METHOD FOR MONITORING A CLOCK GENERATOR MODULE OF AN ELECTRONIC CIR...

QUADRATURE ERROR CORRECTION CIRCUIT AND MEMORY DEVICE HAVING THE SAME

METHOD AND SYSTEM FOR TRACING ERROR OF LOGIC SYSTEM DESIGN

FAILURE RECOVERY IN A SCALEOUT SYSTEM USING A MATRIX CLOCK

CLOCK SWITCHING METHOD, DEVICE, AND STORAGE MEDIUM

CLOCK DATA RECOVERY CIRCUIT

TIMING-DRIFT CALIBRATION

Heterogeneous Computing Systems and Methods for Clock Synchronization

CLOCK DATA RECOVERY CIRCUIT

CLOCK FREQUENCY COUNTING DURING HIGH-VOLTAGE OPERATIONS FOR IMMEDIA...

ROBUST SOFT ERROR TOLERANT MULTI-BIT D FLIP-FLOP CIRCUIT

TIMING-DRIFT CALIBRATION

Clock Recovery Using Between-Interval Timing Error Estimation

METHOD, CLOCK RECOVERY MODULE AS WELL AS COMPUTER PROGRAM FOR RECOV...

IPS SOC PLL MONITORING AND ERROR REPORTING

Communication Node for Critical Systems

COUNTER CIRCUITRY AND METHODS

Fail-Safe Clock Monitor with Fault Injection

LOCKSTEP PROCESSING SYSTEMS AND METHODS

REDUCING CHIP LATENCY AT A CLOCK BOUNDARY BY REFERENCE CLOCK PHASE...

Data Transmission Between Computation Units Having Safe Signaling T...

SIGNAL RECEIVING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF

Fault Tolerant Clock Monitor System

METHOD, AND A SYNCHRONOUS DIGITAL CIRCUIT, FOR PREVENTING PROPAGATI...

Voltage Reference Reconfiguration Fault-tolerant Control Method for...

TIMING-DRIFT CALIBRATION