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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

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G06F7/5318with column wise addition of partial products

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Patents Grantslast 30 patents

Information Patent Grant
In-memory computation circuit and method
- Patent number 12,164,882
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dadda architecture that scales with increasing operand size
- Patent number 12,056,460
- Issue date Aug 6, 2024
- International Business Machines Corporation
- Rajat Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-input configurable logic cell with configurable output region
- Patent number 12,008,337
- Issue date Jun 11, 2024
- OPPSTAR TECHNOLOGY SDN BHD
- Kim Pin Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for data placement for in-memory-compute
- Patent number 11,782,707
- Issue date Oct 10, 2023
- Samsung Electronics Co., Ltd.
- Krishna T. Malladi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full adder cell with improved power efficiency
- Patent number 11,294,631
- Issue date Apr 5, 2022
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for data placement for in-memory-compute
- Patent number 11,226,816
- Issue date Jan 18, 2022
- Samsung Electronics Co., Ltd.
- Krishna T. Malladi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full adder cell with improved power efficiency
- Patent number 11,169,779
- Issue date Nov 9, 2021
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 11,163,720
- Issue date Nov 2, 2021
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method of fast floating-point adder tree for neural n...
- Patent number 11,106,431
- Issue date Aug 31, 2021
- DINOPLUSAI HOLDINGS LIMITED
- Yutian Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device including an adder
- Patent number 11,042,359
- Issue date Jun 22, 2021
- Kabushiki Kaisha Toshiba
- Nobuaki Sakamoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable multiply-add array hardware
- Patent number 10,970,043
- Issue date Apr 6, 2021
- Alibaba Group Holding Limited
- Liang Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device and method for accelerating matrix multiply operations as a...
- Patent number 10,902,087
- Issue date Jan 26, 2021
- Advanced Micro Devices, Inc.
- Shaizeen Aga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable multiply-add array hardware
- Patent number 10,678,507
- Issue date Jun 9, 2020
- Alibaba Group Holding Limited
- Liang Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 10,289,605
- Issue date May 14, 2019
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 9,886,416
- Issue date Feb 6, 2018
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor executing super instruction matrix with register file con...
- Patent number 9,053,292
- Issue date Jun 9, 2015
- Soft Machines, Inc.
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multiply instructions in data processors
- Patent number 8,996,601
- Issue date Mar 31, 2015
- Advanced Micro Devices, Inc.
- Scott A. Hilker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing lossy integer multiplier synthesis
- Patent number 8,862,652
- Issue date Oct 14, 2014
- Imagination Technologies, Limited
- Theo Alan Drane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed-mode multiplier using hard and soft logic circuitry
- Patent number 8,856,201
- Issue date Oct 7, 2014
- Altera Corporation
- Martin Langhammer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Algorithm and architecture for multi-argument associative operation...
- Patent number 8,775,147
- Issue date Jul 8, 2014
- The MathWorks, Inc.
- Alireza Pakyari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of bypassing unrounded results in a multiply-add...
- Patent number 8,671,129
- Issue date Mar 11, 2014
- Oracle International Corporation
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication circuit and de/encryption circuit utilizing the same
- Patent number 8,443,032
- Issue date May 14, 2013
- National Tsing Hua University
- Chen Hsing Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Plural matrices of execution units for processing matrices of row d...
- Patent number 8,327,115
- Issue date Dec 4, 2012
- Soft Machines, Inc.
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier and cipher circuit
- Patent number 8,244,790
- Issue date Aug 14, 2012
- International Business Machines Corporation
- Akashi Satoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor core and multiplier that support both vector and single v...
- Patent number 8,234,326
- Issue date Jul 31, 2012
- MIPS Technologies, Inc.
- Chinh N. Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor core and multiplier that support a multiply and differenc...
- Patent number 8,229,991
- Issue date Jul 24, 2012
- MIPS Technologies, Inc.
- Chinh N. Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing processor instructions for ac...
- Patent number 8,213,606
- Issue date Jul 3, 2012
- Oracle America, Inc.
- Sheueling Chang Shantz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing processor instructions for ac...
- Patent number 8,194,855
- Issue date Jun 5, 2012
- Oracle America, Inc.
- Sheueling Chang Shantz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication circuitry
- Patent number 8,099,450
- Issue date Jan 17, 2012
- STMicroelectronics (Research & Development) Ltd
- Tariq Kurd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algorithm and architecture for multi-argument associative operation...
- Patent number 8,041,551
- Issue date Oct 18, 2011
- The MathWorks, Inc.
- Alireza Pakyari
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPERATION METHOD OF MULTIPLIER, ELECTRONIC DEVICE, AND STORAGE MEDIUM
- Publication number 20240361985
- Publication date Oct 31, 2024
- Beijing Horizon Information Technology Co., Ltd.
- Jinnan DING
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND ELECTRONIC DEVICE FOR HIGH PERFORMANCE MODULO MULTIPLIC...
- Publication number 20240361984
- Publication date Oct 31, 2024
- Samsung Electronics Co., Ltd.
- Sandesh Kanchodu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACHINE LEARNING OPTIMIZATION CIRCUIT AND METHOD THEREOF
- Publication number 20240281209
- Publication date Aug 22, 2024
- Delta Electronics, Inc.
- Chieh-Fu TSAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRO-PHOTONIC NETWORK FOR MACHINE LEARNING
- Publication number 20240280747
- Publication date Aug 22, 2024
- Celestial AI, Inc.
- Martinus Bos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRO-PHOTONIC NETWORK FOR MACHINE LEARNING
- Publication number 20240201436
- Publication date Jun 20, 2024
- Celestial AI Inc.
- Philip Winterbottom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK SIGNAL DISTRIBUTION USING PHOTONIC FABRIC
- Publication number 20240201437
- Publication date Jun 20, 2024
- Celestial AI Inc.
- Philip Winterbottom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCUMULATOR, MULTIPLIER, AND OPERATOR CIRCUIT
- Publication number 20240168714
- Publication date May 23, 2024
- Huawei Technologies Co., Ltd
- Tuanbao Fan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID ELECTRO-PHOTONIC NETWORK-ON-CHIP
- Publication number 20240111091
- Publication date Apr 4, 2024
- Celestial AI, Inc.
- Philip Winterbottom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DATA PLACEMENT FOR IN-MEMORY-COMPUTE
- Publication number 20240004646
- Publication date Jan 4, 2024
- Samsung Electronics Co., Ltd.
- Krishna T. Malladi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE ACCELERATOR FOR PERFORMING COMPUTATIONS OF DEEP NEURAL NET...
- Publication number 20230229505
- Publication date Jul 20, 2023
- DAEGU GYEONGBUK INSTITUTE OF SCIENCE & TECHNOLOGY
- Seock Hwan NOH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE LOGIC CELL
- Publication number 20230077881
- Publication date Mar 16, 2023
- OPPSTAR TECHNOLOGY SDN BHD
- Kim Pin Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FOLDING COLUMN ADDER ARCHITECTURE FOR DIGITAL COMPUTE IN MEMORY
- Publication number 20230031841
- Publication date Feb 2, 2023
- QUALCOMM Incorporated
- Mustafa BADAROGLU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL NEURAL NETWORK
- Publication number 20220405056
- Publication date Dec 22, 2022
- Celestial Al Inc.
- Philip Winterbottom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARTIFICIAL INTELLIGENCE ACCELERATORS
- Publication number 20220374690
- Publication date Nov 24, 2022
- SK HYNIX INC.
- Seong Ju LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED WALLACE TREES IN FMA CIRCUITS
- Publication number 20220365751
- Publication date Nov 17, 2022
- Intel Corporation
- Aditya Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING APPARATUS AND METHOD FOR VECTOR INNER PRODUCT, AND INTEGR...
- Publication number 20220366006
- Publication date Nov 17, 2022
- ANHUI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
- Yao ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DADDA ARCHITECTURE THAT SCALES WITH INCREASING OPERAND SIZE
- Publication number 20220357921
- Publication date Nov 10, 2022
- International Business Machines Corporation
- Rajat Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING APPARATUS AND METHOD FOR NEURAL NETWORK OPERATION, INTEGR...
- Publication number 20220350569
- Publication date Nov 3, 2022
- ANHUI CAMBRICON INFORMATION TECHNOLOGY CO., LTD.
- Yao ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DATA PLACEMENT FOR IN-MEMORY-COMPUTE
- Publication number 20220171620
- Publication date Jun 2, 2022
- Samsung Electronics Co., Ltd.
- Krishna T. Malladi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION CIRCUIT AND METHOD
- Publication number 20220019407
- Publication date Jan 20, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Der CHIH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR DATA PLACEMENT FOR IN-MEMORY-COMPUTE
- Publication number 20210247978
- Publication date Aug 12, 2021
- Samsung Electronics Co., Ltd.
- Krishna T. Malladi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULL ADDER CELL WITH IMPROVED POWER EFFICIENCY
- Publication number 20210124559
- Publication date Apr 29, 2021
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE
- Publication number 20200293283
- Publication date Sep 17, 2020
- ALIBABA GROUP HOLDING LIMITED
- Liang HAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20200285445
- Publication date Sep 10, 2020
- KABUSHIKI KAISHA TOSHIBA
- Nobuaki SAKAMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method of Fast Floating-Point Adder Tree for Neural N...
- Publication number 20200272417
- Publication date Aug 27, 2020
- DINOPLUSAI HOLDINGS LIMITED
- Yutian Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE AND METHOD FOR ACCELERATING MATRIX MULTIPLY OPERATIONS AS A...
- Publication number 20200133993
- Publication date Apr 30, 2020
- ADVANCED MICRO DEVICES, INC.
- Shaizeen Aga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
A CALCULATION DEVICE FOR ENCODED ADDITION
- Publication number 20200097256
- Publication date Mar 26, 2020
- Koninklijke Philips N.V.
- LEANDRO MARIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...
- Publication number 20190227982
- Publication date Jul 25, 2019
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE
- Publication number 20190196788
- Publication date Jun 27, 2019
- ALIBABA GROUP HOLDING LIMITED
- Liang HAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTIPLY INSTRUCTIONS IN DATA PROCESSORS
- Publication number 20130346463
- Publication date Dec 26, 2013
- Advanced Micro Devices, Inc.
- Scott A. Hilker
- G06 - COMPUTING CALCULATING COUNTING

with column wise addition of partial products

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

In-memory computation circuit and method

Dadda architecture that scales with increasing operand size

Multi-input configurable logic cell with configurable output region

Systems and methods for data placement for in-memory-compute

Full adder cell with improved power efficiency

Systems and methods for data placement for in-memory-compute

Full adder cell with improved power efficiency

Apparatus and method for processing an instruction matrix specifyin...

Apparatus and method of fast floating-point adder tree for neural n...

Semiconductor device including an adder

Programmable multiply-add array hardware

Device and method for accelerating matrix multiply operations as a...

Programmable multiply-add array hardware

Apparatus and method for processing an instruction matrix specifyin...

Apparatus and method for processing an instruction matrix specifyin...

Processor executing super instruction matrix with register file con...

Method and apparatus for multiply instructions in data processors

Method and apparatus for performing lossy integer multiplier synthesis

Mixed-mode multiplier using hard and soft logic circuitry

Algorithm and architecture for multi-argument associative operation...

System and method of bypassing unrounded results in a multiply-add...

Multiplication circuit and de/encryption circuit utilizing the same

Plural matrices of execution units for processing matrices of row d...

Multiplier and cipher circuit

Processor core and multiplier that support both vector and single v...

Processor core and multiplier that support a multiply and differenc...

Method and apparatus for implementing processor instructions for ac...

Method and apparatus for implementing processor instructions for ac...

Multiplication circuitry

Algorithm and architecture for multi-argument associative operation...

Patents Applicationslast 30 patents

OPERATION METHOD OF MULTIPLIER, ELECTRONIC DEVICE, AND STORAGE MEDIUM

METHODS AND ELECTRONIC DEVICE FOR HIGH PERFORMANCE MODULO MULTIPLIC...

MACHINE LEARNING OPTIMIZATION CIRCUIT AND METHOD THEREOF

ELECTRO-PHOTONIC NETWORK FOR MACHINE LEARNING

ELECTRO-PHOTONIC NETWORK FOR MACHINE LEARNING

CLOCK SIGNAL DISTRIBUTION USING PHOTONIC FABRIC

ACCUMULATOR, MULTIPLIER, AND OPERATOR CIRCUIT

HYBRID ELECTRO-PHOTONIC NETWORK-ON-CHIP

SYSTEMS AND METHODS FOR DATA PLACEMENT FOR IN-MEMORY-COMPUTE

HARDWARE ACCELERATOR FOR PERFORMING COMPUTATIONS OF DEEP NEURAL NET...

CONFIGURABLE LOGIC CELL

FOLDING COLUMN ADDER ARCHITECTURE FOR DIGITAL COMPUTE IN MEMORY

DIGITAL NEURAL NETWORK

ARTIFICIAL INTELLIGENCE ACCELERATORS

COMPRESSED WALLACE TREES IN FMA CIRCUITS

COMPUTING APPARATUS AND METHOD FOR VECTOR INNER PRODUCT, AND INTEGR...

DADDA ARCHITECTURE THAT SCALES WITH INCREASING OPERAND SIZE

COMPUTING APPARATUS AND METHOD FOR NEURAL NETWORK OPERATION, INTEGR...

SYSTEMS AND METHODS FOR DATA PLACEMENT FOR IN-MEMORY-COMPUTE

IN-MEMORY COMPUTATION CIRCUIT AND METHOD

SYSTEMS AND METHODS FOR DATA PLACEMENT FOR IN-MEMORY-COMPUTE

FULL ADDER CELL WITH IMPROVED POWER EFFICIENCY

PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE

SEMICONDUCTOR DEVICE

Apparatus and Method of Fast Floating-Point Adder Tree for Neural N...

DEVICE AND METHOD FOR ACCELERATING MATRIX MULTIPLY OPERATIONS AS A...

A CALCULATION DEVICE FOR ENCODED ADDITION

APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...

PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE

METHOD AND APPARATUS FOR MULTIPLY INSTRUCTIONS IN DATA PROCESSORS