with memory

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CPC
G06F15/7839

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F15/00Digital computers in general Data processing equipment in general

Current Industry

G06F15/7839with memory

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Baseboard management control device and control method thereof
- Patent number 12,353,347
- Issue date Jul 8, 2025
- Aspeed Technology Inc.
- Po-Wei Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Base plus offset addressing for load/store messages
- Patent number 12,333,310
- Issue date Jun 17, 2025
- Intel Corporation
- John Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implicit fence for write messages
- Patent number 12,321,310
- Issue date Jun 3, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Top level network and array level network for reconfigurable data p...
- Patent number 12,306,783
- Issue date May 20, 2025
- SambaNova Systems, Inc.
- Gregory Frederick Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller, storage device and test system
- Patent number 12,282,401
- Issue date Apr 22, 2025
- SK hynix Inc.
- Seung Hwa Baek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector population count determination via comparison iterations in...
- Patent number 12,242,848
- Issue date Mar 4, 2025
- Sanjay Tiwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitoring memory locations to identify whether data stored at the...
- Patent number 12,236,091
- Issue date Feb 25, 2025
- ARM Limited
- Matthew James Horsnell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lossless tiling in convolution networks—materialization of tensors
- Patent number 12,079,156
- Issue date Sep 3, 2024
- SambaNova Systems, Inc.
- Tejas Nagendra Babu Nama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post-manufacture latch timing control blocks in pipelined processors
- Patent number 12,050,485
- Issue date Jul 30, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Vivek Raj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods to configure front panel header
- Patent number 12,045,192
- Issue date Jul 23, 2024
- Lenovo (Singapore) Pte. Ltd.
- Robert J. Kapinos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Base plus offset addressing for load/store messages
- Patent number 12,014,183
- Issue date Jun 18, 2024
- Intel Corporation
- John Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 12,007,935
- Issue date Jun 11, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 11,954,063
- Issue date Apr 9, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic memory reconfiguration
- Patent number 11,954,062
- Issue date Apr 9, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lossless tiling in convolution networks-backward pass
- Patent number 11,934,343
- Issue date Mar 19, 2024
- SambaNova Systems, Inc.
- Tejas Nagendra Babu Nama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Assistance for hardware prefetch in cache access
- Patent number 11,934,342
- Issue date Mar 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction based control of memory attributes
- Patent number 11,899,614
- Issue date Feb 13, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance processor
- Patent number 11,797,474
- Issue date Oct 24, 2023
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20250173308
- Publication date May 29, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INITIALIZATION TECHNIQUES
- Publication number 20250156371
- Publication date May 15, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250117356
- Publication date Apr 10, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OFFLOADING FUNCTION STREAMS
- Publication number 20250110918
- Publication date Apr 3, 2025
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20250103548
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20250103546
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20250103547
- Publication date Mar 27, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE FOR IN-MEMORY COMPUTING
- Publication number 20250028674
- Publication date Jan 23, 2025
- Rain Neuromorphics Inc.
- Nawab Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES
- Publication number 20240330001
- Publication date Oct 3, 2024
- Intel Corporation
- John Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BASEBOARD MANAGEMENT CONTROL DEVICE AND CONTROL METHOD THEREOF
- Publication number 20240232116
- Publication date Jul 11, 2024
- ASPEED TECHNOLOGY INC.
- Po-Wei Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOSSLESS TILING IN CONVOLUTION NETWORKS - TILING CONFIGURATION BETW...
- Publication number 20240168913
- Publication date May 23, 2024
- SambaNova Systems, Inc.
- Tejas Nagendra Babu NAMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES
- Publication number 20240095038
- Publication date Mar 21, 2024
- Intel Corporation
- John Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...
- Publication number 20240086357
- Publication date Mar 14, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES
- Publication number 20240086356
- Publication date Mar 14, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE PROCESSOR
- Publication number 20240054097
- Publication date Feb 15, 2024
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR POPULATION COUNT DETERMINATION IN MEMORY
- Publication number 20230418606
- Publication date Dec 28, 2023
- Micron Technology, Inc.
- Sanjay Tiwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASIC POWER CONTROL
- Publication number 20230367738
- Publication date Nov 16, 2023
- BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC
- David D. MOSER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST-MANUFACTURE LATCH TIMING CONTROL BLOCKS IN PIPELINED PROCESSORS
- Publication number 20230341888
- Publication date Oct 26, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Vivek Raj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOP LEVEL NETWORK AND ARRAY LEVEL NETWORK FOR RECONFIGURABLE DATA P...
- Publication number 20230289310
- Publication date Sep 14, 2023
- SambaNova Systems, Inc.
- Gregory Frederick Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20230195685
- Publication date Jun 22, 2023
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS TO CONFIGURE FRONT PANEL HEADER
- Publication number 20230112370
- Publication date Apr 13, 2023
- LENOVO (SINGAPORE) PTE. LTD.
- Robert J. Kapinos
- G06 - COMPUTING CALCULATING COUNTING

with memory

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Baseboard management control device and control method thereof

Base plus offset addressing for load/store messages

Implicit fence for write messages

Top level network and array level network for reconfigurable data p...

Controller, storage device and test system

Vector population count determination via comparison iterations in...

Data initialization techniques

Monitoring memory locations to identify whether data stored at the...

Systems and methods for improving cache efficiency and utilization

Graphics processor data access and sharing

Multi-tile memory management

Cache structure and utilization

Systolic disaggregation within a matrix accelerator architecture

Multi-tile memory management

Compression techniques

Graphics processor operation scheduling for deterministic latency

Lossless tiling in convolution networks—materialization of tensors

Cache structure and utilization

Post-manufacture latch timing control blocks in pipelined processors

Systems and methods to configure front panel header

Base plus offset addressing for load/store messages

Multi-tile architecture for graphics operations

Graphics processors and graphics processing units having dot produc...

Multi-tile memory management for detecting cross tile access provid...

Graphics processors and graphics processing units having dot produc...

Dynamic memory reconfiguration

Lossless tiling in convolution networks-backward pass

Assistance for hardware prefetch in cache access

Instruction based control of memory attributes

High performance processor

Patents Applicationslast 30 patents

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

DATA INITIALIZATION TECHNIQUES

MULTI-TILE MEMORY MANAGEMENT

OFFLOADING FUNCTION STREAMS

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

CACHE STRUCTURE AND UTILIZATION

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

INSTRUCTION SET ARCHITECTURE FOR IN-MEMORY COMPUTING

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

MULTI-TILE MEMORY MANAGEMENT

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

BASEBOARD MANAGEMENT CONTROL DEVICE AND CONTROL METHOD THEREOF

DYNAMIC MEMORY RECONFIGURATION

LOSSLESS TILING IN CONVOLUTION NETWORKS - TILING CONFIGURATION BETW...

BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES

SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...

INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES

HIGH PERFORMANCE PROCESSOR

VECTOR POPULATION COUNT DETERMINATION IN MEMORY

ASIC POWER CONTROL

POST-MANUFACTURE LATCH TIMING CONTROL BLOCKS IN PIPELINED PROCESSORS

TOP LEVEL NETWORK AND ARRAY LEVEL NETWORK FOR RECONFIGURABLE DATA P...

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

SYSTEMS AND METHODS TO CONFIGURE FRONT PANEL HEADER