with variable precision

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CPC
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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

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G06F9/30014with variable precision

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Patents Grantslast 30 patents

Information Patent Grant
Computer processor for higher precision computations using a mixed-...
- Patent number 12,346,692
- Issue date Jul 1, 2025
- Intel Corporation
- Gregory Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic precision for neural network compute operations
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- Issue date Jul 1, 2025
- Intel Corporation
- Kamal Sinha
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Information Patent Grant
Streaming engine with separately selectable element and group dupli...
- Patent number 12,339,782
- Issue date Jun 24, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Entering protected pipeline mode with clearing
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- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Timothy D. Anderson
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Information Patent Grant
Generalized acceleration of matrix multiply accumulate operations
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- Issue date Jun 3, 2025
- NVIDIA Corporation
- Brent Ralph Boswell
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Information Patent Grant
Implicit fence for write messages
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- Issue date Jun 3, 2025
- Intel Corporation
- Joydeep Ray
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Information Patent Grant
Optimized compute hardware for machine learning operations
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- Issue date May 27, 2025
- Intel Corporation
- Dipankar Das
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Information Patent Grant
Streaming engine with stream metadata saving for context switching
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- Issue date May 13, 2025
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- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions for fused multiply-add operations with variable precis...
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- Issue date Apr 29, 2025
- Intel Corporation
- Dipankar Das
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Information Patent Grant
Supporting 8-bit floating point format operands in a computing arch...
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- Issue date Mar 4, 2025
- Intel Corporation
- Naveen Mellempudi
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Information Patent Grant
Data initialization techniques
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- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
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Information Patent Grant
Two address translations from a single table look-aside buffer read
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- Issue date Feb 25, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
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Information Patent Grant
BFLOAT16 fused multiply instructions
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- Issue date Feb 18, 2025
- Intel Corporation
- Alexander Heinecke
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Information Patent Grant
Decimal floating-point instruction in a round-for-reround mode
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- Eric Mark Schwarz
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Information Patent Grant
Methods and circuits of spatial alignment
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Information Patent Grant
Instructions and logic to perform floating point and integer operat...
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Information Patent Grant
Systems and methods for improving cache efficiency and utilization
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- Intel Corporation
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Information Patent Grant
Implicit global pointer relative addressing for global memory access
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- Issue date Jan 28, 2025
- MIPS Tech, LLC
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Information Patent Grant
Inserting predefined pad values into a stream of vectors
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- Issue date Jan 21, 2025
- Texas Instruments Incorporated
- Asheesh Bhardwaj
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Information Patent Grant
Graphics processor data access and sharing
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- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
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Information Patent Grant
Analytical platform for distributed data
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- Issue date Jan 14, 2025
- PagerDuty, Inc.
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Information Patent Grant
Multi-tile memory management
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- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
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Information Patent Grant
Concurrent multi-datatype execution within a processing resource
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- Issue date Dec 24, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
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Information Patent Grant
Minimization method, computer-readable storage medium, and minimiza...
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- Issue date Dec 17, 2024
- Honda Motor Co., Ltd.
- Hidekazu Shintani
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Information Patent Grant
Tracking streaming engine vector predicates to control processor ex...
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- Issue date Dec 10, 2024
- Texas Instruments Incorporated
- Duc Quang Bui
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Information Patent Grant
Cache structure and utilization
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- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
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Information Patent Grant
Compute optimizations for low precision machine learning operations
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- Issue date Nov 19, 2024
- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to perform floating point and integer operat...
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- Issue date Nov 12, 2024
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for performing instructions to convert to 16-bi...
- Patent number 12,131,154
- Issue date Oct 29, 2024
- Intel Corporation
- Alexander F. Heinecke
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR PIPELINE FOR DATA TRANSFER OPERATIONS
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- Akeana, Inc.
- Ricardo Ramirez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECIS...
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- Intel Corporation
- Dipankar DAS
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- Intel Corporation
- Alexander HEINECKE
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BLOCK NUMBER DOT PRODUCT
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- Publication date Jun 26, 2025
- Alexander Heinecke
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BLOCK NUMBER CONVERSION
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- Alexander Heinecke
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MACHINE LEARNING TRAINING ARCHITECTURE FOR PROGRAMMABLE DEVICES
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GRAPHICS PROCESSOR DATA ACCESS AND SHARING
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- Intel Corporation
- Altug Koker
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INSERTING PREDEFINED PAD VALUES INTO A STREAM OF VECTORS
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- TEXAS INSTRUMENTS INCORPORATED
- Asheesh Bhardwaj
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DATA INITIALIZATION TECHNIQUES
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- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Implicit Global Pointer Relative Addressing for Global Memory Access
- Publication number 20250130806
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- James Hippisley Robinson
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Arithmetic Circuit Design and Evaluation Using Backward Error Analysis
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COMPUTE OPTIMIZATIONS FOR LOW PRECISION MACHINE LEARNING OPERATIONS
- Publication number 20250117874
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- Intel Corporation
- Elmoustapha Ould-Ahmed-Vall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
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- Publication date Apr 10, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO CONVERT TO 16-BI...
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- Publication date Apr 10, 2025
- Intel Corporation
- Alexander F. HEINECKE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING 8-BIT FLOATING POINT FORMAT FOR PARALLEL COMPUTING AND S...
- Publication number 20250110741
- Publication date Apr 3, 2025
- Intel Corporation
- Jorge Eduardo Parra Osorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DETERMINISTIC SOLUTION FOR NON-DETERMINISTIC OPERATIONS
- Publication number 20250103329
- Publication date Mar 27, 2025
- Intel Corporation
- Sarang Akotkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
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- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
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Information Patent Application
CACHE STRUCTURE AND UTILIZATION
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- Intel Corporation
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TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...
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- TEXAS INSTRUMENTS INCORPORATED
- Duc Quang Bui
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SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
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- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...
- Publication number 20250094170
- Publication date Mar 20, 2025
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
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ANALYTICAL PLATFORM FOR DISTRIBUTED DATA
- Publication number 20250094402
- Publication date Mar 20, 2025
- PagerDuty, Inc.
- Christopher Phillip Bonnell
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Information Patent Application
PADDING IN A STREAM OF MATRIX ELEMENTS
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- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Son Hung Tran
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GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
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- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRECISION MODULATED SHADING
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- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- Junmo PARK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH DEFERRED EXCEPTION REPORTING
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- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM
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- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
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- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR ADDITION OF PARTIAL PRODUCTS
- Publication number 20250004763
- Publication date Jan 2, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20240427600
- Publication date Dec 26, 2024
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING

with variable precision

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Computer processor for higher precision computations using a mixed-...

Dynamic precision for neural network compute operations

Streaming engine with separately selectable element and group dupli...

Entering protected pipeline mode with clearing

Generalized acceleration of matrix multiply accumulate operations

Implicit fence for write messages

Optimized compute hardware for machine learning operations

Streaming engine with stream metadata saving for context switching

Instructions for fused multiply-add operations with variable precis...

Supporting 8-bit floating point format operands in a computing arch...

Data initialization techniques

Two address translations from a single table look-aside buffer read

BFLOAT16 fused multiply instructions

Decimal floating-point instruction in a round-for-reround mode

Methods and circuits of spatial alignment

Instructions and logic to perform floating point and integer operat...

Systems and methods for improving cache efficiency and utilization

Implicit global pointer relative addressing for global memory access

Inserting predefined pad values into a stream of vectors

Graphics processor data access and sharing

Analytical platform for distributed data

Multi-tile memory management

Concurrent multi-datatype execution within a processing resource

Minimization method, computer-readable storage medium, and minimiza...

Tracking streaming engine vector predicates to control processor ex...

Cache structure and utilization

Compute optimizations for low precision machine learning operations

Instructions and logic to perform floating point and integer operat...

Systolic disaggregation within a matrix accelerator architecture

Systems and methods for performing instructions to convert to 16-bi...

Patents Applicationslast 30 patents

PROCESSOR PIPELINE FOR DATA TRANSFER OPERATIONS

INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECIS...

BFLOAT16 FUSED MULTIPLY INSTRUCTIONS

BLOCK NUMBER DOT PRODUCT

BLOCK NUMBER CONVERSION

MACHINE LEARNING TRAINING ARCHITECTURE FOR PROGRAMMABLE DEVICES

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

INSERTING PREDEFINED PAD VALUES INTO A STREAM OF VECTORS

DATA INITIALIZATION TECHNIQUES

Implicit Global Pointer Relative Addressing for Global Memory Access

Arithmetic Circuit Design and Evaluation Using Backward Error Analysis

COMPUTE OPTIMIZATIONS FOR LOW PRECISION MACHINE LEARNING OPERATIONS

MULTI-TILE MEMORY MANAGEMENT

SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO CONVERT TO 16-BI...

SUPPORTING 8-BIT FLOATING POINT FORMAT FOR PARALLEL COMPUTING AND S...

SCALABLE DETERMINISTIC SOLUTION FOR NON-DETERMINISTIC OPERATIONS

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

CACHE STRUCTURE AND UTILIZATION

TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

INSTRUCTIONS AND LOGIC TO PERFORM FLOATING POINT AND INTEGER OPERAT...

ANALYTICAL PLATFORM FOR DISTRIBUTED DATA

PADDING IN A STREAM OF MATRIX ELEMENTS

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

PRECISION MODULATED SHADING

STREAMING ENGINE WITH DEFERRED EXCEPTION REPORTING

COMPUTE OPTIMIZATION MECHANISM

MULTI-TILE MEMORY MANAGEMENT

SYSTEMS, APPARATUSES, AND METHODS FOR ADDITION OF PARTIAL PRODUCTS

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF