Write using current through the cell

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G11C2013/0078Write using current through the cell

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Patents Grantslast 30 patents

Information Patent Grant
High-speed and large-current adjustable pulse circuit, operating ci...
- Patent number 12,224,006
- Issue date Feb 11, 2025
- Huazhong University of Science & Technology
- Xingsheng Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable resistance nonvolatile storage device and write method the...
- Patent number 12,190,950
- Issue date Jan 7, 2025
- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Ken Kawai
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell array circuit and method of forming the same
- Patent number 12,165,705
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-I Su
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level memory programming and readout
- Patent number 12,153,823
- Issue date Nov 26, 2024
- Intel Corporation
- Davide Fugazza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory having both volatile and non-volatile function...
- Patent number 12,148,472
- Issue date Nov 19, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-point array IHOLD read margin improvement
- Patent number 12,148,459
- Issue date Nov 19, 2024
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device and data writing method
- Patent number 12,100,448
- Issue date Sep 24, 2024
- Huawei Technologies Co., Ltd.
- Bin Gao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential programming of two-terminal resistive switching memory...
- Patent number 12,100,449
- Issue date Sep 24, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operating method thereof
- Patent number 12,087,361
- Issue date Sep 10, 2024
- Samsung Electronics Co., Ltd.
- Bilal Ahmad Janjua
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells with asymmetrical electrode interfaces
- Patent number 12,082,513
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming multi-level self-selecting memory cell
- Patent number 12,073,881
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry for parallel set and reset of resistive random-access mem...
- Patent number 12,068,028
- Issue date Aug 20, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell including programmable resistors with transistor compon...
- Patent number 12,051,466
- Issue date Jul 30, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for multi-level chalcogenide memory cell programming
- Patent number 12,033,695
- Issue date Jul 9, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random access memory device with three-dimensional cross-...
- Patent number 11,972,796
- Issue date Apr 30, 2024
- Kioxia Corporation
- Kikuko Sugimae
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for accessing resistive change elements operable as antifuses
- Patent number 11,972,830
- Issue date Apr 30, 2024
- Nantero, Inc.
- Jia Luo
- G11 - INFORMATION STORAGE
Information Patent Grant
Distinct chip identifier sequence utilizing unclonable characterist...
- Patent number 11,967,376
- Issue date Apr 23, 2024
- Crossbar, Inc.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with asymmetric bit-line architecture
- Patent number 11,963,369
- Issue date Apr 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hung-Li Chiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 11,948,636
- Issue date Apr 2, 2024
- Kioxia Corporation
- Yoshiki Kamata
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random access memory device
- Patent number 11,915,754
- Issue date Feb 27, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell programming that cancels threshold voltage drift
- Patent number 11,887,665
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Hari Giduturi
- G11 - INFORMATION STORAGE
Information Patent Grant
Low resistance crosspoint architecture
- Patent number 11,882,774
- Issue date Jan 23, 2024
- Micron Technology, Inc.
- Rajasekhar Venigalla
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-state programming of memory cells
- Patent number 11,869,588
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Stressing algorithm for solving cell-to-cell variations in phase ch...
- Patent number 11,862,244
- Issue date Jan 2, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jau-Yi Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance change memory cell circuits and methods
- Patent number 11,848,050
- Issue date Dec 19, 2023
- Hefei Reliance Memory Limited
- Brent Steven Haukness
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel drift cancellation
- Patent number 11,848,051
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for stabilizing cell threshold voltage
- Patent number 11,830,548
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Paolo Amato
- G11 - INFORMATION STORAGE
Information Patent Grant
Refresh operation of a memory cell
- Patent number 11,798,622
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Joemar Sinipete
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device including temperature compensation circuit
- Patent number 11,790,988
- Issue date Oct 17, 2023
- Samsung Electronics Co., Ltd.
- Ji-Hoon Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing circuitry for configuration and operation of cells and ar...
- Patent number 11,755,894
- Issue date Sep 12, 2023
- Cirrus Logic Inc.
- Gordon James Bates
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DATA WRITING OPERATION METHOD AND DEVICE FOR RESISTIVE RANDOM ACCES...
- Publication number 20250054544
- Publication date Feb 13, 2025
- XIAMEN INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
- Anqiao CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Memory Having Both Volatile and Non-Volatile Function...
- Publication number 20250037766
- Publication date Jan 30, 2025
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
- Publication number 20240404590
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH-SPEED AND LARGE-CURRENT ADJUSTABLE PULSE CIRCUIT, OPERATING CI...
- Publication number 20240371438
- Publication date Nov 7, 2024
- HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
- Xingsheng WANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL INCLUDING PROGRAMMABLE RESISTORS WITH TRANSISTOR COMPON...
- Publication number 20240355388
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE
- Publication number 20240260279
- Publication date Aug 1, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Li Chiang
- G11 - INFORMATION STORAGE
Information Patent Application
LOW RESISTANCE CROSSPOINT ARCHITECTURE
- Publication number 20240224825
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Rajasekhar Venigalla
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY DEVICE
- Publication number 20240153559
- Publication date May 9, 2024
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Yu-Der CHIH
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-STATE PROGRAMMING OF MEMORY CELLS
- Publication number 20240120006
- Publication date Apr 11, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
STRESSING ALGORITHM FOR SOLVING CELL-TO-CELL VARIATIONS IN PHASE CH...
- Publication number 20240087645
- Publication date Mar 14, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jau-Yi WU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME
- Publication number 20230377648
- Publication date Nov 23, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-I SU
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Memory Having Both Volatile and Non-Volatile Function...
- Publication number 20230343392
- Publication date Oct 26, 2023
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS
- Publication number 20230307045
- Publication date Sep 28, 2023
- Hefei Reliance Memory Limited
- Brent HAUKNESS
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME
- Publication number 20230253041
- Publication date Aug 10, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-I SU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL INCLUDING PROGRAMMABLE RESISTORS WITH TRANSISTOR COMPON...
- Publication number 20230253040
- Publication date Aug 10, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20230207007
- Publication date Jun 29, 2023
- Samsung Electronics Co., Ltd.
- Bilal Ahmad Janjua
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME
- Publication number 20230138802
- Publication date May 4, 2023
- Semiconductor Energy Laboratory Co., Ltd.
- Hideki Uochi
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY DEVICE
- Publication number 20230113903
- Publication date Apr 13, 2023
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Yu-Der CHIH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20230102229
- Publication date Mar 30, 2023
- KIOXIA Corporation
- Yoshiki KAMATA
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE RESISTANCE NONVOLATILE STORAGE DEVICE AND WRITE METHOD THE...
- Publication number 20230081445
- Publication date Mar 16, 2023
- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Ken KAWAI
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL DRIFT CANCELLATION
- Publication number 20230081492
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Application
ENCODING ADDITIONAL STATES IN A THREE-DIMENSIONAL CROSSPOINT MEMORY...
- Publication number 20230064007
- Publication date Mar 2, 2023
- Intel Corporation
- Rouhollah Mousavi Iraei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY DEVICE WITH THREE-DIMENSIONAL CROSS-...
- Publication number 20230024213
- Publication date Jan 26, 2023
- KIOXIA Corporation
- Kikuko SUGIMAE
- G11 - INFORMATION STORAGE
Information Patent Application
DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...
- Publication number 20230005538
- Publication date Jan 5, 2023
- CROSSBAR, INC.
- Sung Hyun Jo
- G11 - INFORMATION STORAGE
Information Patent Application
REFRESH OPERATION OF A MEMORY CELL
- Publication number 20220415395
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Joemar Sinipete
- G11 - INFORMATION STORAGE
Information Patent Application
STRESSING ALGORITHM FOR SOLVING CELL-TO-CELL VARIATIONS IN PHASE CH...
- Publication number 20220383952
- Publication date Dec 1, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jau-Yi WU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE
- Publication number 20220367569
- Publication date Nov 17, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Li Chiang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME
- Publication number 20220359010
- Publication date Nov 10, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-I SU
- G11 - INFORMATION STORAGE
Information Patent Application
PARALLEL DRIFT CANCELLATION
- Publication number 20220343978
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Application
REVERSIBLE RESISTIVE MEMORY LOGIC GATE DEVICE
- Publication number 20220310908
- Publication date Sep 29, 2022
- International Business Machines Corporation
- Hsueh-Chung Chen
- G11 - INFORMATION STORAGE

Write using current through the cell

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

High-speed and large-current adjustable pulse circuit, operating ci...

Variable resistance nonvolatile storage device and write method the...

Memory cell array circuit and method of forming the same

Multi-level memory programming and readout

Semiconductor memory having both volatile and non-volatile function...

Cross-point array IHOLD read margin improvement

Storage device and data writing method

Differential programming of two-terminal resistive switching memory...

Memory device and operating method thereof

Memory cells with asymmetrical electrode interfaces

Techniques for programming multi-level self-selecting memory cell

Circuitry for parallel set and reset of resistive random-access mem...

Memory cell including programmable resistors with transistor compon...

Techniques for multi-level chalcogenide memory cell programming

Resistive random access memory device with three-dimensional cross-...

Methods for accessing resistive change elements operable as antifuses

Distinct chip identifier sequence utilizing unclonable characterist...

Memory array with asymmetric bit-line architecture

Memory device

Resistive random access memory device

Memory cell programming that cancels threshold voltage drift

Low resistance crosspoint architecture

Three-state programming of memory cells

Stressing algorithm for solving cell-to-cell variations in phase ch...

Resistance change memory cell circuits and methods

Parallel drift cancellation

Systems and methods for stabilizing cell threshold voltage

Refresh operation of a memory cell

Nonvolatile memory device including temperature compensation circuit

Computing circuitry for configuration and operation of cells and ar...

Patents Applicationslast 30 patents

DATA WRITING OPERATION METHOD AND DEVICE FOR RESISTIVE RANDOM ACCES...

Semiconductor Memory Having Both Volatile and Non-Volatile Function...

TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING

HIGH-SPEED AND LARGE-CURRENT ADJUSTABLE PULSE CIRCUIT, OPERATING CI...

MEMORY CELL INCLUDING PROGRAMMABLE RESISTORS WITH TRANSISTOR COMPON...

MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE

LOW RESISTANCE CROSSPOINT ARCHITECTURE

RESISTIVE RANDOM ACCESS MEMORY DEVICE

THREE-STATE PROGRAMMING OF MEMORY CELLS

STRESSING ALGORITHM FOR SOLVING CELL-TO-CELL VARIATIONS IN PHASE CH...

MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME

Semiconductor Memory Having Both Volatile and Non-Volatile Function...

METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS

MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME

MEMORY CELL INCLUDING PROGRAMMABLE RESISTORS WITH TRANSISTOR COMPON...

MEMORY DEVICE AND OPERATING METHOD THEREOF

SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME

RESISTIVE RANDOM ACCESS MEMORY DEVICE

MEMORY DEVICE

VARIABLE RESISTANCE NONVOLATILE STORAGE DEVICE AND WRITE METHOD THE...

PARALLEL DRIFT CANCELLATION

ENCODING ADDITIONAL STATES IN A THREE-DIMENSIONAL CROSSPOINT MEMORY...

RESISTIVE RANDOM ACCESS MEMORY DEVICE WITH THREE-DIMENSIONAL CROSS-...

DISTINCT CHIP IDENTIFIER SEQUENCE UTILIZING UNCLONABLE CHARACTERIST...

REFRESH OPERATION OF A MEMORY CELL

STRESSING ALGORITHM FOR SOLVING CELL-TO-CELL VARIATIONS IN PHASE CH...

MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE

MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME

PARALLEL DRIFT CANCELLATION

REVERSIBLE RESISTIVE MEMORY LOGIC GATE DEVICE