Claims
- 1. A method of encoding data in a 144-bit data stream being transmitted in a computer system using a (146,130) error correcting code, comprising the steps of:generating two address parity bits from the system address of a 128 bit data word to be encoded; encoding 16 check bits into the data stream implementing a logic circuit based on a parity check matrix applied to said 128 bit data word and said address parity bits; storing said check bits and said data in the memory of a computer system, wherein said parity check matrix comprises: TABLE 1aData bits123456789101234567891111111111222222222233333333334 01234567890123456789012345678900000000000000000000000000000100011000001000000000000000000000000000001000010100100000000000000000000000000000010000101000000000000000000000000000000000110000010100010001000001011100100100010000000000001000100010000110001011001000100000000000010001000101001100000110010001000000000000100010001010011001001000100010000000000011100100010000001110000111000100010001001001001000100100100101010010001000100010000010010001001000001110100100010001000101000000100010010100001100001000100011100000101001000100010001000000100011100001010010110010001000100010010011001001000010100001100100010001000100100010000011000001010010001000100010001001000101000111213141516444444444555555555566666123456789012345678901234010010001000100010000001011001000100010001001001001100100010001000100100100100010001000100010010000000000000000000001000000000000000000000000100000000000000000000000010000000000000000000000001100000101110010010001000010000110001011001000100001010011000001100100010000101001100100100010001100010000001110000111000010001001001001010100100001000100100000111010010000100010010100001100001TABLE 1bData bits1718192021222324252666666777777777788888888889999999999111115678901234567890123456789012345678900000 012340001110010001000000111000011100010001000100100100100010010010010101001000100010001000001001000100100000111010010001000100010100000010001001010000110000100010001110000010100100010001000100000010001110000101001011001000100010001001001100100100001010000110010001000100010010001000001100000101001000100010001000100100010100000000000000000000000000000001000110000010000000000000000000000000000010000101001000000000000000000000000000000100001010000000000000000000000000000000001100000101000100010000010111001001000100000000000010001000100001100010110010001000000000000100010001010011000001100100010000000000001000100010100110010010001000100000000Data bits272829303132P0P11111111111111111111111111200000111111111122222222256789012345678901234567810000010111001001000100000010000110001011001000100100010100110000011001000100000010100110010010001000101100010000001110000111000010100010010010010101001001000100010010000011101001000000100010010100001100001000100100010001000100000010001100100010001000100100101001100100010001000100100001001000100010001000100101000000000000000000000100010000000000000000000000100010000000000000000000000100000000000000000000000000100
- 2. The method of claim 1, where encoding the check bits is performed with exclusive-or gates or exclusive-nor gates.
- 3. A method of correcting single 4-bit symbol errors and detecting double symbol errors in a 144-bit data stream being transmitted in a computer system using a (146,130) error correcting code, comprising the steps of:a) retrieving said check bits and a data word from the memory of a computer system; b) generating two address parity bits from the system address of the data word; c) decoding the data stream retrieved from memory implementing a logic circuit based on a parity check matrix applied to the data word and the address parity bits to produce a 16-bit syndrome, said parity check matrix comprising: TABLE 1aData bits123456789101112131415161234567891111111111222222222233333333334444444444555555555566666 01234567890123456789012345678901234567890123456789012340000000000000000000000000000100011000001010010001000100010000001000000000000000000000000000001000010100101100100010001000100100100000000000000000000000000000010000101000011001000100010001001000000000000000000000000000000000110000010100100010001000100010010100010001000001011100100100010000000000000000000000000000000100001000100010000110001011001000100000000000000000000000000000001000010001000101001100000110010001000000000000000000000000000000010000100010001010011001001000100010000000000000000000000000000000100011100100010000001110000111000100010001000001011100100100010001001001001000100100100101010010001000100010000110001011001000100010000010010001001000001110100100010001000101001100000110010001000101000000100010010100001100001000100010001010011001001000100011100000101001000100010001000000100011100100010000001110000111000001010010110010001000100010010011001001001000100100100101010010000010100001100100010001000100100010000010010001001000001110100101000001010010001000100010001001000101000000100010010100001100001TABLE 1bData bits17181920212223242526272829303132P0P16666677777777778888888888999999999911111111111111111111111111111125678901234567890123456789012345678900000000001111111111222222222 01234567890123456789012345678000111001000100000011100001110001000100010000010111001001000100000100100100100010010010010101001000100010001000011000101100100010010010000010010001001000001110100100010001000101001100000110010001000001010000001000100101000011000010001000100010100110010010001000101110000010100100010001000100000010001110010001000000111000011100001001010010110010001000100010010011001001001000100100100101010010010000101000011001000100010001001000100000100100010010000011101001000100000101001000100010001000100100010100000010001001010000110000100000000000000000000000000000010001100000101001000100010001000000100000000000000000000000000000001000010100101100100010001000100100101000000000000000000000000000000100001010000110010001000100010010000000000000000000000000000000000011000001010010001000100010001001010100010001000001011100100100010000000000000000000000000000000100010010001000100001100010110010001000000000000000000000000000000010001001000100010100110000011001000100000000000000000000000000000001000000100010001010011001001000100010000000000000000000000000000000100d) decoding said syndrome to determine if any errors occurred in the data stream by producing error indicators; and e) correcting from 1 to 4 bits of a single symbol in the data stream or signaling that an uncorrectable error has occurred based on decoding said error indicators and said syndrome.
RELATED APPLICATIONS
This application is a divisional of U.S. application Ser. No. 09/588,748, filed Jun. 6, 2000.
US Referenced Citations (20)