3881172

Information

• Patent Grant
• 3881172

• References
• Source

• Patent Number

  3,881,172

• Date Filed

  Not available

• Date Issued

  Tuesday, April 29, 1975
  49 years ago

• CPC

  • G06F9/4425 - Executing sub-programmes
  • G05B19/05 - Programmable logic controllers
  • G05B2219/1127 - Selector for I-O, multiplex for I-O
  • G05B2219/1159 - Image table, memory
  • G05B2219/1168 - Peak amplitude for input, nul amplitude for activating output
  • G05B2219/13016 - Jump while output is disabled, or disabling output when running test instruction
  • G05B2219/13128 - Relay ladder diagram, RLL RLD KOP

• US Classifications

  • 712 - Electrical computers and digital processing systems: processing architectures and instruction processing