Patent Application
20170069263
The present disclosure relates to a field of display technology, and more particular, to a pixel driving circuit, a pixel driving method for the same, and a display apparatus, which can improve a display quality by compensating a threshold voltage of a driving unit for a light emitting element.
Active matrix organic light emitting diodes (AMOLED) display becomes one of hot spots in a field of panel displays. Compared with liquid crystal displays (LCD), organic light emitting diodes (OLED) panel has advantages, such as, a lower power consumption, a lower cost, be capable of self-luminous, a broader view, a faster response and the like. Currently, conventional LCD displays in the display field such as mobile phones, PDAs, digital cameras and the like, have been replaced by AMOLED displays. Pixel driving is a core of AMOLED display and is of great importance.
Differently from a thin film transistor-liquid crystal display (TFT-LCD) which controls brightness by a stable current, the AMOLED is driven by a current, and thus needs a stable current to control light emission. As shown in
The light emission of the AMOLED is caused by the current generated when the driving thin film transistor (DTFT) is in a saturated state, irrespective of using a low temperature poly silicon (LTPS) process or a oxide process. Due to an unevenness of the process, threshold voltage difference at different locations of the driving thin film transistor may be generated, which will influence the consistency of the current driving device greatly. When inputting a same driving voltage, different threshold voltages will generate different driving currents, thereby leading to an inconsistency of the current passing through the OLED. This will further cause an unevenness brightness of the display, thereby affecting the displaying of a whole image.
Thus, there is a need for a method which can improve a consistency for driving currents of driving transistors so as to improve the display quality.
The present disclosure relates to a pixel driving circuit, a pixel driving method for the same, and a display apparatus, which can improve a display quality by compensating a threshold voltage of a driving unit for a light emitting element. The compensation can be implemented, irrespective of the threshold voltage of a driving unit being positive or negative.
According to an aspect of the present disclosure, a pixel driving circuit is provided for driving a light emitting element. The pixel driving circuit may comprise: a scanning line Scan, configured to provide a scanning signal Vscan; a power line, comprising a first power line ELVss and a second power line ELVdd, and configured to supply a power to the pixel driving circuit; and a data line, configured to provide a data signal Vdata; a reference signal line Ref, configured to provide a reference signal Vref; a first controlling signal line S1, configured to providing a first controlling signal Vs1; a second controlling signal line S2, configured to providing a second controlling signal Vs2; a third controlling signal line S3, configured to providing a third controlling signal Vs3; a resetting signal lineInt, configured to provide a resetting signal Vint; a driving unit 310, having an input terminal connected to an output terminal of a light emission controlling unit, a control terminal connected to a first intermediate node N1, an output terminal connected to a second intermediate node N2, wherein the light emitting element is connected between the second intermediate node and the first power line ELVss; the light emission controlling unit 330, having an input terminal connected to the second power line ELVdd, a control terminal connected to the first controlling signal line S1, and the output terminal connected to the input terminal of the driving unit; a compensating unit 340, having an input terminal connected to the first intermediate node N1, a control terminal connected to the second controlling signal line S2, and an output terminal connected to a third intermediate node N3; a storage unit 350, having a first terminal connected to the third intermediate node N3 and a second terminal connected to the second intermediate node N2; a charge controlling unit 320, having a first input terminal connected to the reference signal line Ref, a second input terminal connected to the data line Data, a control terminal connected to the scanning line Scan, a first output terminal connected to the first intermediate node N1 and a second output terminal connected to the third intermediate node N3; a resetting unit 360, having an input terminal connected to the resetting signal lineInt, a control terminal connected to the third controlling signal line S3, and an output terminal connected to the second intermediate node N2; wherein at an initializing phase for the pixel driving circuit, under the control of the scanning signal and the third controlling signal, the charge controlling unit is configured to connect the reference signal line Ref with the first intermediate node N1 and to connect the data line Data with the third intermediate node N3, and the resetting unit is configured to connect the resetting signalInt with the second intermediate node N2, so as to charge the storage unit via the data signal and the resetting signal and to turn on the driving unit; at a compensating phase for the pixel driving circuit, under the control of the scanning signal and the first controlling signal, the charge controlling unit is configured to connect the reference signal line Ref with the first intermediate node N1 and to connect the data line Data with the third intermediate node N3, so as to keep the driving unit being turned on, and the driving unit is configured to charge the second intermediate node N2 until the driving unit 310 is turned off; at a driving phase for the pixel driving circuit, under the first controlling signal and the second controlling signal, the compensating unit is configured to connect the first intermediate node N1 and the third intermediate node N3, so as to turn on the driving unit, such that the driving unit provides a driving current being independent of a threshold voltage of the driving unit 310 to the light emitting element.
In one implementation, the driving unit 310 may comprise a driving transistor T1, which has a gate connected to the first intermediate node N1, a first electrode connected to the output terminal of the light emission controlling unit, and a second electrode connected to the second intermediate node N2, wherein the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
In one implementation, the light emission unit 330 may comprise a third transistor T3, which has a gate connected to the first controlling signal line S1, a first electrode connected to the second power line ELVdd, and a second electrode connected to the input terminal of the driving unit, wherein the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
In one implementation, the compensating unit 340 may comprise a fourth transistor T4, which has a gate connected to the second controlling signal line S2, a first electrode connected to the first intermediate node N1 and a second electrode connected to the third intermediate node N3, wherein the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
In one implementation, the storage unit may comprise a storage capacitor.
In one implementation, the charge controlling unit 320 may comprise a second transistor and a fifth transistor, wherein the second transistor has a gate connected to the scanning line Scan, a first electrode connected to the reference signal line Ref and a second electrode connected to the first intermediate node N1; and the fifth transistor has a gate connected to the scanning line Scan, a first electrode connected to the data line Data and a second electrode connected to the third intermediate node N3, wherein the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
In one implementation, the resetting unit 360 may comprise a sixth transistor T6, which has a gate connected to the third controlling signal line S3, a first electrode connected to the resetting signal lineInt and a second electrode connected to the second intermediate node N2, wherein the first electrode is one of a source and a drain, and the second electrode is the other of the source and the drain.
In one implementation, each of the driving transistor, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor may be a P-type thin film transistor or a N-type thin film transistor.
According to a second aspect of the present disclosure, a pixel driving method which is applicable to the pixel driving circuit discussed above is provided. The pixel driving method may comprise: providing the scanning signal through the scanning line, providing the data signal through the data line, and providing the third controlling signal through the third controlling signal line, so as to enable the pixel driving circuit to enter the initializing phase; providing the scanning signal through the scanning line, providing the data signal through the data line, and providing the first controlling signal through the first controlling signal line, so as to enable the pixel driving circuit to enter the compensating phase; and providing the first controlling signal through the first controlling signal line and providing the second controlling signal through the second controlling signal line, so as to enable the pixel driving circuit to enter the driving phase.
According to a third aspect of the present disclosure, a display apparatus comprising the pixel driving circuit discussed above is provided.
The above and other objectives, features and advantages will be obvious by illustrating the preferred embodiments of the present disclosure with reference to the drawing, in which:
In the following, embodiments of the present disclosure will be described in detail with reference to the drawings. Hereinafter, the specific embodiments are only intended to illustrate the disclosure, which should be construed as examples of the disclosure, rather than to limit it. Functions or elements known in the related art are not described in detail when they would obscure the disclosure with unnecessary detail.
In
In
At an initializing phase for the pixel driving circuit 300, under the control of the scanning signal and the third controlling signal, the charge controlling unit 320 is configured to connect the reference signal line Ref with the first intermediate node N1 and to connect the data line Data with the third intermediate node N3, and the resetting unit 360 is configured to connect the resetting signalInt with the second intermediate node N2, so as to charge the storage unit 350 via the data signal and the resetting signal and to turn on the driving unit 310.
At a compensating phase for the pixel driving circuit 300, under the control of the scanning signal and the first controlling signal, the charge controlling unit 320 is configured to connect the reference signal line Ref with the first intermediate node N1 and to connect the data line Data with the third intermediate node N3, so as to keep the driving unit 310 be turned on, and the driving unit 310 is configured to charge the second intermediate node N2 until the driving unit 310 is turned off.
At a driving phase for the pixel driving circuit 300, under the first controlling signal and the second controlling signal, the compensating unit 340 is configured to connect the first intermediate node N1 and the third intermediate node N3, so as to turn on the driving unit 310, such that the driving unit 310 provides a driving current being independent of a threshold voltage of the driving unit 310 to the light emitting element 3000.
As shown in
Similarly with the pixel driving circuit 300 shown in
As shown in
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Each of the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 shown in
At the first phase T1, it is an initializing phase. At this phase, the scanning signal Vscan provided by the scanning line Scan is at a high level, and the third controlling signal VS3 provided by the third controlling signal line S3 is also at a high level. ELVss is at a high level. Thus, transistors T2, T5 and T6 are turned on. Since the signals VS2, VS2 provided by the first controlling signal line S1 and the second controlling signal line S2 are at a low level, the transistors T3 and T4 are turned off. At this time, the level of the reference signal provided by the reference signal line Ref is written into the gate of the driving transistor T1, and the data voltage is written into one end of the storage capacitor C, i.e. V_N1=Vdata, and the resetting signal is written into the other end of the storage capacitor C, i.e. V_N2=Vint. In other words, the voltage at the source of the driving transistor T1 is Vint. Thus, a difference between the voltage at the gate and the voltage at the drain of the driving transistor T1 is Vref−Vint>Vth, and the driving transistor T1 is accordingly turned on. Since the signal ELVss is at a high level at this time, and the high level of ELVss is higher than Vint as described above, OLED is at inverting connection, and will emit no light.
At the second phase T2, it is a compensating phase. At this phase, the scanning signal Vscan provided by the scanning line Scan is at a high level, and the first controlling signal VS1 provided by the first controlling signal line S1 is also at a high level. ELVss is at a high level. The transistors T2 and T5 are still turned on. Thus, the Vref is still written into the gate of the driving transistor T1, and the one end of the storage capacitor is maintained at the data voltage, i.e. V_N1=Vdata. Since the first controlling signal VS1 is at a high level, the transistor T3 is turned on. Meanwhile the transistor T6 is turned off, since the third controlling signal VS3 is at a low level. In view of above, the driving transistor T1 is turned on at this time, and it will charge the second intermediate node N2 until the voltage V_N2 at N2 is equal to Vref−Vth, i.e. V_N2=Vref−Vth. The voltage cross two ends of the storage capacitor C is V_N1N2=Vdata−(Vref−Vth)=Vdata−Vref+Vth. Since the ELVss is at a high level at this time, and the high level of ELVss is higher than Vref−Vth as described above, OLED is at inverting connection, and will emit no light. According to the above description, it is known that the driving transistor T1 is turned on to store the threshold voltage at this phase, irrespective of the threshold voltage of the driving transistor T1 being positive or negative.
At the third phase T3, it is a driving phase. At this phase, the first controlling signal VS1 provided by the first controlling signal line S1 and the second controlling signal VS2 provided by the second controlling signal line S2 are both at a high level. ELVss is at a low level. The transistors T3 and T4 are turned on. Since the scanning signal Vscan and the third controlling signal VS3 are both at a low level, the transistors T2, T5 and T6 are turned off. At this time, the difference between the voltage at the gate and the voltage at the drain of the driving transistor T1 is kept as a value at an end of the second phase T2, i.e. Vgs=V_N1N2=Vdata−Vref+Vth. Furthermore, since a value obtained by subtracting the threshold voltage Vth from the gate-source voltage Vgs of the driving transistor T1 is smaller than or equal to the drain-source voltage Vds of the driving transistor T1, i.e. Vgs−Vth≦Vds, the driving transistor T1 is in a saturated turning on state, wherein the current provided to the light emitting element OLED depends on the gate-source voltage Vgs of the driving transistor. In particular, I=K(Vgs−Vth) ̂2=K(Vdata−Vref+Vth−Vth) ̂2=K(Vdata−Vref) ̂2, wherein K is a constant related to process parameters and physical dimensions of the driving transistor T1.
It is seen that the light emission current for driving the OLED only relates to the reference voltage Vref and the data voltage Vdata, and is independent of the threshold voltage Vth for the driving transistor.
At the subsequent phases, each controlling signal is the same as the controlling signal at the phase T3. Accordingly, OLED keeps in emitting light until a high level scanning signal is received again.
Although specific structures of the driving unit, the charge controlling unit, the light emission controlling unit, a compensating unit, a storage unit and a resetting unit are illustrated in
In particular, with reference to the pixel driving circuit shown in
The present disclosure may further provide a display apparatus comprising the above pixel driving circuit, the detailed description of which has been described in the above embodiments, and the same content will no longer be repeated.
It should be noted that the present disclosure is exemplarily illustrated in the above description, which is not intended to limit the disclosure to the above steps and structures. One or more steps and structures can be modified or omitted if it is necessary. Thus, some of the steps or units are not essential elements for implementing the inventive concept of the present disclosure. Thus, the essential features of this disclosure only limit to a minimum requirement for implementing the inventive concept of the present disclosure, and are not defined by the specific implementations discussed above.
The present disclosure has been illustrated in combination with the preferred embodiments. It is understood that those skilled in the art can make various modifications and variations to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, the scope of the present disclosure is not limited to the above embodiments, and it is defined by the attached claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201410799222.4 | Dec 2014 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2015/082490 | 6/26/2015 | WO | 00 |
