The present disclosure relates to acoustic wave devices each including a piezoelectric layer including lithium niobate or lithium tantalate, and methods of manufacturing acoustic wave devices.
Japanese Unexamined Patent Application Publication No. 2012-257019 describes an acoustic wave device.
In the case where the acoustic wave device is in wafer-level packaging by covering an electrode with a Si substrate (second substrate), a through-hole is formed in the Si substrate (second substrate) and the electrode is extended via the through-hole. Since the Si substrate (second substrate) has a first surface facing the electrode and a second surface facing the opposite side, conventionally, the through-hole is formed from the second surface of the Si substrate (second substrate) by dry etching. In addition, in the dry etching, the etching time is adjusted while detecting the position of the bottom surface of the through-hole by emission spectrometry. Therefore, the shape and depth of the through-hole vary.
Example embodiments of the present invention provide acoustic wave devices and methods for manufacturing same, in each of which, a shape and a depth of a through-hole are stabilized.
An acoustic wave device according to an aspect of an example embodiment of the present invention includes a first substrate, a piezoelectric layer including one main surface and another main surface facing a thickness direction of the first substrate, the one main surface facing the first substrate, a functional electrode provided on at least one of the one main surface and the another main surface of the piezoelectric layer, a second substrate including a first main surface and a second main surface facing the thickness direction and a through-hole penetrating from the first main surface to the second main surface, the first main surface facing the another main surface of the piezoelectric layer, a via electrode in the through-hole, a wiring layer between the piezoelectric layer and the second substrate and electrically connecting the functional electrode and the via electrode, and an etching stop layer between the via electrode and the wiring layer, in which the etching stop layer includes a metal material with an etching rate lower than an etching rate of the second substrate.
An acoustic wave device according to another aspect of an example embodiment of the present invention includes a first substrate, a piezoelectric layer including one main surface and another main surface facing a thickness direction of the first substrate, the one main surface facing the first substrate, a functional electrode provided on at least one of the one main surface and the another main surface of the piezoelectric layer, a second substrate being a silicon substrate and including a first main surface and a second main surface facing the thickness direction and a through-hole penetrating from the first main surface to the second main surface, the first main surface facing the another main surface of the piezoelectric layer, a via electrode in the through-hole, a wiring layer between the piezoelectric layer and the second substrate and electrically connecting the functional electrode and the via electrode, and an etching stop layer between the via electrode and the wiring layer, in which a metal material of the etching stop layer is any one of Ti, AlCu, Pt, or Cu.
A method of manufacturing an acoustic wave device according to another aspect of an example embodiment of the present invention includes forming a through-hole in an object by dry etching, in which the object includes a first substrate, a piezoelectric layer including one main surface and another main surface facing a thickness direction of the first substrate, the one main surface facing the first substrate, a functional electrode provided on at least one of the one main surface and the another main surface of the piezoelectric layer, a second substrate including a first main surface and a second main surface facing the thickness direction, the first main surface facing the another main surface of the piezoelectric layer, a wiring layer between the piezoelectric layer and the second substrate, and an etching stop layer between the wiring layer and the first main surface and including a metal material with an etching rate lower than an etching rate of the second substrate, and the through-hole is formed in the second main surface of the second substrate to at least partially overlap the etching stop layer in plan view.
A method of manufacturing an acoustic wave device according to another aspect of an example embodiment of the present invention includes forming a through-hole in an object by dry etching, in which the object includes a first substrate, a piezoelectric layer including one main surface and another main surface facing a thickness direction of the first substrate, the one main surface facing the first substrate, a functional electrode provided on at least one of the one main surface and the another main surface of the piezoelectric layer, a second substrate including a first main surface and a second main surface facing the thickness direction, the first main surface facing the another main surface of the piezoelectric layer, a wiring layer between the piezoelectric layer and the second substrate, and an etching stop layer arranged between the wiring layer and the first main surface and including a metal material of any of Ti, AlCu, Pt, or Cu, and the through-hole is formed in the second main surface of the second substrate to at least partially overlap the etching stop layer in plan view.
According to example embodiments of the present disclosure, the shape and depth of the through-hole are stabilized.
Hereinafter, example embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the present disclosure is not limited to the example embodiments. Note that each example embodiment described in the present disclosure is merely an example, and in modifications and second and subsequent example embodiments in which partial replacement or combination of configurations is possible between different example embodiments, description of matters common to the first example embodiment will be omitted, and only different points will be described. In particular, similar effects of similar configurations will not be described in each example embodiment.
In detail, as illustrated in
Here, the electrode 3 is an example of a “first electrode”, and the electrode 4 is an example of a “second electrode”. In
The electrode 3 and the electrode 4 have a rectangular or substantially rectangular shape and a length direction. The electrode 3 and the electrode 4 adjacent to the electrode 3 face each other in a direction perpendicular or substantially perpendicular to the length direction. The plurality of electrodes 3 and 4 and the first and second busbars 5 and 6 define interdigital transducer (IDT) electrodes.
The length direction of the electrodes 3 and 4 and the direction perpendicular or substantially perpendicular to the length direction of the electrodes 3 and 4 are each directions intersecting the thickness direction of the piezoelectric layer 2. Therefore, it can be said that the electrode 3 and the electrode 4 adjacent to the electrode 3 face each other in a direction intersecting the thickness direction of the piezoelectric layer 2. In addition, the length direction of the electrodes 3 and 4 may be exchanged with the direction perpendicular or substantially perpendicular to the length direction of the electrodes 3 and 4 illustrated in
A plurality of pairs of structures each having the electrode 3 connected to one potential and the electrode 4 connected to the other potential adjacent to each other is provided in a direction perpendicular or substantially perpendicular to the length direction of the electrode 3 and the electrode 4. Here, the electrode 3 and the electrode 4 being adjacent to each other does not mean the case where the electrode 3 and the electrode 4 are arranged so as to be in direct contact with each other, but means the case where the electrode 3 and the electrode 4 are arranged with a gap therebetween. In addition, when the electrode 3 and the electrode 4 are adjacent to each other, no electrode connected to a hot electrode or a ground electrode, including the other electrodes 3 and 4, is arranged between the electrode 3 and the electrode 4. The number of pairs is not necessary an integer pair, and may be 1.5 pairs, 2.5 pairs, or the like.
The center-to-center distance between the electrode 3 and the electrode 4, that is, the pitch is preferably in the range of equal to or more than about 1 μm and equal to or less than about 10 μm, for example. In addition, the center-to-center distance between the electrode 3 and the electrode 4 is a distance between the center of the width dimension of the electrode 3 in the direction perpendicular or substantially perpendicular to the length direction of the electrode 3 and the center of the width dimension of the electrode 4 in the direction perpendicular or substantially perpendicular to the length direction of the electrode 4.
Further, when at least one of the electrode 3 and the electrode 4 is provided in plural number (there are 1.5 or more pairs of electrode sets when the electrodes 3 and 4 are provided as a pair of electrode sets), the center-to-center distance between the electrode 3 and the electrode 4 refers to the average value of the center-to-center distances between the adjacent electrodes 3 and 4 among the 1.5 or more pairs of electrodes 3 and 4.
In addition, the widths of the electrodes 3 and 4, that is, the dimensions of the electrodes 3 and 4 in a facing direction are preferably in the range of equal to or more than about 150 nm and equal to or less than about 1000 nm, for example. Note that the center-to-center distance between the electrode 3 and the electrode 4 is a distance between the center of the dimension (width dimension) of the electrode 3 in the direction perpendicular or substantially perpendicular to the length direction of the electrode 3 and the center of the dimension (width dimension) of the electrode 4 in the direction perpendicular or substantially perpendicular to the length direction of the electrode 4.
Additionally, in the present example embodiment, since the Z-cut piezoelectric layer is used, the direction perpendicular or substantially perpendicular to the length direction of the electrode 3 and the electrode 4 is a direction perpendicular or substantially perpendicular to a polarization direction of the piezoelectric layer 2. This is not the case when a piezoelectric material having a different cut angle is used as the piezoelectric layer 2. Here, the term “perpendicular” is not limited to the case of being strictly perpendicular, and may be substantially perpendicular (the angle defined by the direction perpendicular or substantially perpendicular to the length direction of the electrodes 3 and 4 and the polarization direction is, for example, about 90°±10°).
A support 8 is laminated on the one main surface 2b side of the piezoelectric layer 2 with an insulating layer 7 interposed therebetween. The insulating layer 7 and the support 8 have a frame shape, and have opening portions 7a and 8a as illustrated in
The cavity portion 9 is provided so as not to hinder the vibration of an excitation region C of the piezoelectric layer 2. Therefore, the above support 8 is laminated on the one main surface 2b with the insulating layer 7 interposed therebetween at a position not overlapping the portion where at least the pair of electrodes 3 and 4 are provided. Note that the insulating layer 7 need not be provided. Therefore, the support 8 can be laminated directly or indirectly on the one main surface 2b of the piezoelectric layer 2.
The insulating layer 7 is made of silicon oxide. However, in addition to silicon oxide, an appropriate insulating material such as silicon oxynitride or alumina can be used. The support 8 is made of Si. The plane orientation of Si in the surface on the piezoelectric layer 2 side may be (100), (110), or (111). Preferably, Si having a high resistance of equal to or more than about 4 kΩ is desirable.
However, also the support 8 may be made of an appropriate insulating material or semiconductor material. As the material of the support 8, for example, a piezoelectric material such as aluminum oxide, lithium tantalate, lithium niobate, or quartz, various ceramics such as alumina, magnesia, sapphire, silicon nitride, aluminum nitride, silicon carbide, zirconia, cordierite, mullite, steatite, or forsterite, a dielectric material such as diamond or glass, or a semiconductor such as gallium nitride can be used.
The plurality of electrodes 3 and 4, the first busbar 5, and the second busbar 6 described above are made of an appropriate metal or alloy such as Al or an AlCu alloy. In the present example embodiment, the electrodes 3 and 4, the first busbar 5, and the second busbar 6 have a structure in which an Al film is laminated on a Ti film. Note that an adhesion layer other than the Ti film may be used.
In driving, an AC voltage is applied between the plurality of electrodes 3 and the plurality of electrodes 4. More specifically, an AC voltage is applied between the first busbar 5 and the second busbar 6. Thus, it is possible to obtain resonance characteristics using a bulk wave in the first-order thickness-shear mode excited in the piezoelectric layer 2.
Additionally, in the acoustic wave device 1, d/p is equal to or less than about 0.5, for example, when d is the thickness of the piezoelectric layer 2, and p is the center-to-center distance between any adjacent electrodes 3 and 4 among the plurality of pairs of electrodes 3 and 4. Therefore, the above bulk wave of the first-order thickness-shear mode is effectively excited, and favorable resonance characteristics can be obtained. More preferably, d/p is equal to or less than about 0.24, for example, and in this case, even more favorable resonance characteristics can be obtained.
Note that in the case where at least one of the electrodes 3 and 4 is provided in plural number as in the present example embodiment, that is, there are 1.5 or more pairs of electrode 3 and 4 sets when the electrodes 3 and 4 are provided as a pair of electrode sets, the center-to-center distance p between the adjacent electrodes 3 and 4 is the average distance of the center-to-center distances between the respective adjacent electrodes 3 and 4.
Since the acoustic wave device 1 of the present example embodiment has the above-described configuration, even when the number of pairs of the electrodes 3 and 4 is reduced in order to achieve miniaturization, the Q value is unlikely to be reduced. This is because the resonator does not require reflectors on both sides and has a small propagation loss. In addition, the reflector is not required because the bulk wave in the first-order thickness-shear mode is used. The difference between the Lamb wave used in the existing acoustic wave device and the bulk wave in the first-order thickness-shear mode will be described with reference to
In contrast, as illustrated in
Note that as illustrated in
As described above, in the acoustic wave device 1, at least one pair of electrodes including the electrode 3 and the electrode 4 is arranged, but since the acoustic wave device 1 does not propagate a wave in the X direction, the number of pairs of electrodes including the electrodes 3 and 4 is not necessary plural. That is, it is sufficient that at least one pair of electrodes is provided.
For example, the electrode 3 is an electrode connected to a hot potential, and the electrode 4 is an electrode connected to a ground potential. However, the electrode 3 may be connected to the ground potential, and the electrode 4 may be connected to the hot potential. In the present example embodiment, as described above, at least one pair of electrodes includes an electrode connected to the hot potential or an electrode connected to the ground potential, and no floating electrode is provided.
Note that the length of the excitation region C is a dimension of the excitation region C along the length direction of the electrode 3 and the electrode 4. In the present example embodiment, the inter-electrode distances of the electrode pairs each including the electrode 3 and the electrode 4 were made all equal in the plurality of pairs. That is, the electrodes 3 and the electrodes 4 were arranged at an equal pitch.
As is clear from
As described above, in the present example embodiment, d/p is equal to or less than about 0.5, and more preferably equal to or less than about 0.24, for example, when d is the thickness of the piezoelectric layer 2 and p is the center-to-center distance between the electrode 3 and the electrode 4. This will be described with reference to
A plurality of acoustic wave devices was obtained in the same manner as the acoustic wave device having the resonance characteristics illustrated in
As is clear from
Note that as described above, at least one pair of electrodes may be one pair, and the above p is defined as the center-to-center distance between the adjacent electrodes 3 and 4 in the case of one pair of electrodes. Additionally, in the case of equal to or more than 1.5 pairs of electrodes, the average distance of the center-to-center distances between the adjacent electrodes 3 and 4 may be p. In addition, when the piezoelectric layer 2 has a variation in thickness, the thickness d of the piezoelectric layer may be obtained from the average value of the thicknesses.
In the acoustic wave device 1, preferably, it is desirable that the metallization ratio MR of the adjacent electrodes 3 and 4 with respect to the excitation region, which is a region where any adjacent electrodes 3 and 4 among the plurality of electrodes 3 and 4 overlap each other when viewed in a direction in which the adjacent electrodes 3 and 4 face each other, satisfy MR about 1.75 (d/p)+0.075, for example. In this case, spurious emission can be effectively reduced. This will be described with reference to
The metallization ratio MR will be explained with reference to
The area of the electrodes 3 and 4 in the excitation region C with respect to the area of the excitation region is the metallization ratio MR. That is, the metallization ratio MR is the ratio of the area of the metallization portion with respect to the area of the excitation region. Note that when a plurality of pairs of electrodes is provided, the ratio of the metallization portions included in the entire excitation region with respect to the total area of the excitation regions may be defined as MR.
In the region surrounded by an ellipse J in
(0°±10°, 0° to 20°, arbitraryψ) Expression (1)
(0°±10°, 20° to 80°, 0° to 60°(1−(θ−50)2/900)1/2) or (0°±10°, 20° to 80°, [180°−60°(1−(θ−50)2/900)1/2] to 180°) Expression (2)
(0°±10°, [180°−30°(1−(ψ−90)2/8100)1/2] to 180°, arbitraryψ) Expression (3)
Therefore, the fractional bandwidth can be sufficiently increased when the Euler angles satisfy the above Expression (1), Expression (2), or Expression (3), which is preferable. The basic configuration of the acoustic wave device has been described above, but the present disclosure may be applied to an acoustic wave device 81 of the following modification.
In
In the acoustic wave device 81, an alternating electric field is applied to the IDT electrode 84 on the cavity portion 9, and thus a Lamb wave as a plate wave is excited. Since the reflector 85 and the reflector 86 are provided on both sides, the resonance characteristics by the above Lamb wave can be obtained. As described above, the acoustic wave device of the present disclosure may use a plate wave. Next, the acoustic wave device of the present example embodiment will be described in detail.
The first substrate 8A is obtained by cutting the support 8 (see
The insulating layer 7 (see
The functional electrode 84A is the IDT electrode 84 (see
The wiring layer 20 is arranged between the piezoelectric layer 2 and the second substrate 50. The wiring layer 20 electrically connects the functional electrode 84A and the via electrode 52. The wiring layer 20 includes an intermediate wiring layer 21, a second wiring layer 22, and a first wiring layer 23 that are laminated in order from the first thickness direction Z1. In other words, the wiring layer 20 includes the first wiring layer 23, the second wiring layer 22, and the intermediate wiring layer 21 that are laminated in order from the second substrate 50 side. The intermediate wiring layer 21 is electrically connected to the first busbar 84a and the second busbar 84b (see
The second wiring layer 22 is an Au layer. The first wiring layer 23 includes a plurality of layers made of different metals, and in the present example embodiment, the first wiring layer 23 includes a Ti layer, a Pt layer, and an Au layer that are laminated in order from the via electrode side (the second thickness direction Z2). In addition, the second wiring layer 22 is formed on the first substrate 8A side, and the first wiring layer 23 is formed on the second substrate 50 side. When the first substrate 8A and the second substrate 50 are bonded to each other, the Au layer of the second wiring layer 22 and the Au layer of the first wiring layer 23 are bonded to each other (Au—Au bonding).
The second substrate 50 is a silicon substrate made of Si. The second substrate 50 has a first main surface 50a and a second main surface 50b facing the thickness direction, and a through-hole 51 penetrating from the first main surface 50a to the second main surface 50b. The first main surface 50a faces the first thickness direction Z1. The second main surface 50b faces the second thickness direction Z2.
The through-hole 51 overlaps the wiring layer 20 when viewed from the thickness direction. An insulating layer 54 is provided in a side surface 51a of the through-hole 51. The insulating layer 54 is a silicon oxide film made of Si. In addition, the insulating layer 54 is provided on the second main surface 50b of the second substrate 50, the side surface of an under bump metal 56, and the edge portion of the surface of the under bump metal 56 in the second thickness direction Z2.
The via electrode 52 is arranged in the through-hole 51. The via electrode 52 overlaps the wiring layer 20 (first wiring layer 23) when viewed from the thickness direction. The etching stop layer 25 is arranged between the via electrode 52 and the wiring layer 20 (first wiring layer 23). The etching stop layer 25 is made of a metal material with an etching rate lower than that of the second substrate 50. In the present example embodiment, the second substrate 50 is a silicon substrate. Therefore, in the present example embodiment, the metal material of the etching stop layer 25 is formed of any of Ti, AlCu, Pt, and Cu. In addition, the etching stop layer 25 is laminated on the first wiring layer 23 in the second thickness direction Z2.
Note that in the present disclosure, the etching stop layer 25 may be made of a material other than Ti, AlCu, Pt, and Cu. That is, when the gas used in the dry etching is any one of C4F8 gas, CF4 gas, CHF3 gas, or SF6 gas, the etching stop layer 25 is not particularly limited as long as the etching rate of the etching stop layer 25 is lower than the etching rate of the silicon substrate (second substrate 50).
A seed layer 55 is arranged between the via electrode 52 and the etching stop layer 25 in the through-hole 51. Therefore, the via electrode 52 is electrically connected to the wiring layer 20 (first wiring layer 23) via the seed layer 55 and the etching stop layer 25.
The seed layer 55 includes a first metal layer (not illustrated) laminated on the etching stop layer 25 and a second metal layer (not illustrated) laminated on the first metal layer. From the viewpoint of adhesion and low resistance, the first metal layer of the seed layer 55 is formed of the same metal material as the etching stop layer 25. Note that in the present disclosure, the seed layer 55 may be formed such that the first metal layer is made of Ti and the second metal layer is made of Cu.
In addition, the seed layer 55 is also interposed between the insulating layer 54 provided on the side surface 51a of the through-hole 51 and the via electrodes 52. In addition, the seed layer 55 is also interposed between the insulating layer 54 provided on the second main surface 50b of the second substrate 50 and the under bump metal 56.
In addition, the under bump metal 56 is provided at the via electrode 52 in the second thickness direction Z2. A bump 57 is laminated on the under bump metal 56 in the second thickness direction Z2.
In addition, a frame portion 40 surrounding the functional electrode 84A and the wiring layer 20 is provided between the other main surface 2a of the piezoelectric layer 2 and the first main surface 50a of the second substrate 50. The frame portion 40 seals portions between the piezoelectric layer 2 and the second substrate 50. The frame portion 40 includes a first frame layer 41, a second frame layer 42, a third frame layer 43, a fourth frame layer 44, and a fifth frame layer 45 that are laminated in order from the second thickness direction Z2. The first frame layer 41 is made of the same material as the etching stop layer 25. That is, the first frame layer 41 is formed on the second substrate 50 simultaneous with the etching stop layer 25. In addition, the second frame layer 42 is made of the same material as the first wiring layer 23. That is, the second frame layer 42 is formed on the second substrate 50 simultaneous with the first wiring layer 23.
Similarly, the third frame layer 43 is made of the same material as the second wiring layer 22, and is formed on the first substrate 8A simultaneous with the second wiring layer 22. Thus, the second frame layer 42 and the third frame layer 43 are bonded to each other by Au—Au bonding, as in the case of the first wiring layer 23 and the second wiring layer 22. A third frame portion 33 is made of the same material as the intermediate wiring layer 21, and is a layer formed simultaneous with the intermediate wiring layer 21. A fourth frame portion 34 is made of the same material as the functional electrode 84A, and is a layer formed simultaneous with the functional electrode 84A.
Next, an example of a method of manufacturing the acoustic wave device of an example embodiment will be described. The method of manufacturing the acoustic wave device 1A includes, in the preparatory stage, a step of preparing a first substrate side intermediate product 65 (see
The method of manufacturing the acoustic wave device 1A includes, as steps after the preparatory stage is finished, a bonding step S11, a through-hole forming step S12, an insulating film forming step S13, a seed layer laminating/resist film forming/plate processing step S14, a resist film removing/window forming step S15, a dicing step S16, a soldering step S17, and a singulation/polishing step S18.
The first substrate side intermediate product 65 includes the first substrate 8A, the piezoelectric layer 2, and a portion of the wiring layer 20 laminated on the other main surface 2a of the piezoelectric layer 2. The portion of the wiring layer 20 is the intermediate wiring layer 21 and the second wiring layer 22. Note that the third frame layer 43, the fourth frame layer 44, and the fifth frame layer 45, which are portions of the frame portion 40, are laminated on the other main surface 2a of the piezoelectric layer 2.
In the bonding step S11, first, the second wiring layer 22 of the first substrate side intermediate product 65 and the first wiring layer 23 of the second substrate side intermediate product 63 are arranged so as to overlap each other. In addition, the third frame layer 43 of the first substrate side intermediate product 65 and the second frame layer 42 of the second substrate side intermediate product 63 are arranged so as to overlap each other. Thereafter, the second wiring layer 22 (Au layer) and the Au layer of the first wiring layer 23 are bonded by Au—Au bonding. In addition, the third frame layer 43 (Au layer) and the Au layer of the second frame layer 42 are bonded by Au—Au bonding. Thus, as illustrated in
In addition, after the bonding step, the insulating layer 54 is formed on the second main surface 50b of the second substrate 50. As a method of forming the insulating layer 54, for example, tetra ethoxy silane (TEOS) is adopted. Note that when manufacturing the acoustic wave device 1A, a large number of acoustic wave devices 1A are manufactured at once. That is, the intermediate product 90 illustrated in
In the through-hole forming step S12, the through-hole 51 is formed in the second main surface 50b of the second substrate 50 in a range overlapping the etching stop layer 25 in plan view. In addition, in order to make the shape and depth of the through-hole 51 constant, it is performed under the over-etching condition. In addition, even when it is performed under the over-etching condition, the etching stop layer 25 is formed of any one of Ti, AlCu, Pt, and Cu. That is, the etching rate of the etching stop layer 25 is low, and no through-hole is formed in the etching stop layer 25. Therefore, no hole is formed in the first wiring layer 23.
In the seed layer forming step, portions where the seed layer 55 is laminated are the insulating layer 54 provided on the second main surface 50b of the second substrate 50, the side surface 51a (inner peripheral side of the insulating layer 54) of the through-hole 51, and the bottom surface (etching stop layer 25) of the through-hole 51. In addition, when the seed layer 55 is formed of the first metal layer and the second metal layer, the seed layer forming step includes a first laminating step of laminating the first metal material on the etching stop layer 25 and a second laminating step of laminating the second metal material on the layer of the first metal material. In addition, in the first laminating step, as described above, from the viewpoint of adhesion and low resistance, the first metal layer of the seed layer 55 is preferably formed of the same metal material as the etching stop layer 25 or Ti.
In addition, in the seed layer laminating/resist film forming/plate processing step S14, the resist film 70 is laminated on the seed layer 55 laminated on the second main surface 50b in the second thickness direction Z2. In addition, the resist film 70 is provided with the opening portion 71. The opening portion 71 exposes the through-hole 51 and the periphery of the opening of the through-hole 51 in the second thickness direction Z2.
In the seed layer laminating/resist film forming/plate processing step S14, a portion on which the plate processing is performed is a portion exposed from the opening portion 71 of the resist film 70. Further, before the plate processing is performed, it is preferable to perform surface treatment on the portion exposed from the opening portion 71 of the resist film 70 by a PR method. The plate processing is performed in the order of Au, Ti, and Cu. As a result, the via electrode 52 is formed in the through-hole 51. In addition, the under bump metal 56 is formed in the opening portion 71.
In the forming method of the bump window 73 and the dicing window 74, a resist layer (not illustrated) is provided at portions where the bump window 73 and the dicing window 74 are to be formed, and an insulating film is formed on the resist layer. Thereafter, the resist layer is removed. According to this, the portion where the resist layer is provided becomes an opening portion which is not covered with the insulating layer. In addition, the central portion of the under bump metal 56 in the second thickness direction Z2 is exposed by the bump window 73. Further, the boundary, on the second main surface 50b of the second substrate 50, between the plurality of intermediate products 90 is exposed by the dicing window 74.
While example embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
This application claims the benefit of priority to Provisional Application No. 63/253,598 filed on Oct. 8, 2021 and is a Continuation Application of PCT Application No. PCT/JP2022/037499 filed on Oct. 6, 2022. The entire contents of each application are hereby incorporated herein by reference.
Number | Date | Country | |
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63253598 | Oct 2021 | US |
Number | Date | Country | |
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Parent | PCT/JP2022/037499 | Oct 2022 | WO |
Child | 18626361 | US |