Patent Application
20210399643
AC/DC power converters are employed in a variety of applications to provide power from the AC utility mains to personal electronic devices that operate using DC power systems. Such converters may be designed to accommodate a variety of conflicting requirements relating to: power rating, efficiency, size (power density), cost, etc. It is common for many existing designs to employ a DC bulk capacitor to continue supplying power (voltage) to the converter/load during the zero-crossing periods of the AC input waveform. However, in many applications the capacitance and voltage rating of this DC bulk capacitor required to meet the electrical operating requirements can result in a physical size that is undesirable.
Additionally, in some applications employ two-stage converter designs in which an input boost converter and/or power factor correction stage is provided ahead of a main power conversion stage. Such arrangements may be provided to meet various design requirements such as range of acceptable input voltages or power factor correction requirements for loads beyond a certain level. This additional switching stage may introduce additional components that increase cost, space requirements, and complexity while potentially decreasing reliability.
Thus, it would be desirable to provide an improved power converter design that could be used to meet various types of power converter design requirements while reducing component count, complexity, and physical size, while maintaining or improving operating efficiency.
An active clamp resonant flyback converter with an integrated boost stage can include a boost inductor having a first terminal couplable to a DC input voltage, a main switch coupled between a second terminal of the boost inductor and ground, an auxiliary switch coupled between the second terminal of the boost inductor and a first terminal of a resonant capacitor, a bulk capacitor coupled to a second terminal of the resonant capacitor, at least one inductance coupled between the second terminal of the resonant capacitor and the second terminal of the boost inductor, a second inductance magnetically coupled to the first inductance, and a rectifier coupled to the second inductance and configured to deliver an output current to a load, wherein the main switch and the auxiliary switch are configured to be alternately operated to deliver a regulated output voltage to the load. The at least one inductance can include a primary winding of a flyback transformer, and the second inductance can include a secondary winding of a flyback transformer. The at least one inductance further can further include a resonant inductance, which may be a parasitic inductance and/or a discrete inductor. The converter can further include a rectifier configured to receive an AC input voltage and produce the DC input voltage. The converter can further include a control circuit configured to vary at least one of a timing, frequency, or duty cycle of the main switch to regulate the output voltage.
A single-stage power converter can include a boost segment configured to receive an input DC voltage and a flyback segment configured to generate an output DC voltage, wherein the boost segment and the flyback segment share common switching devices. The common switching devices can include a main switch and an auxiliary switch. The boost segment can further include a boost inductor. The flyback segment can further include a bulk capacitor, a resonant capacitor, a flyback transformer, and an output rectifier. The flyback segment can still further include a resonant inductance in addition to a primary winding of the flyback transformer. The resonant inductance may be a parasitic inductance or a discrete inductor. The converter can further include a control circuit configured to vary at least one of a timing, frequency, or duty cycle of the main switch to regulate the output voltage. The converter can still further include a rectifier configured to receive an AC input voltage and produce the DC input voltage.
A method of operating a single-stage power converter having a boost segment configured to receive an input DC voltage and a flyback segment configured to generate an output DC voltage, wherein the boost segment and the flyback segment share common switching devices including a main switch and an auxiliary switch and an auxiliary switch, can include turning on the main switch, thereby establishing a first current through a boost inductor of the boost segment, thereby storing energy in the boost inductor, and establishing a second current through a primary winding of the flyback segment, thereby transferring energy stored in a bulk capacitor to a flyback transformer. The method may also include, at a first time determined by a controller of the converter, turning off the main switch, wherein turning off the main switch causes energy stored in the boost inductor to be delivered to the bulk capacitor and allows energy stored in the flyback transformer to be delivered to a load. The method may also include, at a second time determined by the controller, turning on the auxiliary switch, wherein turning on the auxiliary switch allows a reverse current through the primary winding to reverse due to resonant operation of the flyback segment. The method may also include, at a third time determined by the controller, turning off the auxiliary switch, thereby enabling delivery of energy to the bulk capacitor and zero voltage switching turn on of the main switch. The controller may be configured to determine the first time to regulate the output DC voltage. The controller may be configured to determine the second time as a fixed delay following the first time, and the fixed delay may be selected to allow zero voltage switching turn on of the auxiliary switch. The controller may be configured to determine the third time responsive to an output current of the converter reaching zero, and the third time may occur following a fixed delay after the output current of the converter reaching zero.
In the following description, for purposes of explanation, numerous specific details are set forth to provide a thorough understanding of the disclosed concepts. As part of this description, some of this disclosure's drawings represent structures and devices in block diagram form for sake of simplicity. In the interest of clarity, not all features of an actual implementation are described in this disclosure. Moreover, the language used in this disclosure has been selected for readability and instructional purposes, has not been selected to delineate or circumscribe the disclosed subject matter. Rather the appended claims are intended for such purpose.
Various embodiments of the disclosed concepts are illustrated by way of example and not by way of limitation in the accompanying drawings in which like references indicate similar elements. For simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the implementations described herein. In other instances, methods, procedures and components have not been described in detail so as not to obscure the related relevant function being described. References to “an,” “one,” or “another” embodiment in this disclosure are not necessarily to the same or different embodiment, and they mean at least one. A given figure may be used to illustrate the features of more than one embodiment, or more than one species of the disclosure, and not all elements in the figure may be required for a given embodiment or species. A reference number, when provided in a given drawing, refers to the same element throughout the several drawings, though it may not be repeated in every drawing. The drawings are not to scale unless otherwise indicated, and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
Various circuit configurations for boost/PFC stage 101 are possible. In the illustrated embodiment, boost/PFC stage 101 includes a full bridge rectifier BD, which rectifies the incoming AC voltage into a full-wave rectified DC waveform. This full-wave rectified DC waveform is coupled to a boost/PFC converter that includes boost inductor Lb, boost switch Qb, and boost diode Db. Operation of boost/PFC converters is known to those skilled in the art and thus will not be repeated here. The output voltage of the boost/PFC converter is applied to a DC bulk capacitor Cdc, which stores energy so that flyback converter stage 102 will still have a suitable input voltage even in the vicinity of zero-crossings of the input AC voltage waveform.
Flyback converter stage 102 converts the DC voltage appearing across DC bulk capacitor Cdc into a DC voltage suitable for load Ro. As with the boost/PFC converter, various circuit configurations are also possible for flyback converter 102. In the illustrated embodiment, flyback converter stage 102 is an active clamp resonant flyback converter. The active clamp flyback converter includes a main switch Qm that alternately applies the DC bulk capacitor voltage to the primary winding Np of a flyback transformer (which may also be considered as a first coupled inductor). During the on-time of main switch Qm, energy is stored in the magnetic field of the flyback transformer/coupled inductors. When main switch Qm is opened, the voltages appearing across primary winding/inductor Lp and secondary winding/coupled inductor Ls reverse, delivering energy through output rectifier diode Do to load Ro. When main switch Qm is opened, auxiliary switch Qa may be closed, primary current to circulate through clamp/resonant capacitor Cr. Resonant operation of capacitor Cr and inductance Lr (which may be a discrete inductor and/or may be the leakage inductance of the flyback transformer allows energy that would otherwise be lost (e.g., due to switching losses of main switch Qm or otherwise dissipated in the circuit) to be recovered and returned to the system.
Operation of active clamp flyback converters is known to those skilled in the art, and thus further details of their operation will not be repeated here. As noted above, the incorporation of a boost/PFC stage 101 and a flyback converter stage 102 into a single converter result in two-stage conversion that may decrease operating efficiency of the overall converter 100 in at least some operating regimes.
At time t1, main switch Qm may be turned off, initiating Mode-1, which is illustrated in
Mode-2, illustrated in
At time t3, when the energy stored in boost inductor Lb has been transferred to bulk capacitor Cdc, the current through boost inductor Lb and the current into bulk capacitor Cdc becomes zero, marking the transition to Mode-3, illustrated in
At time t4, load current 353 reaches zero, marking the transition to Mode-4 illustrated in
With the turn off of auxiliary switch Qa at time t5, Mode-5, illustrated in
As discussed above with respect to
Mode-2 begins at time t2 with the turn on of auxiliary switch Qa as depicted with respect to auxiliary switch gate drive waveform 462. This turn on takes place after a dead time Td after the turn off of main switch Qm, as depicted on main switch gate drive waveform 461. As discussed above with respect to
When boost inductor current 466 reaches zero at time t3, mode 3 begins. As discussed above, Mode-3 extends until time t4, when the secondary current reaches zero. The turn off of output rectifier Do is thus also a zero current switching (ZCS) event. During Mode-3, main switch Qm remains turned off, and auxiliary switch Qa remains turned on, as depicted by gate drive waveforms 461 and 462. Also during Mode-3, primary current 463 initially continues decreasing (becoming more negative) before reversing, as depicted by current segment 332. This corresponds to the resonant operation described above with respect to
As discussed above, Mode-4 extends from time t4, when secondary/load current 464 reaches zero until time t5, when auxiliary switch Qa is turned off, as depicted with reference to gate drive waveform 462. Mode-4 was discussed above with respect to
As indicated by auxiliary switch gate drive signal 462, auxiliary switch Qa is turned off at time t4, which marks the beginning of Mode-5. Mode-5 was discussed above with respect to
In the illustrated arrangement, output voltage Vout is provided as one input of an error amplifier 571. A reference voltage Vref, corresponding to a desired output voltage is provided to a second input of error amplifier 571. The reference voltage may be generated using any of a multiplicity of known techniques. The difference between the output voltage Vout and the reference voltage Vref is an error signal, the magnitude of which increases the more the output voltage deviates from the setpoint. This error signal may be provided to a PWM comparator 572, which may compare the error signal to a ramp signal PWM. As a result, the output of PWM comparator 572 will be a pulse train, with the width of the pulses being larger for larger error signal inputs and smaller for smaller error signal inputs. This pulse train may be provided to drive logic 573, which may generate the drive signals for main switch Qm with on times corresponding to the widths of the pulses received from PWM comparator 572.
Drive logic 573 may also be coupled to auxiliary switch Qa and may operate auxiliary switch Qa complementarily to main switch Qm, with suitable dead times, as described above. To that end, drive logic 573 may have other inputs (not shown) that receive other circuit parameters and/or the error signals from additional or alternative control loops, such as those identified above. Drive logic 573 may be implemented using discrete circuitry or integrated circuits, or a combination thereof. Additionally, the control loop, including, for example, error amplifier 571 and PWM comparator 572, as well as reference signal generators for the reference voltage and the PWM ramp signal, may be included as part of the drive logic, whether in discrete or integrated circuit form. Additionally, the control circuitry may be implemented as analog, digital, and/or hybrid analog digital circuitry, and could alternatively be implemented with a programmable controller, field programmable gate array, or other suitable circuitry.
The foregoing describes exemplary embodiments of an active clamp resonant flyback converter with integrated boost/PFC stage. Such systems may be used in a variety of applications but may be particularly advantageous when used in conjunction with AC/DC power adapters for consumer electronics devices. Additionally, although numerous specific features and various embodiments have been described, it is to be understood that, unless otherwise noted as being mutually exclusive, the various features and embodiments may be combined various permutations in a particular implementation. Thus, the various embodiments described above are provided by way of illustration only and should not be constructed to limit the scope of the disclosure. Various modifications and changes can be made to the principles and embodiments herein without departing from the scope of the disclosure and without departing from the scope of the claims.
| Number | Date | Country | |
|---|---|---|---|
| 63040202 | Jun 2020 | US |
