A typical active matrix light emitting diode (LED) display uses a matrix of pixels that include a capacitor charged by a driving voltage. The pixels of the active matrix LED display use the stored voltages until the scan period of the next frame. These stored voltages allow the pixel circuit to drive the current to an LED during the one frame time period.
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Embodiments of the present invention relate to an active matrix LED pixel driving circuit and pixel layout that provide increased uniform illumination of LED display panels. In accordance with one example embodiment, a light emitting diode pixel driving circuit includes a first prime driving transistor having a first gate and a first source, a select line connected to the first gate, a voltage data line connected to the first source, a second prime driving transistor having a second gate and a second drain, a light emitting diode connected to the second drain, and a plurality of sub driving transistors each having a gate and a drain wherein the gates of the plurality of sub driving transistors are connected to the second gate and the drains of the sub driving transistors are connected to the second drain.
For certain embodiments, the first and second prime driving transistors are located in a first pixel and the plurality of sub driving transistors are located outside the first pixel. For certain example embodiments, the first and second prime driving transistors are located in a first pixel and each of the plurality of sub driving transistors are located in a neighbor pixel to the first pixel. For certain embodiments, the first and second prime driving transistors are P-channel transistors. For additional example embodiments, the plurality of sub driving transistors are each P-channel transistors.
For certain example embodiments, the second prime driving transistor also has a second source and the example circuit further includes a capacitor connected between the second source and the second gate. For certain embodiments, the second prime driving transistor also has a second source and further included is a VDD voltage source that is connected to the second source. For additional example embodiments, the plurality of sub driving transistors also each have a source and the VDD voltage source is also connected to the sources of the plurality of sub driving transistors. For certain embodiments, the first gate is capable of receiving a select signal through the select line and the first source is capable of receiving a voltage data signal through the voltage data line.
Yet for still other additional embodiments, the voltage data signal is transmitted to the second gate when the first prime driving transistor is turned on by the select signal, and the voltage level of the voltage data signal is configured to turn on the second prime driving transistor to generate a driving current through the second prime driving transistor. For certain example embodiments, the plurality of sub driving transistors are capable of compensating for a threshold variation of the second prime driving transistor resulting in an improved uniform illumination of the light emitting diode on a display panel.
Another example embodiment of the present invention is a method that includes receiving a select signal at a first gate of a first prime driving transistor to turn on the first prime driving transistor, transmitting a voltage data signal to a second gate of a second prime driving transistor and to each of a plurality of gates of a plurality of sub driving transistors when the first prime driving transistor is turned on by the select signal, generating a driving current through the second prime driving transistor when the voltage data signal turns on the second prime driving transistor, illuminating a light emitting diode using the driving current, and wherein the plurality of sub driving transistors also each have a drain which are connected to the second drain of the second prime driving transistor, and the plurality of sub driving transistors compensate for a threshold variation of the second prime driving transistor. For field effect transistors (FET) transistors, the threshold voltage is the minimum voltage difference between the gate and source that is needed to create a conducting path between the source and drain.
For certain embodiments, the first and second prime driving transistors are located in a first pixel and the plurality of sub driving transistors are located outside the first pixel. For certain embodiments, the first and second prime driving transistors are located in a first pixel and each of the plurality of sub driving transistors are located in a neighbor pixel to the first pixel.
For additional embodiments, the first and second prime driving transistors are P-channel transistors and/or the plurality of sub driving transistors are each P-channel transistors. For certain embodiments, the second prime driving transistor also has a second source and further comprises providing current to the light emitting diode from a capacitor which is connected between the second source and the second gate when the first prime driving transistor is turned off. For certain example embodiments, the second prime driving transistor also has a second source and the plurality of sub driving transistors also each have a source, and a VDD voltage source is connected to the second source and to the sources of the plurality of sub driving transistors. For some example embodiments, the select signal is received through a select line and the voltage data signal is transmitted through a voltage data line. For certain example embodiments, the plurality of sub driving transistors compensate for a threshold variation of the second prime driving transistor so as to result in an improved uniform illumination of the light emitting diode on a display panel.
The foregoing will be apparent from the following more particular description of example embodiments of the invention, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating embodiments of the present invention.
A description of example embodiments of the invention follows. The teachings of all patents, published applications and references cited herein are incorporated by reference in their entirety.
Active-matrix LED displays include an array of pixels that can include switching transistors and capacitors. The pixels can be arranged in a grid or matrix. To address a particular pixel, the correct row is turned on (also referred to as switched on), and then a charge is transmitted down the selected column. While this occurs, the other rows that the selected column intersects generally should be turned off so that only the capacitor for the appropriate pixel is charged. The capacitor can hold the charge until it is refreshed during the next cycle.
The LED pixel driving circuit 300 includes a first prime driving transistor 21 with its gate connected to a select line 310, its source connected to a voltage data line 320, and its drain connected to a second prime driving transistor 22. When reference is made to connected, it is meant to refer broadly to any type of connection, including directly or indirectly, that allows for the electrical signal to be communicatively coupled. The select line is used in selecting a particular pixel driving circuit 300 and can be used to turn on the first prime driving transistor 21. Turn on or switch on a transistor refers to applying the appropriate voltage to the gate of the transistor, including depending upon whether it is an N-channel or P-channel transistor, to cause current to flow between the source and the drain.
When the first prime driving transistor 21 is turned on, the voltage data signal on the voltage data line 320 is transmitted from the source of the first prime driving transistor 21 to its drain, which is connected to the gate of second prime driving transistor 22. This causes the second prime driving transistor 22 to turn on and generates a driving current through the second prime driving transistor 22 between its source and the drain. How hard the second prime driving transistor 22 turns on is based on the voltage data signal and can affect in which region the transistor operates and where within a region the transistor operates. The source of the second prime driving transistor 22 is connected to a voltage source, such as Vdd, and the drain of the second prime driving transistor 22 is connected to the anode of a light emitting diode (LED) 24. The cathode of the light emitting diode (LED) 24 can be connected to a voltage source, such as Vss, or to ground depending on the design. The driving current causes the LED 24 to illuminate and provide light.
The drain of the first prime driving transistor 21 also is connected to the gates of the sub driving transistors 25-28 of the sub drivers 330a-330d. Each of the drains of the sub driving transistors 25-28 are connected to the drain of the second prime driving transistor 22, all of which are connected to the anode of the light emitting diode (LED) 24. The sources of each of the sub driving transistors 25-28 are connected to the same voltage source, or power rail, as the source of the second prime driving transistor 22, which is Vdd for this example embodiment. Thus, when the voltage data signal gates the second prime driving transistor 22 and the sub driving transistors 25-28, driving current is supplied to the LED 24 from each of the transistors and differences due to threshold variations are mitigated, and which compensates for the process variations of the second prime driver transistor 22.
The example embodiment illustrated in
For the example embodiment shown in
While this invention has been particularly shown and described with references to example embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention encompassed by the appended claims.
This application claims the benefit of U.S. Provisional Application No. 62/008,452, filed on Jun. 5, 2014. The entire teachings of the above application(s) are incorporated herein by reference.
Number | Date | Country | |
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62008452 | Jun 2014 | US |