ACTUATOR CONTROL SYSTEM

Information

  • Patent Application
  • 20070176758
  • Publication Number
    20070176758
  • Date Filed
    November 07, 2006
    19 years ago
  • Date Published
    August 02, 2007
    18 years ago
Abstract
A system for maintaining appropriate control of an actuator in the event of a power disruption without being adversely affected by the period of the power disruption. The actuator may close during the power disruption but will be fully opened upon the return of power to the system. After being opened, the actuator may be kept open with less power than needed for opening it.
Description

BRIEF DESCRIPTION OF THE DRAWING


FIG. 1 is a diagram of a damper with an actuator which a latch and related circuitry may control;



FIG. 2 is a block diagram of the latch and related circuitry;



FIGS. 3
a and 3b are graphs of drive signals to an actuator;



FIG. 4 is a truth table of the latch;



FIG. 5 is a block diagram of the latch and actuator arrangement;



FIG. 6 is a schematic of a slow voltage rise detector, reset device and latch logic;



FIG. 6
a is a graph of the voltage on the capacitor of the reset circuit;



FIG. 7 is a schematic of an oscillator and actuator control device;



FIG. 8 is a schematic of a motion sensor and related circuitry;



FIG. 9 is a schematic of a current overload detection circuit;



FIG. 10 is a schematic of a high temperature detection circuit;



FIG. 11 is a schematic of power supply circuitry; and



FIG. 12 is a schematic of motor interface circuitry.


Claims
  • 1. An actuator control system comprising: an actuator; anda control circuit connected to the actuator; andwherein if a period of time between a removal of power and a return of power to the system is within a range between about one millisecond and greater than five minutes, then the control circuit can open the actuator upon the return of power.
  • 2. The system of claim 1, wherein the control circuit comprises: a detect and reset circuit;a latch connected to the detect and reset circuit; anda driver connected to the latch.
  • 3. The system of claim 2, wherein: the detect and reset circuit comprises: a comparator having first and second inputs, and an output; anda latch setting circuit having an input connected to the output of the comparator and having an output connected to the latch; andwherein:the first input of the comparator is connected to a system power input voltage level indicator; andthe second input of the comparator is connected to an internal circuit power voltage level indicator.
  • 4. The system of claim 3, wherein: a period of time is provided after the return of power to the system for the control circuit to open the actuator;the period of time is provided by delaying a voltage at the first input of the comparator from exceeding a voltage at the second input of the comparator to provide the run signal at the output of the comparator.
  • 5. The system of claim 2, wherein: the detect and reset circuit is for providing a run or hold set signal to the latch;the latch is for providing a run or hold select signal to the driver; andthe driver is for providing a run or hold drive signal to the actuator.
  • 6. The system of claim 5, wherein: a run or hold set signal results in a run or hold select signal, respectively;a run or hold select signal results in a run or hold drive signal, respectively;the run drive signal opens the actuator; andthe hold signal holds the actuator in its position.
  • 7. The system of claim 6, wherein: the actuator is a motor;the drive signal is a pulse width modulated (PWM) signal;the PWM signal having a duty cycle greater than about forty percent is a drive signal; andthe PWM signal having a duty cycle less than about forty percent is a hold signal.
  • 8. A method for recovery after a power disruption of a system for controlling an actuator, comprising: providing a system for controlling an actuator;detecting a loss of power from the system;resetting a latch into a drive mode for driving an actuator to an open position before energy in the system dissipates below a predetermined level;detecting a return of power to the system;delaying putting the latch into a hold mode for a predetermined period of time after the return of power to the system; anddriving the actuator to the open position during the predetermined period of time while the latch is in the drive mode.
  • 9. The method of claim 8, wherein: detecting a loss of power from the system may be accomplished with a comparator having a non-inverting input connected to a system power input terminal, and an inverting input connected to a system power supply circuit output terminal, with a voltage level at the non-inverting input going below the voltage level at the inverting input, resulting in a low output from the comparator; andthe low output from the comparator causes the latch to reset into the drive mode.
  • 10. The method of claim 9, wherein: detecting a return of power may be accomplished with a voltage level at the non-inverting input going above the voltage level at the inverting input, resulting in a high output from the comparator;the high output from the comparator does not cause but permits the latch to go into a hold mode;a capacitor upon being charged through a resistor connected to a system power supply circuit output terminal, causes the latch to go from the drive mode into the hold mode after the predetermined period of time has passed;the predetermined period of time is proportionally determined by a time constant of the resistor and the capacitor.
  • 11. The method of claim 10, wherein: the drive mode is for driving the actuator to an open position; andthe hold mode is for holding the actuator at its position.
  • 12. The method of claim 8, wherein a period of time between a moment of the detecting a loss of power from the system and a moment of detecting a return of power to the system ranges from about one millisecond to greater than five minutes.
  • 13. A system for recovery after power disruption, comprising: an actuator having a run mode;a driver connected to the actuator;a latch connected to the driver;a voltage change detect and reset circuit connected to the latch; andwherein upon a power loss from the system, the voltage change detect and reset circuit resets the latch to put the actuator into the run mode, before residual power in the system is gone.
  • 14. The system of claim 13, wherein the voltage change detect and reset circuit, upon a detection of a power loss from the system, resets the latch to put the actuator in the run mode.
  • 15. The system of claim 14, wherein, upon a power return to the system, the voltage change detect and reset circuit maintains the latch reset to retain the actuator in the run mode.
  • 16. The system of claim 15, wherein, as the voltage of the power return increases, the voltage change detect and reset circuit disconnects from the system thereby allowing the latch to go into the hold mode when the actuator is at a fully open position.
  • 17. The system of claim 16, wherein: the voltage change detect and reset circuit comprises: a voltage divider connected across a system power terminal and ground;a comparator having a first input connected to the voltage divider, having a second input connected to a voltage level and having an output;a resistor having a first end connected to an internal supply voltage; anda capacitor having a first end connected to a second end of the resistor and the output of the comparator, and a second end connected to ground; andthe latch has an input connected to the first end of the capacitor, and an output for providing a run mode or a hold mode signal.
  • 18. The system of claim 17, wherein: upon a power loss, a voltage level across the voltage divider decreases and at the first input to the comparator meets or goes below the voltage level at the second input of the comparator, a discharge of the capacitor occurs at the output of the comparator; andthe resulting low voltage output of the comparator goes to the input of the latch having an output for providing a run mode signal.
  • 19. The system of claim 18, wherein: upon a power return, the voltage level of the voltage divider increases at the first input of the comparator and exceeds the voltage level at the second input of the comparator, which results in an effective open at the output of the comparator;the voltage level at the output of the comparator increases as the capacitor charges up with current through the resistor having the first end connected to the internal supply voltage;when the voltage level at the output of the comparator is below a threshold level, the output of the latch provides a run mode signal; andas the voltage level at the output of the comparator reaches the threshold level after a period of time starting at the power return and ending when the actuator is at a fully open position.
  • 20. The system of claim 19, wherein the period of time is determined at least partially by a time constant of the capacitor and the resistor.
Continuation in Parts (1)
Number Date Country
Parent 11275814 Jan 2006 US
Child 11557253 US