Claims
- 1. An adapter to interface a digital media device to a port of a host, comprising:
a host port connector; a socket for receiving a digital media device; and a circuit mapping the host port connector to the socket.
- 2. An adapter as in claim 1 wherein:
the host port connector comprises a serial data conductor, a power conductor, a ground conductor, and a clock conductor; and the serial data conductor, the power conductor, the ground conductor, and the clock conductor are mapped to respective contact pads in the socket.
- 3. An adapter as in claim 2 wherein the socket conforms to an SPI protocol.
- 4. An adapter for interfacing a memory device to a port of a host, comprising:
a host port connector; a socket having a plurality of surface pad contacts and an orifice for receiving a generally planar memory device having a plurality of surface pads; and a circuit mapping the host port connector to the surface pad contacts of the socket.
- 5. An adapter as in claim 4 wherein:
the host port connector comprises a serial data conductor, a power conductor, a ground conductor, and a clock conductor; and the serial data conductor, the power conductor, the ground conductor, and the clock conductor are mapped to respective contact pads in the socket.
- 6. An adapter as in claim 5 wherein the socket conforms to an SPI protocol.
- 7. An adapter for interfacing a memory device to a port of a host, comprising:
a host port connector comprising a serial data contact, a clock contact, and a ground contact; a socket having a plurality of surface pad contacts and an orifice for receiving a generally planar memory device having a plurality of surface pads; and a circuit mapping the data contact, the clock contact, and the ground contact of the host port connector to respective ones of the surface pad contacts of the socket.
- 8. An adapter as in claim 7 wherein the surface pad contacts of the socket conform to an SPI interface protocol.
- 9. An adapter as in claim 7 wherein the surface pad contacts of the socket conform to an NXS interface protocol.
- 10. An adapter for interfacing a memory device to a port of a host, comprising:
a host port connector comprising a serial data contact, a clock contact, and a ground contact; a socket having a plurality of contacts and an orifice for receiving a generally planar memory device about 15 mm wide; and a circuit mapping the data contact, the clock contact, and the ground contact of the host port connector to respective ones of the contacts of the socket.
RELATED APPLICATIONS
[0001] This application is a divisional of copending U.S. patent application Ser. No. 09/435,495, filed Nov. 6, 1999 (Jigour and Wong, “Insertable and Removable Digital Memory Apparatus”); which is a divisional of U.S. patent application Ser. No. 09/084,044, filed May 22, 1998, now U.S. Pat. No. 6,026,007, issued Feb. 15, 2000 (Jigour and Wong, “Insertable and Removable High Capacity Digital Memory Apparatus and Methods of Operation Thereof”); which is a continuation of U.S. patent application Ser. No. 08/823,937, filed Mar. 25, 1997, now U.S. Pat. No. 5,815,426, issued Sep. 29, 1998 (Jigour and Wong, “Adapter for Interfacing an Insertable/Removable Digital Memory Apparatus to a Host Data Port”), which is a continuation-in-part of U.S. patent application Ser. No. 08/689,687, filed Aug. 13, 1996, now U.S. Pat. No. 5,877,975, issued Mar. 2, 1999 (Jigour and Wong, “Insertable/Removable Digital Memory Apparatus and Method of Operation Thereof”), all of which are hereby incorporated herein in their entirety by reference thereto.
Divisions (2)
|
Number |
Date |
Country |
Parent |
09435495 |
Nov 1999 |
US |
Child |
09730925 |
Dec 2000 |
US |
Parent |
09084044 |
May 1998 |
US |
Child |
09435495 |
Nov 1999 |
US |
Continuations (1)
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Number |
Date |
Country |
Parent |
08823937 |
Mar 1997 |
US |
Child |
09084044 |
May 1998 |
US |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
08689687 |
Aug 1996 |
US |
Child |
08823937 |
Mar 1997 |
US |