Flexible alternating current (AC) transmission systems (FACTS) that utilize voltage-sourced inverters are increasingly used in power systems because of their improved performance when compared to conventional thyristor based systems. Two types of voltage sourced inverter that are used to provide compensation for non-linear and distorting loads are a Static Synchronous Compensator (STATCOM) and a Distribution STATCOM (D-STATCOM). In particular, the STATCOM and D-STATCOM systems are used at the power distribution level to compensate for harmonics that are introduced into the power distribution system due to the non-linear distorting loads.
Conventional STATCOM and D-STATCOM systems typically use active power filters to filter these harmonics. However, these active power filters reduce the power system performance due to the limited control bandwidth, delays in any digital implementation, and interactions with the non-linear distorting loads. In addition, in order to reduce the complexity of the D-STATCOM the pulse width modulation (PWM) switching frequency of a conventional D-STATCOM system may only be a few kilohertz. Thus, the bandwidth of the various control loops within the D-STATCOM is limited and this limited bandwidth reduces the ability of the D-STATCOM system to track and compensate for unwanted disturbances caused by the non-linear/distorting loads.
Therefore, it would be advantageous to provide a STATCOM and D-STATCOM system that uses a conventionally low PWM switching frequency and that is able to track and compensate for at least some disturbance harmonics generated by a non-linear distorting load.
A controller for compensating reactive power and selected load current harmonics in an unbalanced multi-phase power distribution system by controlling the injection of current from a multi-phase voltage source inverter (VSI) into the multi-phase power distribution system. The injected current is determined such that the injected current is operative to balance the load seen by the power distribution system. In particular, the controller determines the injected current to compensate for the harmonic distortion in the source current, provided by the multi-phase power distribution system, caused by non-linear/distorted and unbalanced loads in each phase. The controller receives as inputs measurements of the source voltage and current, the output voltage across an output capacitor on the VSI, and a reference voltage. The controller includes an inner loop control processor, an outer loop control processor, and an adaptation processor. The adaptation processor is operative to estimate a selected set of predetermined harmonic components of the periodic disturbance which is a function of the unknown system parameters, the source current, the source voltage, and their time derivatives in stationary coordinates. The outer loop processor is operative to provide a source reference current as a function of the reference voltage, the output voltage, and the source voltage. The inner loop processor is operative to provide a first control vector as a function of the source reference current and the estimated plurality of harmonic components. The first control vector is combined with the source voltage and the output voltage to form an output control vector that is provided to the VSI. All calculations in the controller are carried in stationary: α-β coordinates so that all measurements of the multi-phase source voltage and source current must be converted into stationary coordinates.
In one embodiment, a controller is disclosed for providing a control vector to a three-phase VSI for controlling the VSI output voltage and current. The VSI has an output capacitor coupled across the voltage output, and each phase of the VSI is coupled to a corresponding phase of a three-phase power distribution system via a corresponding filter inductor. The three phase power distribution system provides a source voltage and a source current for each phase to a corresponding non-linear/distorting three phase load.
The controller includes a source current module that is operative to provide a signal indicative of the value of the source current in each phase and a source voltage module that is operative to provide a signal indicative of the value the source voltage in each phase. The controller further includes a three-phase to stationary coordinate converter that is operative to convert the three-phase source current value into a stationary source current value and to convert the three-phase source voltage value into source voltage value. The controller also includes an output voltage module that is operative to determine the output voltage across the VSI output capacitor and to provide a signal indicative of the output voltage. The controller also receives a reference voltage as well.
The control vector processor includes an outer loop controller receiving the reference voltage, the output voltage, and the source voltage. The outer loop controller is operative to provide an output signal that is a source reference current that is a function of the difference of the square of the reference voltage and the square of the output voltage. The control vector processor also includes an adaptation processor that is coupled to the three phase to stationary coordinate converter module and receives both the source current and the source voltage in stationary coordinates therefrom. The adaptation processor is operative to estimate a selected set of predetermined harmonic components of the periodic disturbance which is a function of the unknown system parameters, the source current, the source voltage, and their time derivatives and to provide these plurality of estimated harmonic components in stationary coordinates. The control vector processor further includes an inner control loop controller that receives the source voltage, and the source current from the coordinate converter module, and receives the plurality of estimated harmonic components from the adaptation processor. The inner loop processor also receives the source reference current from the outer loop controller and. The inner loop is operative to provide a first control vector that is a function of the source current, the source reference current, and the source voltage in stationary coordinates. The control vector processor provides an output control vector that is a function of the first control vector and the output voltage, wherein the output control vector is provided to the VSI.
Other forms, features, and aspects of the above-described methods and system are described in the detailed description that follows.
The invention will be more fully understood from the following detailed description taken in conjunction with the accompanying drawings in which:
A three phase voltage source inverter 118 that is capable of providing a three phase voltage and current output, wherein each phase can provide an output voltage and current to each phase of the power grid 102 that are uncorrelated to the other phases. Each phase of the voltage source inverter 118 is coupled to a corresponding phase of the power distribution system 102 via a corresponding filter inductor. In particular, the three-phase voltage source inverter 118 provides inverter voltages 120, 122, and 124 and corresponding inverter currents 116, 114, and 112 to the power grid 102 via filter inductors 130, 132, and 134 respectively. The three phase voltage source inverter 118 further includes output capacitor 126 and output resistor 128 connected across the rails of the voltage source inverter 136 and 138.
A controller 130 receives source current and source voltage measurements from the power grid 102, a reference voltage VD, and a measurement of the output voltage VC of the VSI taken across the output capacitor. The controller 130 is operative to provide a control vector to the voltage source inverter 118 that is a function of the measured source currents and source voltages, the reference voltage VD, and the output voltage VC. The objective of the controller 130 is to provide a control vector to the voltage source inverter 118 to force the currents on each phase of the power grid 102 to be proportional to the respective line voltage V1, V2, and V3. This control objective is accomplished by charging the output capacitor 228 to a desired voltage and maintaining the output capacitor at that voltage during normal operation. Specifically, the control vector is determined to ensure that the VSI injects compensating currents 112, 114, and 116 into the corresponding phase of the power distribution grid 102 that compensate for the reactive power and selected current harmonics due to unbalanced and non-linear distorting loads.
Alternatively, one or more estimators may be constructed to estimate the three current measurements, the three voltage measurements, or both and to provide these estimated values to the respective first and second three-phase to stationary coordinate converters 210 and 212. Additionally, an estimator may be constructed to estimate the output voltage 233.
Control vector processor 130 includes four modules: an outer loop control processor 216, an inner loop control processor 214, an adaptation processor 238, and an output control processor 240. As will be explained in more detail below, the adaptation processor 238 is operative to provide estimates of one or more predetermined harmonic components of the periodic disturbance which is a function of the unknown system parameters, the source current, the source voltage, and their time derivatives in stationary coordinates. The outer loop processor 216 receives the reference voltage vD 240, the output voltage vC and the source voltage vSαβ. As will be explained in more detail below, the outer loop processor 216 combines these inputs to provide an output that is the source reference current i*Sαβ. The inner loop processor 214 receives the harmonic components from the adaptation processor 238 and further receives source current iSαβ and the source voltage vSαβ from the 3->2 coordinate converter 210 and also receives the source reference current i*Sαβ from the outer loop processor 214. As will be explained in more detail below, the inner loop processor 214 combines these inputs to form a first control vector eαβ. The first control vector eαβ is provided to the output control vector module 240 along with the output voltage vC. The output control vector module 240 forms an output control vector uαβ that is a function of the output voltage vC and the first control vector eSαβ. The output control vector processor 240 then provides the output control vector uαβ to the voltage source inverter 218. The voltage source inverter 218 under the control of output control vector uαβ injects first, second, and third currents, current 219, 217, and 215 respectively, into the corresponding phase of power grid 202 via filter inductor 242, 244 and 246 respectively.
The system depicted in
where
The control input is defined as
making the assumption that vC is bounded away from zero and used the relationship iSαβ=iLαβ+iαβ. Utilizing the source currents, isαβ instead of the shunt currents iαβ reduces the number of current sensors required so that only the source current is needed to evaluate the control action. The transformation between three-phase space and the stationary coordinate space that is used in the 3->2 converter module 210 is given by the transformation xαβ=Ax:
that has an inverse transformation A−1=(½)AT.
For the design of the controller, the averaged variant of the model described above will be used. Assuming that the switching control sequence uses a sufficiently high switching frequency, the control vector δ can be replaced by the corresponding duty ratio u=[u1,u2,u3]T. Under these conditions, the averaged model can be expressed as:
Since the injected voltage term, vcu, will generate harmonics other than those associates with each factor, unless the control term u contains a term cancelling vc. Accordingly, the entire injected voltage is used as a control input variable with the transformation:
that leads to the system model:
which after the 3->2 transformation yields the model (1)-(2).
The control objective is for the voltage source inverter 218 to inject the necessary currents into the power distribution system 202 so that the source terminals all observe the same apparent resistance in all phases and at all selected frequencies. Accordingly, for properly generated and injected currents the power grid 202 will be supplying current to a balanced load. Thus, the current provided by the source should track a reference that is proportional to the voltages generated by the source, that is
where g is a scalar quantity that represents the unknown apparent conductance of each phase. Although ideally the current tracking expressed in equation (8) should be performed over all frequencies, the limited bandwidth of the source voltage inverter implies that equation (8) can only be solved for a plurality of predetermined harmonic frequencies. As more accurate current tracking is needed, the number of predetermined harmonic frequencies must be increased.
The load current iLαβ and the source voltage vSαβ are independently unbalanced periodic signals that contain higher harmonic frequencies of the fundamental frequency denoted by ω:
where
Vectors IpL,k, InL,k are two dimensional vectors that represent the kth harmonic coefficients for the positive and negative sequence representing the load current. Similarly, vectors VPS,k, VNS,k are two dimensional vectors that represent the kth harmonic coefficients for the positive and negative sequence representing the source voltage. In both instances, H={1,2,3, . . . } is the set of predetermined harmonic indices corresponding to the selected harmonics. Since all of the load current and source voltage harmonic coefficients are considered to be unknown or slowly varying signals the time derivatives can be explicitly provided as:
In the design of the controller, the current dynamics represented by equation (1) respond at a faster rate when compared to the voltage dynamics in equation (2). Accordingly, the controller can be conceptualized and designed as a two stage controller comprising an inner (current) loop controller and an outer (voltage) loop controller.
The goal of the inner loop controller is to have the source current iSαβ track toward a reference current i*Sαβ. In the known parameters case the controller, which is a dissipative controller and provides for asymptotic tracking of the source current to the reference current, is given by:
where ĩSαβ{circumflex over (=)}iSαβ−i*Sαβ and k1 is a positive definite matrix. The time derivative for the source current can be determined using equations (8) and (9) such that the controller in equation (14) becomes:
where to place the harmonic coefficients together Φp and Φn are defined as:
where k∈H, and thus, the first term on the right hand side of (15) is a periodic disturbance which is a function of the unknown system parameters, the source current, the source voltage, and their time derivatives in stationary coordinates.
Assuming that g and ġ converge slowly toward a constant value, then Φp and Φn can be assumed approximately constant as well. Assuming that the inductance L is constant, and that all the harmonic coefficients are unknown, the controller provided in equation (15) can be re-formulated and consider instead the the following controller which includes an estimation for the periodic disturbance:
which in closed loop with the subsystem from equation (1) and yields the following error model:
where {tilde over (Φ)}kP={circumflex over (Φ)}kP−ΦkP and {tilde over (Φ)}kn={circumflex over (Φ)}kn−Φkn and ({circumflex over (.)}) is used to represent an estimate of the value in the parenthesis. The estimates can be determined using the following adaptation equations where k∈H:
To avoid the rotations of the form e±ℑωkt appearing in the controller, the following transformations are used:
The inner loop controller can then be expressed as:
with the adaptive laws transformed to:
where k∈H. Writing the dynamical part of the controller in the form of transfer functions, yields the controller in the form having a second order bandpass filter centered at the selected frequency for each predetermined harmonic. The controller has the form of:
where {circumflex over (φ)}k,αβ≡({circumflex over (φ)}kP+{circumflex over (φ)}kn) and
where s is the Laplace variable and k∈H.
In the slower outer loop controller, the control objective is to ensure that the DC components of the output voltage vC is driven to a predefined constant reference voltage VD. As discussed above, the inner loop controller contains faster dynamics than the outer loop controller, thus after a short period of time, the source current iSαβ will approximately equal the reference source current i*Sαβ and the estimate {circumflex over (φ)}k,αβ=φk,αβ. Accordingly, the voltage/capacitor dynamics are given by:
A controller using a lead-lag filter is used to provide the necessary control signal in the form of:
The controller yields a linear time invariant (LTI) system, once the dc component of the capacitor dynamics above is extracted, and in which stability may be shown to exist for the condition that Ki>Kp.
This structure is depicted in FIG. 3. In particular,
The outer loop control processor 216 is depicted in FIG. 3 and receives the output voltage vC, the reference voltage Vd and the source current and source voltage measurements. The output voltage vC is squared in module 318 and the reference voltage Vd is squared in module 320. The difference between the squared values is provided by difference module 322 and provided to lead-lag filter 324. The filtered output from the lag-lead filter 324 is multiplied by the source voltage in module 326 to form the source reference current i*Sαβ.
The output control vector processor 240 receives the first control vector eαβ from the inner loop control processor 214. The output control vector uαβ is formed by multiplying the first control vector by a predetermined factor, which in the illustrated embodiment is 2, and dividing the result by the output voltage vC in module 332.
The various variables can be set to predetermined constants based on the particular system dynamics and constraints. In one embodiment, the coefficient K1 is set kip*I2 where kip is a conventional proportional gain constant of a PI controller and I2 is the 2×2 identity matrix. Accordingly, kip can be set equal to 2πfic*L where fic is the desired loop bandwidth that is typically {fraction (1/10)}-{fraction (1/14)} of the sampling frequency. The values for the various values of γk can be set as γk=2.2/Tkr where Tkr is the desired response time for each harmonic component, as evaluated between 10% and 90% of a step response of the amplitude of the corresponding sinusoidal perturbation.
The outer loop control parameters are determined using conventional control techniques. In particular, the outer loop parameters are driven by the desired voltage loop bandwidth and the desired phase margin. However, due to the ripple on the DC voltage at twice the supply frequency during unbalanced conditions the voltage loop bandwidth should be limited to approximately 10-20 Hz to avoid possible amplification of the second harmonic in the line current reference.
Those of ordinary skill in the art should further appreciate that variations to and modification of the above-described methods and apparatus for controlling a VSI can be made. In particular, some measurements can be replaced with their estimates, as in the case of current estimates from measured DC-link current and from known switching pattern. Accordingly, the invention should be viewed as limited solely by the scope and spirit of the appended claims.
This application claims priority under 35 U.S.C. §19(e) to provisional patent application Ser. No. 60/265,727 filed Feb. 1, 2001; the disclosure of which is incorporated by reference.
The work leading to this invention was carried out with United States Government support provided under a grant from the Office of Naval Research, Contract No. N00014-97-1-0704. Therefore, the United States Government has certain rights in this invention.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCTUS02/03167 | 1/31/2002 | WO | 00 | 8/18/2003 |
Publishing Document | Publishing Date | Country | Kind |
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WO0206200 | 8/8/2002 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
4780660 | Shima et al. | Oct 1988 | A |
4812669 | Takeda et al. | Mar 1989 | A |
5321598 | Moran | Jun 1994 | A |
5526252 | Erdman | Jun 1996 | A |
5586018 | Aoyama et al. | Dec 1996 | A |
5642007 | Gyugyi et al. | Jun 1997 | A |
5751138 | Venkata et al. | May 1998 | A |
Number | Date | Country | |
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20040071000 A1 | Apr 2004 | US |
Number | Date | Country | |
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60265727 | Feb 2001 | US |