Claims
- 1. A controller having an adaptive linearization loop for a transmitter comprising:
a gain regulator; and a predistortion block, wherein the gain regulator and predistortion block independently adjust linear and nonlinear gain values for the transmitter.
- 2. The controller of claim 1 wherein the gain regulator approximates a linear gain of closed-loop adaptive linearization of the transmitter or its inverse.
- 3. The controller of claim 1 wherein the predistortion block approximates an inverse of a normalized transmitter gain.
- 4. The controller of claim 1 wherein the gain regulator and predistortion block are controlled by adaptive controllers.
- 5. The controller of claim 4 wherein the adaptive controllers are separate, and operate independently.
- 6. The controller of claim 5 wherein the adaptive controllers have different designated time slots, and are responsible for different sections of the adaptive linearization loop.
- 7. The controller of claim 1 wherein the controller is implemented on a single semiconductor chip.
- 8. A controller for a transmitter comprising:
a first adaptive controller a second adaptive controller means for estimating an average closed-loop system gain to provide phase normalized feedback signals for estimation of transmitter nonlinearity
- 9. The controller of claim 8 wherein normalization of the feedback signals with respect to the input signals is performed for average signal values.
- 10. The controller of claim 9 wherein a frequency of consecutive closed-loop gain re-estimation is approximately more than two decades larger than a cut-off frequency of the second adaptive controller.
- 11. The controller of claim 8 wherein the second adaptive controller comprises a predistortion controller that controls gain based on phase normalized feedback signals.
- 12. An architecture for controlling the gain of a transmitter, the architecture comprising:
an adaptive loop coupled to the transmitter, the adaptive loop having a forward branch that propagates an input signal, and a feedback branch that propagates a transmitter output signal; a linear receiver that converts the transmitter output signal; a predistortion block providing nonlinear amplification of the input signal; a gain regulation block providing linear scaling by a complex number; an adaptive predistortion controller that estimates normalized nonlinearity of the adaptive loop and controls the predistortion block; an adaptive gain controller that estimates linear gain and controls the gain regulation block; and a time-division multiplexer synchronizing time-slots for adaptation of the predistortion block and of the gain regulation block.
- 13. The architecture of claim 12, wherein the gain regulation block is coupled between the predistortion block and the input of the transmitter.
- 14. The architecture of claim 13 wherein the gain regulation block provides a feedback signal to the adaptive predistortion controller, which is normalized with respect to the input signal to the transmitter.
- 15. The architecture of claim 13 wherein the gain regulation block has a gain that is approximately equal to the inverse of the cascaded linear gain of the nonlinear transmitter and the gain of linear receiver.
- 16. The architecture of claim 13 wherein the gain regulation block has a gain that is approximately equal to the inverse of the cascaded linear gains of the predistortion block and the nonlinear transmitter and the gain of linear receiver.
- 17. The architecture of claim 12 wherein the gain regulation block is coupled between the linear receiver and an input of the adaptive predistortion controller.
- 18. The architecture of claim 17 wherein the gain regulation block provides a feedback signal to the adaptive predistortion controller, which is normalized with respect to the input signal to the transmitter.
- 19. The architecture of claim 17 wherein the gain of the gain regulation block is approximately equal to the inverse of the cascaded linear gain of the nonlinear transmitter and gain of the linear receiver.
- 20. The architecture of claim 17 wherein the gain of the gain regulation block is approximately equal to the cascaded linear gains of the predistortion block and the nonlinear transmitter and the gain of the linear receiver.
- 21. The architecture of claim 12 wherein the gain regulation block is coupled between an input having a signal to be transmitted, and to an input of the adaptive predistortion controller.
- 22. The architecture of claim 21 wherein the gain block provides a forward signal to the adaptive predistortion controller, which is normalized with respect to the feedback signal from the linear receiver.
- 23. The architecture of claim 21 wherein the gain of the gain regulation block is approximately equal to the cascaded linear gain of the nonlinear transmitter and the gain of the linear receiver.
- 24. The architecture of claim 21 wherein the gain of the gain regulation block is approximately equal to the cascaded linear gains of the predistortion block and the nonlinear transmitter and the gain of the linear receiver.
- 25. An adaptive loop coupled to a transmitter having an input and an output, the adaptive loop comprising:
a linear receiver that converts a transmitter output signal; a predistortion block providing nonlinear amplification of an input signal to be amplified by the transmitter; a gain regulation block providing linear scaling by a complex number; an adaptive predistortion controller that estimates normalized nonlinearity of the adaptive loop and controls the predistortion block; and an adaptive gain controller that estimates normalized linear gain of the adaptive loop and controls the gain regulation block.
- 26. The adaptive loop of claim 25 and further comprising a time-division multiplexer that synchronizes time-slots for independent operation of the predistortion block and predistortion controller, and for the gain block and gain controller.
- 27. The adaptive loop of claim 25 wherein the linear receiver converts the output signal to a format consistent with the format of the input signal.
- 28. A controller for multi-channel transmitter linearization, comprising:
a bank of predistortion gain elements cascaded with the transmitter for modeling nonlinear transmitter gain, gain imbalance of channels, and crosstalk between the channels; and a bank of adaptive controllers optimizing the gains of the bank of predistortion gain elements based on an input signal to be transmitted, without coordinate transformation.
- 29. The controller of claim 28 wherein the bank of predistortion gain elements comprises n*2 real gain elements, where n is equal to the number of simultaneously transmitted components of the input signal that is the same as the number of channels in the transmitter.
- 30. The controller of claim 29 wherein n=2.
- 31. The controller of claim 28 wherein the controller comprises a PI controller and wherein an initial phase of a time-domain adaptive error falls in an interval between approximately −45 and +45 degrees to ensure convergence.
- 32. The controller of claim 28 wherein each of the adaptive controllers operates independently over a narrow dynamic range of the input signal.
- 33. The controller of claim 31 wherein each adaptive controller has a time constant with low sensitivity to changes of its power and statistics.
- 34. The controller of claim 31 wherein the adaptive controllers utilize the products of the single-bit sign of the input signal phases and the time-domain adaptive error.
- 35. The controller of claim 28 wherein an adaptive controller cancel DC level bias in the transmitter by adding the accumulated by a proportional-integral controller time-domain adaptive error to the predistorted by the gain bank input signal in a DC-level signal combiner located after the predistortion gain bank and before the transmitter.
- 36. A controller for memoryless gain based baseband linearization of a multi-channel signal transmitter, comprising:
a bank of predistortion gain elements cascaded with the transmitter for modeling overall nonlinear transmitter gain while minimizing channel effects; and an adaptive controller composed of a bank of proportional-integral controllers optimizing the gains of the bank of predistortion gain elements based on an input signal to be transmitted.
- 37. The controller of claim 36 wherein channel effects comprise gain imbalance of the transmitter channels and crosstalk between them.
- 38. A controller for multi-channel transmitter linearization, comprising:
four banks of gain elements; a gain elements selector coupled to an input signal; an in-phase signal selector coupled to the input signal; a quadrature-phase signal selector coupled to the input signal; an adaptive controller coupled to the input signal and to a feedback signal from the transmitter, wherein the adaptive controller provides gain control to the banks of gain elements, and a parametric DC offset control to the transmitter.
- 39. The controller of claim 38 wherein the in-phase signal selector is coupled to the gain elements of a bank of in-phase gain elements and a bank of quadrature-phase crosstalk elements.
- 40. The controller of claim 39 wherein the quadrature-phase signal selector is coupled to the gain elements of a bank of quadrature-phase gain elements and a bank of in-phase crosstalk elements.
- 41. The controller of claim 40 and further comprising a signal component combiner coupled to the outputs of each gain element in the banks of gain elements.
- 42. The controller of claim 41 wherein the signal component combiner combines signals from a selected set of four gain elements each from one of the four banks of gain elements that account for channel gain and crosstalk correction.
- 43. The controller of claim 42 and further comprising an adder for combining a predistorted input signal from the signal component combiner and the DC offset from the adaptive controller.
- 44. An adaptive controller for banks of gain elements for multi-channel transmitter linearization, the controller comprising:
a parametric information conditioner coupled to an input signal and a feedback signal from the transmitter; multiple banks of linear proportional-integral controllers coupled to the conditioner and providing gain values for the banks of gain elements; and a proportional-integral DC offset compensation controller coupled to the conditioner.
- 45. The adaptive controller of claim 44 wherein the parametric information conditioner comprises:
a delay element coupled to the input signal an error formation block coupled to the delay element and the feedback signal a controller selector coupled to the delay element; an in-phase signal quantizer coupled to the delay element; a real error selector; an imaginary error selector; and a quadrature-phase signal quantizer coupled to the delay element.
- 46. The adaptive controller of claim 45 wherein the parametric information conditioner provides:
a complex-valued error derived by subtracting the feedback signal from the delayed input signal in the error formation block; an in-phase error signal derived as a product of the real error and the quantized in-phase signal created respectively by the real error selector and the in-phase signal quantizer; an in-phase crosstalk error signal derived as a product of the real error and the quantized quadrature-phase signal created respectively by the real error selector and the quadrature-phase signal quantizer; quadrature-phase crosstalk error signal derived as a product of the imaginary error and the quantized in-phase signal created respectively by the imaginary error selector and the in-phase signal quantizer; and quadrature-phase error signal derived as a product of the imaginary error and the quantized quadrature-phase signal created respectively by the imaginary error selector and the quadrature-phase signal quantizer.
- 47. The adaptive controller of claim 46 wherein the parametric information conditioner provides in-phase error, in-phase crosstalk error, quadrature-phase crosstalk error and quadrature-phase error signals to four corresponding banks of linear proportional-integral controllers.
- 48. The adaptive controller of claim 46 wherein the parametric information conditioner comprises one-bit in-phase and quadrature-phase quantizers that provide at their outputs one value of positive or negative sign that corresponds unambiguously to the sign of signals at their inputs.
- 49. The adaptive controller of claim 44 wherein each of the banks of linear proportional-integral controllers comprises multiple error scaling blocks coupled to error accumulation blocks.
- 50. The adaptive controller of claim 49 wherein the banks of linear proportional-integral controllers provide in-phase, in-phase crosstalk, quadrature-phase crosstalk and quadrature-phase gain values.
- 51. The adaptive controller of claim 45 wherein the delay element provides a delay to account for finite propagation speeds of the input signal.
INCORPORATION BY REFERENCE
[0001] Co-pending commonly assigned U.S. patent application Ser. No. ______ Attorney Docket No. 778.054US1 filed on the same date herewith and titled “Adaptive Controller for Linearization of Transmitter” is hereby incorporated by reference.