Patent Grant
8654553
The present invention is generally directed to the field of power supplies. More specifically, the present invention is directed to providing adaptive digital control of the power factor correction front end of a switching mode power supply.
A power supply unit converts main AC voltage to one or more regulated DC voltages supplied to one or more loads, such as the internal components of a computer, server, or other electrical device. A digitally controlled switching mode power supply unit typically includes a primary side for power factor correction (PFC) and AC-to-DC voltage conversion, and a secondary side for DC-to-DC voltage conversion. The primary side is under control of a first digital signal controller (DSC) and the secondary side is under control of a separate second DSC or a digital control chip.
Adaptive control is a control method used by a controller which must adapt to a controlled system with parameters which vary, or are initially not optimized. Applying adaptive control to switching mode power supplies improves system performance. However, due to the non-linearity of the power train circuitry to be controlled, designing control parameters used in such an adaptive control is challenging.
One conventional approach for designing a loop controller for a switching mode power supply is to initially design control loop parameters based on a small signal model and Bodeplot. There is a separate small signal model for the primary side and the secondary side. Small signal modeling is a common analysis technique used to approximate the behavior of nonlinear devices with linear equations. In this manner, the power supply can be modeled using a mathematical model. Stability theory is then applied to design the digital controller in order to ensure that the switched mode power supply operates with sufficient phase margin and gain margin. In other words, the loop controller is designed to ensure that the power supply can operate at both steady state condition and transient state condition. The designed control loop parameters are finalized by trial and error, which is extremely time consuming, such as ranging from a couple of days to a few weeks. Additionally, the system performance is still subject to temperature and environment changes, which result in changes to the control loop parameters. As such, optimized performance can not be achieved as operating conditions change.
Another approach for designing the loop controller for a switching mode power supply is based on a system identification technique. The system identification technique adds functionality to the second DSC on the secondary side of the power supply. The second DSC is configured to determine system characteristics of the switching mode power supply under the current operating condition and to then adjust the control loop parameters according to the determined system characteristics. Parameters of the secondary-side small signal model are identified and then the parameters of the secondary-side loop controller are adjusted accordingly. To determine the system characteristics, such as the transfer function of the small signal model, white noise is injected into the power supply. The second DSC calculates the variance and covariance resulting from the injected noise to determine the system characteristics. Proper control loop parameters are calculated using the determined system characteristics, and these calculated control loop parameters replace the previous control loop parameters in the small signal model used by the second DSC. However, it is impractical to implement the system identification technique in a functioning power supply since injecting white noise can impact the stability of the system and even damage the power supply. Further, implementation of the system identification technique results in significant signal processing burden which requires a more powerful and expensive second DSC.
A method is directed to providing adaptive digital control for the PFC stage or front-end of a switching mode power supply. The method uses an evaluation model to adjust the control loop parameters of the control algorithm used by a controller on the primary side of the power supply. The method performs a series of step adjustments of the control loop parameter values to determine optimized values. In some embodiments, the method determines and compares the line current THD corresponding to different control loop parameter values. The method provides simplified digital control loop design, optimizes PFC front-end performance, improves system efficiency by decreasing harmonic ripples, and reduces labor cost and time to market due to shorter research and development phase. System performance optimization is fully adaptive adjusted for changes in operating conditions due to, for example, environmental and temperature variations.
In an aspect, a method of adaptively controlling a power supply is disclosed. The method includes configuring a switching mode power supply to include a transformer having a primary side and a secondary side, a primary side circuit under control of a primary side controller and a secondary side circuit under control of a secondary side controller, wherein the primary side controller controls the primary side circuit using a control algorithm that includes control loop parameters. The method also includes setting the control loop parameters to default control loop parameter values, and determining line current total harmonic distortion corresponding to the default control loop parameter values. The method also includes adjusting the control loop parameters, and determining line current total harmonic distortion corresponding to the adjusted control loop parameters. The method also includes comparing the line current total harmonic distortion corresponding to the adjusted control loop parameters to the line current total harmonic distortion corresponding to the default control loop parameter values to determine a lowest line current total harmonic distortion. The method also includes setting optimized control loop parameters using the control loop parameters corresponding to the lowest line current total harmonic distortion, and executing the control algorithm using the optimized control loop parameters.
Determining line current total harmonic distortion can include measuring a line current and applying a Fast Fourier Transform to the measured line current. Determining line current total harmonic distortion can further include performing a power spectral density analysis on the Fast Fourier Transform result. Alternatively, determining line current total harmonic distortion can include passing a line current through a set of band pass filters. Adjusting the control loop parameters can include increasing or decreasing each control loop parameter by a predefined increment. The primary side circuit can be configured for power factor correction and AC-to-DC voltage conversion. The secondary side circuit can be configured for DC-to-DC voltage conversion.
In another aspect, another method of adaptively controlling a power supply is disclosed. The method includes configuring a switching mode power supply to include a transformer having a primary side and a secondary side, a primary side circuit under control of a primary side controller and a secondary side circuit under control of a secondary side controller, wherein the primary side controller controls the primary side circuit using a control algorithm that includes control loop parameters. The method also includes setting the control loop parameters to default control loop parameter values, and determining line current total harmonic distortion corresponding to the default control loop parameter values. The method also includes adjusting the control loop parameters, and determining line current total harmonic distortion corresponding to the adjusted control loop parameters. The method also includes comparing the line current total harmonic distortion corresponding to the adjusted control loop parameters to the line current total harmonic distortion corresponding to the default control loop parameter values to determine a lowest line current total harmonic distortion. The method also includes setting improved control loop parameters using the control loop parameters corresponding to the lowest line current total harmonic distortion. The method also includes performing one or more iterations of adjusting the improved control loop parameters for a present iteration, determining a resulting line current total harmonic distortion corresponding to the present iteration, comparing the resulting line current total harmonic distortion of the present iteration to the determined line current total harmonic distortion corresponding to the improved control loop parameters of a previous iteration, and resetting the improved control loop parameters using the control loop parameters corresponding to the lowest line current total harmonic distortion, wherein the one or more iterations are repeated until an optimized criteria is achieved and the improved control loop parameters are set as optimized control loop parameters. The method also includes executing the control algorithm using the optimized control loop parameters.
Determining line current total harmonic distortion can include measuring a line current and applying a Fast Fourier Transform to the measured line current. Determining line current total harmonic distortion can further include performing a power spectral density analysis on the Fast Fourier Transform result. Alternatively, determining line current total harmonic distortion can include passing a line current through a set of band pass filters. The optimized criteria can include determining that the determined line current total harmonic distortion is less than a line current total harmonic distortion minimum threshold value. Adjusting the improved control loop parameters for the present iteration can include increasing or decreasing each improved control loop parameter by a predefined increment. The optimized criteria can be achieved when a minimum line current total harmonic distortion is determined through successive incrementing and decrementing of the improved control loop parameters. Adjusting the control loop parameters can include increasing or decreasing each control loop parameter by a predefined increment. The primary side circuit can be configured for power factor correction and AC-to-DC voltage conversion. The secondary side circuit can be configured for DC-to-DC voltage conversion.
In yet another aspect, an apparatus for adaptively controlling a power supply is disclosed. The apparatus includes a switching mode power supply with a transformer having a primary side circuit and a secondary side circuit, and a primary side controller configured to control the primary side circuit using a control algorithm that includes control loop parameters. The control algorithm is configured to set the control loop parameters to default control loop parameter values, and to determine line current total harmonic distortion corresponding to the default control loop parameter values. The control algorithm is also configured to adjust the control loop parameters, and determine line current total harmonic distortion corresponding to the adjusted control loop parameters. The control algorithm is also configured to compare the line current total harmonic distortion corresponding to the adjusted control loop parameters to the line current total harmonic distortion corresponding to the default control loop parameter values to determine a lowest line current total harmonic distortion. The control algorithm is also configured to set optimized control loop parameters using the control loop parameters corresponding to the lowest line current total harmonic distortion, and execute the control algorithm using the optimized control loop parameters.
The apparatus also includes a secondary side controller configured to control the secondary side circuit. The control algorithm can be further configured to perform one or more iterations of adjusting the improved control loop parameters for a present iteration, determine a resulting line current total harmonic distortion corresponding to the present iteration, compare the resulting line current total harmonic distortion of the present iteration to the determined line current total harmonic distortion corresponding to the improved control loop parameters of a previous iteration, and reset the improved control loop parameters using the control loop parameters corresponding to the lowest line current total harmonic distortion, wherein the one or more iterations are repeated until an optimized criteria is achieved and the improved control loop parameters are set as optimized control loop parameters. The primary side controller can be configured to determine line current total harmonic distortion by measuring a line current and applying a Fast Fourier Transform to the measured line current. The primary side controller can be further configured to perform a power spectral density analysis on the Fast Fourier Transform result. Alternatively, the apparatus can also include a set of band pass filters and the primary side controller can be further configured to determine line current total harmonic distortion by passing a line current through the set of band pass filters. The primary side controller can be configured to adjust the control loop parameters by increasing or decreasing each control loop parameter by a predefined increment. The primary side circuit can be configured for power factor correction and AC-to-DC voltage conversion. The secondary side circuit can be configured for DC-to-DC voltage conversion.
Several example embodiments are described with reference to the drawings, wherein like components are provided with like reference numerals. The example embodiments are intended to illustrate, but not to limit, the invention. The drawings include the following figures:
Embodiments of the present application are directed to a method of adaptive digital control of the power factor correction front end of a switching mode power supply. Those of ordinary skill in the art will realize that the following detailed description of the method is illustrative only and is not intended to be in any way limiting. Other embodiments of the method will readily suggest themselves to such skilled persons having the benefit of this disclosure.
Reference will now be made in detail to implementations of the method as illustrated in the accompanying drawings. The same reference indicators will be used throughout the drawings and the following detailed description to refer to the same or like parts. In the interest of clarity, not all of the routine features of the implementations described herein are shown and described. It will, of course, be appreciated that in the development of any such actual implementation, numerous implementation-specific decisions must be made in order to achieve the developer's specific goals, such as compliance with application and business related constraints, and that these specific goals will vary from one implementation to another and from one developer to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking of engineering for those of ordinary skill in the art having the benefit of this disclosure.
The first DSC includes a control algorithm which when executed provides a method of adaptive digital control of the PFC front end of the switching mode power supply unit. In some embodiments, the method optimizes system performance by minimizing line current total harmonic distortion (THD).
At the step 40, the sampled line current is processed by the first DSC to determine the line current THD. The line current THD determined at this step corresponds to the default values of the control loop parameters. The line current can be processed either in firmware or hardware. In some embodiments, a Fast Fourier Transform is applied to the sampled line current to generate the fundamental line current component and corresponding harmonics, referred to in whole as the line current THD. An additional power spectral density analysis can performed on the Fast Fourier Transform result, although typically the Fast Fourier Transform result is sufficient. Power spectral density, which represents a measurement of the energy at various frequencies by using complex conjugate, is analyzed after the Fast Fourier Transform for helping identify harmonics in cases of quite noisy environment. In other embodiments, a set of band pass filters are used and the line current is passed through the band pass filters to generate the line current THD. Setting the control loop parameters to the default values, sampling the line current, and determining the line current THD corresponding to the control loop parameter default values corresponds to a first iteration of the control algorithm. The control algorithm is configured as an evaluation model where the control loop parameters are systematically adjusted and the resulting line current THD is evaluated to arrive at optimized values. The control algorithm performs multiple iterations of setting the control loop parameter values, sampling the line current, and determining the line current THD corresponding to the set control loop parameter values for the present iteration. The line current THD for the present iteration is compared to the line current THD from the previous iteration to determine the better control loop parameter values. In some embodiments, the lower line current THD is considered to be the better configuration, and the corresponding control loop parameter values are considered to be the better values. Additional iterations determine better and better control loop parameter values until a defined criteria is reached or the lowest line current THD is found.
After the first iteration is completed at the step 40, the control loop parameter values are adjusted at the step 50. In order to avoid unstable operation of the power supply from adaptive control loop parameters, reasonable parameter boundaries are set for safe operation during parameter adjustments. Many different techniques can be used to systematically adjust the control loop parameter values until optimized values are determined. In some embodiments, each of the control loop parameter values is incremented and/or decremented by a defined interval value, such as in a mountain-climbing interval technique. In an exemplary implementation, each of the control loop parameter values is initially incremented by a predefined interval value. The interval value can be the same for each control loop parameter, or the interval value can be different from parameter to parameter. In this exemplary implementation, the initial adjustment is an increment. Alternatively, the initial adjustment for each control loop parameter value can be a decrement. Still alternatively, the initial adjustment can be an increment for some control loop parameters, and a decrement for other control loop parameters.
At the step 60, the power supply is operated under control of first DSC with the control loop parameters set at the adjusted values, as set at the step 50. At the step 70, while operating in normal state, the line current is sampled by the first DSC. At the step 80, the sampled line current is processed by the first DSC to determine the line current THD. The line current THD determined at this step corresponds to the adjusted values of the control loop parameters set during the present iteration, which at this stage is the second iteration.
At the step 90, the first iteration line current THD determined at the step 40 is compared to the second iteration line current THD determined at the step 80. The comparison determines which control loop parameter values result in the better configuration. In this exemplary implementation, the lower line current THD is considered to be the better configuration. If the line current THD corresponding to the first iteration is considered the better configuration, then the control loop parameter values are set at the default values. If the line current THD corresponding to the second iteration is considered the better configuration, then the control loop parameter values are set at the adjusted values, as in the step 50. In this manner, the control loop parameter values are optimized to either the default values or the adjusted values. At the step 100, one or more optional additional iterations can be performed to further optimize the control loop parameter values. Each additional iteration includes further adjusting the control loop parameter values, sampling the line current while operating in the normal state, determining the line current THD, and comparing the line current THD of the present iteration to the line current THD corresponding to the better configuration determined in the previous iteration.
If an additional iteration is to be performed, it is determined whether the control loop parameter values are to be incremented or decremented. If the most recent iteration, for example the second iteration, was determined to be the better configuration compared to the preceding iteration, for example the first iteration, then the control loop parameter values are adjusted in the same direction as the most recent iteration. For example, if the control loop parameter values were incremented in the second iteration, and the second iteration had the better configuration, then for the third iteration the control loop parameter values are again incremented. The line current is then sampled while the system operates in the normal state, the line current THD is determined and compared to the previous iteration. It is understood, that the “previous iteration” and the line current THD and control loop parameter values corresponding to the previous iteration refer to the determined better configuration, such that the present iteration is compared to the better configuration determined in the previous iteration. Subsequent iterations will continue to adjust the control loop parameter values in this same direction until the line current THD is not improved.
In the case where the second iteration does not result in an improved line current THD as compared to the first iteration, then for the third iteration the control loop parameter values are adjusted in the opposite direction as the adjustments made in the second iteration. For example, if the control loop parameter values were incremented in the second iteration, and the first iteration had the better configuration, then for the third iteration the control loop parameter values are decremented. The line current THD corresponds to the third iteration is compared to the line current THD of the first iteration, as in this case the better configuration from the “previous iteration” corresponds to the control loop parameter values and line current THD of the first iteration. If the line current THD corresponding to the third iteration is improved compared to the line current THD from the first iteration, then subsequent iterations will continue to adjust the control loop parameter values in this same direction, decrements in this case, until the line current THD is not improved.
In some embodiments, the additional iterations are performed with the increment or decrement adjustments made in the same direction, as described above, until a present iteration fails to result in an improved line current THD. At this point, the control loop parameter values from the previous iteration are determined to be optimized values. At the step 110, the system commences normal operation under control of the primary side controller executing the control algorithm using the optimized control loop parameter values.
In other embodiments, further refinement of the control loop parameter values can be performed once a present iteration fails to result in an improved line current THD. In some embodiments, a spiral approach can be used. For example, if the control loop parameter values had most recently been incremented, and the resulting line current THD did not improve, then a subsequent iteration can be performed where the control loop parameter values are decremented, but by a small interval than the preceding increments. The resulting line current THD is compared to the previous best configuration as before. Further iterations can be performed where the control loop parameter values are adjusted as increments or decrements in smaller by smaller intervals, thereby spiraling in on optimized control loop parameter values. A predefined criteria is used to conclude the refinement loop. For example, a defined number of refinement iterations can be performed, a minimum increment/decrement interval size is reached, or a minimum inter-iteration improvement in the line current THD is achieved. It is understood that other criteria can be used. In some cases, use of the refinement methodology enables larger increment sizes in the first one or more adjustments.
It is understood that the control loop parameter values, line current THDs, and any other corresponding results and variables associated with each iteration can be stored in memory for look-up and comparison to determine the optimized control loop parameter values. It is also understood that criteria other than the lowest line current THD can be used to determine the better configuration.
The method can be implemented at any time to determine optimized control loop parameter values. For example, the method can be implemented at device power-up, at defined time periods or intervals, or in response to changing operating conditions such as changes in the load, line voltage, or environmental conditions.
The method described above utilizes an evaluation model for optimizing the control loop parameter values used within the control algorithm executed by the primary side controller. The evaluation model utilizes a series of step adjustment of the control loop parameter values to determine optimized values. In the exemplary implementation described above, the evaluation model determines and compares the line current THD corresponding to different control loop parameter values. The evaluation model does not use a small signal model for determining the control loop parameter values, and as such also does not inject white noise into the system for identifying the small signal model, as in conventional approaches.
The evaluation model can be implemented as firmware executed by the primary side controller, or the primary side controller can be have a dedicated design for implementing the evaluation model, or the evaluation model can be implemented through the use of additional or modified hardware. For cost effectiveness, the part of firmware code for processing adaptive parameters' adjustment can be executed in firmware background operation.
The present application has been described in terms of specific embodiments incorporating details to facilitate the understanding of the principles of construction and operation of the method. Many of the components shown and described in the various figures can be interchanged to achieve the results necessary, and this description should be read to encompass such interchange as well. As such, references herein to specific embodiments and details thereof are not intended to limit the scope of the claims appended hereto. It will be apparent to those skilled in the art that modifications can be made to the embodiments chosen for illustration without departing from the spirit and scope of the application.
| Number | Name | Date | Kind |
|---|---|---|---|
| 4273406 | Okagami | Jun 1981 | A |
| 4370703 | Risberg | Jan 1983 | A |
| 4563731 | Sato et al. | Jan 1986 | A |
| 4645278 | Yevak et al. | Feb 1987 | A |
| 4712160 | Sato et al. | Dec 1987 | A |
| 4788626 | Neidig et al. | Nov 1988 | A |
| 4806110 | Lindeman | Feb 1989 | A |
| 4841220 | Tabisz et al. | Jun 1989 | A |
| 4857822 | Tabisz et al. | Aug 1989 | A |
| 4866367 | Ridley et al. | Sep 1989 | A |
| 4890217 | Conway | Dec 1989 | A |
| 4893227 | Gallios et al. | Jan 1990 | A |
| 4899256 | Sway-Tin | Feb 1990 | A |
| 4901069 | Veneruso | Feb 1990 | A |
| 5065302 | Kanazawa | Nov 1991 | A |
| 5090919 | Tsuji | Feb 1992 | A |
| 5101322 | Ghaem et al. | Mar 1992 | A |
| 5132890 | Blandino | Jul 1992 | A |
| 5235491 | Weiss | Aug 1993 | A |
| 5325283 | Farrington | Jun 1994 | A |
| 5365403 | Vinciarelli et al. | Nov 1994 | A |
| 5373432 | Vollin | Dec 1994 | A |
| 5442540 | Hua | Aug 1995 | A |
| 5673185 | Albach et al. | Sep 1997 | A |
| 5712772 | Telefus et al. | Jan 1998 | A |
| 5786992 | Vinciarelli et al. | Jul 1998 | A |
| 5790395 | Hagen | Aug 1998 | A |
| 5811895 | Suzuki et al. | Sep 1998 | A |
| 5838554 | Lanni | Nov 1998 | A |
| 5859771 | Kniegl | Jan 1999 | A |
| 5905369 | Ishii et al. | May 1999 | A |
| 5923543 | Choi | Jul 1999 | A |
| 5949672 | Bertnet | Sep 1999 | A |
| 5978238 | Liu | Nov 1999 | A |
| 6009008 | Pelly | Dec 1999 | A |
| 6091611 | Lanni | Jul 2000 | A |
| 6183302 | Daikuhara et al. | Feb 2001 | B1 |
| 6191957 | Peterson | Feb 2001 | B1 |
| 6272015 | Mangtani | Aug 2001 | B1 |
| 6275397 | McClain | Aug 2001 | B1 |
| 6307761 | Nakagawa | Oct 2001 | B1 |
| 6323627 | Schmiederer et al. | Nov 2001 | B1 |
| 6385059 | Telefus et al. | May 2002 | B1 |
| 6388897 | Ying et al. | May 2002 | B1 |
| 6390854 | Yamamoto et al. | May 2002 | B2 |
| 6396716 | Liu et al. | May 2002 | B1 |
| 6452816 | Kuranki | Sep 2002 | B2 |
| 6459175 | Potega | Oct 2002 | B1 |
| 6487098 | Malik et al. | Nov 2002 | B2 |
| 6549409 | Saxelby et al. | Apr 2003 | B1 |
| 6578253 | Herbert | Jun 2003 | B1 |
| 6721192 | Yang et al. | Apr 2004 | B1 |
| 6775162 | Mihai et al. | Aug 2004 | B2 |
| 6894461 | Hack et al. | May 2005 | B1 |
| 6919715 | Muratov et al. | Jul 2005 | B2 |
| 6989997 | Xu | Jan 2006 | B2 |
| 7035126 | Lanni | Apr 2006 | B1 |
| 7038406 | Wilson | May 2006 | B2 |
| 7102251 | West | Sep 2006 | B2 |
| 7139180 | Herbert | Nov 2006 | B1 |
| 7202640 | Morita | Apr 2007 | B2 |
| 7208833 | Nobori et al. | Apr 2007 | B2 |
| 7212420 | Liao | May 2007 | B2 |
| 7239532 | Hsu et al. | Jul 2007 | B1 |
| 7274175 | Manolescu | Sep 2007 | B2 |
| 7315460 | Kyono | Jan 2008 | B2 |
| 7386286 | Petrovic et al. | Jun 2008 | B2 |
| 7450388 | Beihoff et al. | Nov 2008 | B2 |
| 7564706 | Herbert | Jul 2009 | B1 |
| 7596007 | Phadke | Sep 2009 | B2 |
| 7701305 | Lin et al. | Apr 2010 | B2 |
| 7830684 | Taylor | Nov 2010 | B2 |
| 7924578 | Jansen et al. | Apr 2011 | B2 |
| 8059434 | Huang et al. | Nov 2011 | B2 |
| 8102678 | Jungreis | Jan 2012 | B2 |
| 8126181 | Yamamoto et al. | Feb 2012 | B2 |
| 8130522 | Maksimovic | Mar 2012 | B2 |
| 8134848 | Whittam et al. | Mar 2012 | B2 |
| 8155368 | Cheung et al. | Apr 2012 | B2 |
| 8194417 | Chang | Jun 2012 | B2 |
| 8207717 | Urono et al. | Jun 2012 | B2 |
| 8213200 | Shimizu | Jul 2012 | B2 |
| 8228696 | Uno | Jul 2012 | B2 |
| 8243472 | Chang et al. | Aug 2012 | B2 |
| 8369111 | Balakrishnan et al. | Feb 2013 | B2 |
| 8400801 | Shinoda | Mar 2013 | B2 |
| 20020008963 | Dibene et al. | Jan 2002 | A1 |
| 20020011823 | Lee | Jan 2002 | A1 |
| 20020036200 | Ulrich | Mar 2002 | A1 |
| 20030035303 | Balakrishnan et al. | Feb 2003 | A1 |
| 20030112645 | Schlecht | Jun 2003 | A1 |
| 20040183510 | Sutardja et al. | Sep 2004 | A1 |
| 20040255259 | Tan et al. | Dec 2004 | A1 |
| 20050024016 | Breen et al. | Feb 2005 | A1 |
| 20050036338 | Porter et al. | Feb 2005 | A1 |
| 20050117376 | Wilson | Jun 2005 | A1 |
| 20050138437 | Allen et al. | Jun 2005 | A1 |
| 20050194942 | Hack et al. | Sep 2005 | A1 |
| 20050225257 | Green | Oct 2005 | A1 |
| 20050254268 | Reinhard et al. | Nov 2005 | A1 |
| 20060002155 | Shteynberg et al. | Jan 2006 | A1 |
| 20060022637 | Wang et al. | Feb 2006 | A1 |
| 20060152947 | Baker et al. | Jul 2006 | A1 |
| 20060213890 | Kooken et al. | Sep 2006 | A1 |
| 20060232220 | Melis | Oct 2006 | A1 |
| 20070040516 | Chen | Feb 2007 | A1 |
| 20070120542 | LeMay | May 2007 | A1 |
| 20070121981 | Koh et al. | May 2007 | A1 |
| 20070138971 | Chen | Jun 2007 | A1 |
| 20070247091 | Maiocchi | Oct 2007 | A1 |
| 20070263415 | Jansen et al. | Nov 2007 | A1 |
| 20080018265 | Lee et al. | Jan 2008 | A1 |
| 20080043496 | Yang | Feb 2008 | A1 |
| 20080191667 | Kernahan et al. | Aug 2008 | A1 |
| 20090034299 | Lev | Feb 2009 | A1 |
| 20090045889 | Goergen et al. | Feb 2009 | A1 |
| 20090196073 | Nakahori | Aug 2009 | A1 |
| 20090290384 | Jungreis | Nov 2009 | A1 |
| 20100039833 | Coulson et al. | Feb 2010 | A1 |
| 20100289466 | Telefus et al. | Nov 2010 | A1 |
| 20100322441 | Weiss et al. | Dec 2010 | A1 |
| 20110132899 | Shimomugi et al. | Jun 2011 | A1 |
| 20110261590 | Liu | Oct 2011 | A1 |
| 20120112657 | Van Der Veen et al. | May 2012 | A1 |
| Number | Date | Country |
|---|---|---|
| 4217869 | Aug 1992 | JP |
| 10243640 | Sep 1998 | JP |
| 2000083374 | Mar 2000 | JP |
| 20000253648 | Sep 2000 | JP |
| 2004208357 | Jul 2004 | JP |
| Entry |
|---|
| EE Times.com—“Team Claims Midrange Wireless Energy Transfer”, by R. Colin Johnson, 4 pages, Nov. 6, 2007. |
| EE Times.com—“Wireless Beacon Could Recharge Consumer Devices”, by R. Colin Johnson, 3 pages, Nov. 6, 2007. |
| Novel Zero-Voltage and Zero-Current Switching (ZVZCS) Full Bridge PWM converter Using Coupled Output Inductor, Sep. 2002 IEEE, pp. 641-648. |
| “New Architectures for Radio-Frequency dc/dc Power Conversion”, Juan Rivas et al., Laboratory for Electromagnetic and Electronic Systems, Jan. 2004, Massachusetts Institute of Technology, Room 10-171 Cambridge, MA 02139, pp. 4074-4084. |
| “Randomized Modulation in Power Electronic Converters”. Aleksander M. Stankovic, member IEEE, and Hanoch Lev-Ari, vol. 90, No. 5, May 2002, pp. 782-799. |
| “Analysis and Special Characteristics of a Spread-Spectrum Technique for Conducted EMI Suppression”, K.K. tse, et al. Member IEEE, IEEE Transactions on Power Electronics, vol. 15., No. 2, Mar. 2000, pp. 399-410. |
| “Practical on-Line Identification of Power Converter Dynamic Respones”, Botao Miao et al., Colorado Power Electronics Center, ECE Department, 2005, pp. 57-62. |
| “A Modified Cross-Correlation Method for System Identification of Power Converters with Digital Control”, Botao Miao et al., Colorado Power Electronics Center, ECE Department, 2004, pp. 3728-3733. |
| “Design and Implementation of an Adaptive Tuning System Based on Desired Phase Margin for Digitally Controlled DC-DC Converters”, Jeffrey Morroni et al., Member IEEE, 2009, pp. 559-564. |
