This application claims foreign priority under 35 U.S.C. 119 from United Kingdom patent application No. 2214438.0 filed on 30 Sep. 2022, which is incorporated by reference herein in its entirety.
The present disclosure is directed to applying adaptive sharpening for blocks of upsampled pixels, e.g. for super resolution techniques.
The term ‘super resolution’ refers to techniques of upsampling an image that enhance the apparent visual quality of the image, e.g. by estimating the appearance of a higher resolution version of the image. When implementing super resolution, a system will attempt to find a higher resolution version of a lower resolution input image that is maximally plausible and consistent with the lower-resolution input image. Super resolution is a challenging problem because, for every patch in a lower-resolution input image, there is a very large number of potential higher-resolution patches that could correspond to it. In other words, super resolution techniques are trying to solve an ill-posed problem, since although solutions exist, they are not unique.
Super resolution has important applications. It can be used to increase the resolution of an image, thereby increasing the ‘quality’ of the image as perceived by a viewer. Furthermore, it can be used as a post-processing step in an image generation process, thereby allowing images to be generated at lower resolution (which is often simpler and faster) whilst still resulting in a high quality, high resolution image. An image generation process may be an image capturing process, e.g. using a camera. Alternatively, an image generation process may be an image rendering process in which a computer, e.g. a graphics processing unit (GPU), renders an image of a virtual scene. Compared to using a GPU to render a high resolution image directly, allowing a GPU to render a low resolution image and then applying a super resolution technique to upsample the rendered image to produce a high resolution image has potential to significantly reduce the latency, bandwidth, power consumption, silicon area and/or compute costs of the GPU. GPUs may implement any suitable rendering technique, such as rasterization or ray tracing. For example, a GPU can render a 960×540 image (i.e. an image with 518,400 pixels arranged into 960 columns and 540 rows) which can then be upsampled by a factor of 2 in both horizontal and vertical dimensions (which is referred to as ‘2× upsampling’) to produce a 1920×1080 image (i.e. an image with 2,073,600 pixels arranged into 1920 columns and 1080 rows). In this way, in order to produce the 1920×1080 image, the GPU renders an image with a quarter of the number of pixels. This results in very significant savings (e.g. in terms of latency, power consumption and/or silicon area of the GPU) during rendering and can for example allow a relatively low-performance GPU to render high-quality, high-resolution images within a low power and area budget, provided a suitably efficient and high-quality super-resolution implementation is used to perform the upsampling.
In some systems, the processing module 104 may implement a neural network to upsample the input image 102 to produce the upsampled output image 106. Implementing a neural network may produce good quality output images, but often requires a high performance computing system (e.g. with large, powerful processing units and memories) to implement the neural network. Furthermore, the neural network needs to be trained, and depending on the training the neural network may only be suitable for processing some input images. As such, implementing a neural network for performing upsampling of images may be unsuitable for reasons of processing time, latency, bandwidth, power consumption, memory usage, silicon area and compute costs. These considerations of efficiency are particularly important in some devices, e.g. small, battery operated devices with limited compute and bandwidth resources, such as mobile phones and tablets.
Some systems therefore do not use a neural network for performing super resolution on images, and instead use more conventional processing modules. For example, some systems split the problem into two stages: (i) upsampling and (ii) adaptive sharpening. The upsampling stage can be performed cheaply, e.g. using bilinear upsampling, and the adaptive sharpening stage can be used to sharpen the image, i.e. reduce the blurring introduced by the upsampling.
In step S202 the input image is received at the processing module 104.
In step S204 the processing module 104 upsamples the input image using, for example, a bilinear upsampling process. Bilinear upsampling is known in the art and uses linear interpolation of adjacent input pixels in two dimensions to produce output pixels at positions between input pixels. For example, when implementing 2× upsampling: (i) to produce an output pixel that is halfway between two input pixels in the same row, the average of those two input pixels is determined; (ii) to produce an output pixel that is halfway between two input pixels in the same column, the average of those two input pixels is determined; and (iii) to produce an output pixel that is not in the same row or column as any of the input pixels, the average of the four nearest input pixels is determined. The upsampled image that is produced in step S204 is stored in some memory within the processing module 104.
In step S206 the processing module 104 applies adaptive sharpening to the upsampled image to produce an output image. The output image is a sharpened, upsampled image. The adaptive sharpening is achieved by applying an adaptive kernel to regions of upsampled pixels in the upsampled image, wherein the weights of the kernel are adapted based on the local region of upsampled pixels of the upsampled image to which the kernel is applied, such that different levels of sharpening are applied to different regions of upsampled pixels depending on local context.
In step S208 the sharpened, upsampled image 106 is output from the processing module 104.
General aims for systems implementing super resolution are: (i) high quality output images, i.e. for the output images to be maximally plausible given the low resolution input images, (ii) low latency so that output images are generated quickly, (iii) a low cost processing module in terms of resources such as power, bandwidth and silicon area.
This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
There is provided a method of applying adaptive sharpening, fora block of input pixels for which upsampling is performed, to determine a block of output pixels, the method comprising:
Said using the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels may comprise applying the one or more bilateral sharpening kernels after said combining each of the one or more range kernels with a sharpening kernel to determine the one or more bilateral sharpening kernels.
The sharpening kernel may be an unsharp mask kernel.
The unsharp mask kernel may have a plurality of unsharp mask values, wherein the unsharp mask value K(x) at a position, x, relative to the centre of the unsharp mask kernel may have a value given by K(x)=I(x)+s (x)−G(x)), where I(x) is a value at position x within an identity kernel representing the identity function, and where G(x) is a value at position x within a spatial Gaussian kernel representing a spatial Gaussian function, and s is a scale factor, wherein the unsharp mask kernel, the identity kernel and the spatial Gaussian kernel may be the same size and shape as each other. The spatial Gaussian function may be of the form
where σspatial is a parameter representing a standard deviation of the spatial Gaussian function, and where A is a scalar value.
Each of the one or more range kernels may have a plurality of range kernel values, wherein the range kernel value R (x) at a position, x, of the range kernel may be given by a range Gaussian function. The range Gaussian function may be of the form
where I(x) is the value of the upsampled pixel at position x in the block of upsampled pixels, where I(xi) is the value of the upsampled pixel at a position corresponding to the centre of the range kernel, where σrange is a parameter representing the standard deviation of the range Gaussian function, and where B is a scalar value.
Each of the one or more range kernels, the sharpening kernel and each of the one or more bilateral sharpening kernels may be the same size and shape as each other.
Each of the one or more range kernels may be combined with the sharpening kernel by performing elementwise multiplication to determine the one or more bilateral sharpening kernels.
The method may further comprise normalising each of the one or more bilateral sharpening kernels prior to said using the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels.
Said obtaining a block of upsampled pixels may comprise upsampling the block of input pixels. Said upsampling the block of input pixels may comprise performing bilinear upsampling on the block of input pixels. For example, performing bilinear upsampling on the block of input pixels may comprise performing a convolution transpose operation on the block of input pixels using a bilinear kernel.
Said obtaining a block of upsampled pixels may comprise receiving the block of upsampled pixels.
Said determining one or more range kernels may comprise determining a plurality of range kernels, and said determining a plurality of range kernels may comprise determining, for each of a plurality of partially overlapping sub-blocks of upsampled pixels within the block of upsampled pixels, a respective range kernel based on the upsampled pixels of that sub-block of upsampled pixels.
Said using the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels may comprise determining each of the output pixels by applying to a respective one of the plurality of partially overlapping sub-blocks of upsampled pixels, the respective bilateral sharpening kernel that was determined by combining the respective range kernel determined for that sub-block of upsampled pixels with the sharpening kernel.
The block of input pixels may be an m×m block of input pixels; the block of upsampled pixels may be a n×n block of upsampled pixels; each of the sub-blocks of upsampled pixels may be a p×p sub-block of upsampled pixels; each of the range kernels may be a p×p range kernel; the sharpening kernel may be a p×p sharpening kernel; each of the bilateral sharpening kernels may be a p×p bilateral sharpening kernel; and the block of output pixels may be a q×q block of output pixels. In examples described herein n>m, and it may be the case that n=p+1 and p may be odd. In one example, m=4, n=6, p=5 and q=2. In another example, m=5, n=8, p=7 and q=2.
Said determining one or more range kernels may comprise determining a single range kernel based on upsampled pixels of the block of upsampled pixels, and a single bilateral sharpening kernel may be determined by combining the single range kernel with the sharpening kernel.
Said using the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels may comprise:
using the single bilateral sharpening kernel to determine a plurality of bilateral sharpening subkernels by performing kernel decomposition; and applying each of the bilateral sharpening subkernels to the block of input pixels to determine respective output pixels of the block of output pixels.
Said using the single bilateral sharpening kernel to determine a plurality of bilateral sharpening subkernels by performing kernel decomposition may comprise: upsampling the single bilateral sharpening kernel; and deinterleaving the values of the upsampled bilateral sharpening kernel to determine the plurality of bilateral sharpening subkernels. The method may further comprise normalising the bilateral sharpening subkernels.
The method may further comprise padding the upsampled bilateral sharpening kernel with one or more rows and/or one or more columns of zeros prior to deinterleaving the values of the upsampled bilateral sharpening kernel to determine the plurality of bilateral sharpening subkernels.
The block of input pixels may be an m×m block of input pixels; the block of upsampled pixels may be a n×n block of upsampled pixels; the single range kernel may be a p×p range kernel; the sharpening kernel may be a p×p sharpening kernel; the bilateral sharpening kernel may be a p×p bilateral sharpening kernel; the block of output pixels may be a q×q block of output pixels; the upsampled bilateral sharpening kernel may be a u×u upsampled bilateral sharpening kernel; the padded upsampled bilateral sharpening kernel may be a t×t padded upsampled bilateral sharpening kernel; each of the bilateral sharpening subkernels may be a m×m bilateral sharpening subkernel; and the number of bilateral sharpening subkernels may be v. In examples described herein n>m, and it may be the case that t mod v=0, and p may be odd. As an example, m=4, q=2, n=7, p=5, u=7, t=8, v=4.
Said determining one or more range kernels may comprise determining a single range kernel based on the upsampled pixels of one sub-block of upsampled pixels from a plurality of partially overlapping sub-blocks of upsampled pixels within the block of upsampled pixels, and wherein a single bilateral sharpening kernel may be determined by combining the single range kernel with the sharpening kernel. Said using the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels may comprise determining each of the output pixels by applying the single bilateral sharpening kernel to a respective one of the plurality of partially overlapping sub-blocks of upsampled pixels.
The method may further comprise outputting the block of output pixels for storage in a memory, for display or for transmission.
There is provided a processing module configured to apply adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the processing module comprising output pixel determination logic configured to:
The processing module may further comprise upsampling logic configured to determine the block of upsampled pixels based on the block of input pixels and to provide the block of upsampled pixels to the output pixel determination logic.
The output pixel determination logic may be further configured to:
The output pixel determination logic may be configured to determine the indication of contrast by:
There may be provided a processing module configured to perform any of the methods described herein.
There may be provided a method of applying adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the method comprising:
There may be provided a processing module configured to apply adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the processing module comprising output pixel determination logic configured to:
There may be provided a method of applying adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the method comprising:
There may be provided a processing module configured to apply adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the processing module comprising output pixel determination logic configured to:
use the bilateral sharpening kernel to determine a plurality of bilateral sharpening subkernels by performing kernel decomposition; and
There may be provided a method of applying adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the method comprising:
There may be provided a processing module configured to apply adaptive sharpening, for a block of input pixels for which upsampling is performed, to determine a block of output pixels, the processing module comprising output pixel determination logic configured to:
The processing module may be embodied in hardware on an integrated circuit. There may be provided a method of manufacturing, at an integrated circuit manufacturing system, a processing module. There may be provided an integrated circuit definition dataset that, when processed in an integrated circuit manufacturing system, configures the system to manufacture a processing module. There may be provided a non-transitory computer readable storage medium having stored thereon a computer readable description of a processing module that, when processed in an integrated circuit manufacturing system, causes the integrated circuit manufacturing system to manufacture an integrated circuit embodying a processing module.
There may be provided an integrated circuit manufacturing system comprising: a non-transitory computer readable storage medium having stored thereon a computer readable description of the processing module; a layout processing system configured to process the computer readable description so as to generate a circuit layout description of an integrated circuit embodying the processing module; and an integrated circuit generation system configured to manufacture the processing module according to the circuit layout description.
There may be provided computer program code for performing any of the methods described herein. There may be provided non-transitory computer readable storage medium having stored thereon computer readable instructions that, when executed at a computer system, cause the computer system to perform any of the methods described herein.
The above features may be combined as appropriate, as would be apparent to a skilled person, and may be combined with any of the aspects of the examples described herein.
Examples will now be described in detail with reference to the accompanying drawings in which:
The accompanying drawings illustrate various examples. The skilled person will appreciate that the illustrated element boundaries (e.g., boxes, groups of boxes, or other shapes) in the drawings represent one example of the boundaries. It may be that in some examples, one element may be designed as multiple elements or that multiple elements may be designed as one element. Common reference numerals are used throughout the figures, where appropriate, to indicate similar features.
The following description is presented by way of example to enable a person skilled in the art to make and use the invention. The present invention is not limited to the embodiments described herein and various modifications to the disclosed embodiments will be apparent to those skilled in the art.
Embodiments will now be described by way of example only. The super resolution techniques described herein implement upsampling and adaptive sharpening. It is noted that the memory in the system described in the background section that is used to store the upsampled image that is produced in step S204 takes up a significant amount of silicon area, and writing data to and reading data from the memory adds significant latency, bandwidth and power consumption to that system. Here “bandwidth” refers to the amount of data that is transferred to and from the memory per unit time. In contrast, in examples described herein a memory for storing an upsampled image prior to applying adaptive sharpening is not needed. Furthermore, examples described herein provide improvements to the adaptive sharpening process. In particular, examples described herein provide high quality results (in terms of the high resolution output pixels being highly plausible given the low resolution input images, with a reduction in artefacts such as blurring in the output image) and can be implemented in more efficient systems with reduced latency, power consumption and/or silicon area compared to prior art super resolution systems.
Bilateral filters are known to those skilled in the art. A conventional bilateral filter is an edge-preserving smoothing filter, which replaces the intensity of each pixel with a weighted average of intensity values from nearby pixels. The weights are typically based on a Gaussian function, wherein the weights depend not only on Euclidean distance between pixel locations, but also on the differences in intensity. This preserves sharp edges in an image, i.e. it avoids blurring over sharp edges between regions having significantly different intensities. A conventional bilateral filter is composed of two kernels: (i) a spatial Gaussian kernel that performs Gaussian smoothing, and (ii) a range kernel that rejects significantly different pixels.
For example, a bilateral filter may be defined as:
where W is a normalisation term and is defined as W=Σx
In examples described herein, a bilateral adaptive sharpening approach is implemented, e.g. for super resolution techniques. Rather than combining the range kernel with a spatial Gaussian smoothing kernel, the range kernel is combined with a sharpening kernel (e.g. an unsharp mask kernel) to create a bilateral sharpening kernel. The bilateral sharpening kernel can then be used to determine the output pixels. The range kernel is determined based on a particular block of input pixels that is being upsampled and sharpened so the bilateral sharpening kernel depends upon the block of input pixels being sharpened, and as such the sharpening that is applied is “adaptive” sharpening. Furthermore, the use of the range kernel means that more sharpening is applied to regions of low contrast (i.e. regions in which the range kernel has a relatively high value) and less sharpening is applied to regions of high contrast (i.e. regions in which the range kernel has a relatively low value). Applying more sharpening to regions of low contrast in the image than to regions of high contrast in the image can enhance the appearance of detail in regions of low contrast. Furthermore, the use of the bilateral sharpening kernel (in particular due to the range kernel) avoids or reduces overshoot artefacts which can occur when too much sharpening is applied in regions of high contrast using other sharpening techniques (e.g. around edges between regions with large differences in pixel value).
The format of the pixels could be different in different examples. For example, the pixels could be in YUV format, and the upsampling may be applied to each of the Y, U and V channels separately. The Y channel can be adaptively sharpened as described herein. The human visual system is not as perceptive to detail at high spatial frequencies in the U and V channels as in the Y channel, so the U and V channels may or may not be adaptively sharpened. If the input pixel data is in RGB format then it could be converted into YUV format (e.g. using a known colour space conversion technique) and then processed as data in Y, U and V channels. Alternatively, if the input pixel data is in RGB format then the techniques described herein could be implemented on the R, G and B channels as described herein, wherein the G channel may be considered to be a proxy for the Y channel.
A method of using the processing module 304 to apply adaptive sharpening, for a block of input pixels 302 for which upsampling is performed, to determine a block of output pixels 306, e.g. for implementing a super resolution technique, is described with reference to the flow chart of
In step S402 the block of input pixels 302 is received at the processing module 304. The block of input pixels 302 may for example be a 4×4 block of input pixels (as shown in
In step S404 the upsampling logic 308 determines a block of upsampled pixels based on the block of input pixels 302. The output pixels of the block of output pixels 306 are upsampled pixels (relative to the input pixels of the block of input pixels 302). The upsampling logic 308 could determine the block of upsampled pixels according to any suitable technique, such as by performing bilinear upsampling on the block of input pixels 302. Techniques for performing upsampling, such as bilinear upsampling are known to those skilled in the art. For example, bilinear upsampling may be performed by performing a convolution transpose operation on the block of input pixels using a bilinear kernel (e.g. a 3×3 bilinear kernel of the form
The block of upsampled pixels represents a higher resolution version of at least part of the block of input pixels. The upsampled pixels of the block of upsampled pixels determined by the upsampling logic 308 are not sharp. In particular, the upsampling process performed by the upsampling logic 308 (e.g. bilinear upsampling) may result in blurring in the upsampled pixels. The block of upsampled pixels is passed to, and received by, the output pixel determination logic 310. As described below, the output pixel determination logic 310 is configured to apply adaptive sharpening to the block of upsampled pixels.
The processing module 304 is configured to obtain the block of upsampled pixels by determining the block of upsampled pixels using the upsampling logic 308. In other examples, the processing module 304 could obtain the block of upsampled pixels by receiving the block of upsampled pixels which have been determined somewhere other than on the processing module 304.
In step S406 the output pixel determination logic 310 determines one or more range kernels based on a plurality of upsampled pixels of the block of upsampled pixels. Each of the one or more range kernels, R, has a plurality of range kernel values, wherein the range kernel value R(I(xi)−I(x)) at a position, x, of the range kernel may be given by a range Gaussian function. Although in the examples described herein the range kernel values are given by a range Gaussian function, in other examples the range kernel values may be given by a different (e.g. non-Gaussian) function.
A range kernel is defined in image-space, i.e. it has range kernel values for respective upsampled pixel positions. However, the range Gaussian function has a Gaussian form in ‘intensity-space’ rather than in image-space. For example, the range Gaussian function may be of the form
where I(x) is the value of the upsampled pixel at position x in the block of upsampled pixels, where I(xi) is the value of the upsampled pixel at a position corresponding to the centre of the range kernel, where σrange is a parameter representing the standard deviation of the range Gaussian function, and where B is a scalar value. As an example, B may be 1. Where R(I(xi)−I(x)) is used in a normalised bilateral filter as described above, the choice of B may essentially be arbitrary, since it would be cancelled out during normalisation of the bilateral filter's weights.
Since the range kernels are determined based on the upsampled pixels their resolution and alignment matches the intensities in the upsampled image better than if the range kernels were determined based on the input pixels (i.e. the non-upsampled pixels). This was found to be beneficial because mismatches in the resolution or alignment between the range kernels and the upsampled pixels may result in visible errors when combined with the sharpening kernel. For example, such errors may include “shadowing”, where an edge in the range kernel would be misplaced by a fixed amount corresponding to the offset between the input and upsampled images, creating a dark shadow or corresponding bright highlight along the output edge in the upsampled image.
In step S408 the output pixel determination logic 310 combines each of the one or more range kernels with a sharpening kernel to determine one or more bilateral sharpening kernels. Each of the one or more range kernels is combined with the same sharpening kernel to determine a respective bilateral sharpening kernel. Each of the one or more range kernels may be combined with the sharpening kernel by performing elementwise multiplication to determine the respective bilateral sharpening kernel. In the examples described herein the range kernel(s), the sharpening kernel and the bilateral sharpening kernel(s) are the same size and shape as each other.
The sharpening kernel may be an unsharp mask kernel. In other examples, the sharpening kernel may be a different type of sharpening kernel, e.g. the sharpening kernel could be constructed by finding a least-squares optimal inverse to a given blur kernel. Unsharp masking is a known technique for applying sharpening. Conceptually, according to an unsharp masking technique: (i) a blurred version of an input image is determined, e.g. by convolving the image with a Gaussian kernel, wherein the width of the Gaussian kernel defines the amount of blurring that is applied, (ii) the difference between the original input image and the blurred image is determined, and (iii) the determined difference is multiplied by a (usually predetermined) scale factor and added to the original input image to determine the sharpened image. In this way the “unsharp” (i.e. blurred) version of the image is “masked” (i.e. subtracted) which is why the sharpening technique is called “unsharp masking”. Unsharp masking is an effective way of sharpening an image but, as a spatially invariant linear high-boost filter, it can introduce ‘overshoot’ artefacts around high-contrast edges, which can be detrimental to perceived image quality.
For example, an unsharp mask kernel, K, is determined as K=I+s (I−G), where I is an identity kernel representing the identity function; G is a spatial Gaussian kernel representing a spatial Gaussian function having a variance σ2; and s is a scale factor. The unsharp mask kernel K, the identity kernel I and the spatial Gaussian kernel G are the same size and shape as each other, e.g. they may each be of size p×p where p is an integer. The unsharp mask kernel, K, has a plurality of unsharp mask values, wherein the unsharp mask value K(x) at a position, x, relative to the centre of the unsharp mask kernel has a value given by K(x)=I(x)+s(I(x)−G(x)), where I(x) is a value at position x within the identity kernel representing the identity function, and where G(x) is a value at position x within the spatial Gaussian kernel representing a spatial Gaussian function. There are two free parameters here, namely the scale factor s and the variance σ2 of the Gaussian kernel G, which in some implementations may be exposed as tuneable parameters, and in others may be “baked into” the choice of fixed weights in the kernels for economy, simplicity, and ease of implementation. The variance, σ2, governs the spatial extent of the sharpening effect applied to edges, and s governs the strength of the sharpening effect.
where σspatial is a parameter representing a standard deviation of the spatial Gaussian function, and where A is a scalar value that is chosen such that the sum of the values in the spatial Gaussian function is 1; that is, so that the spatial Gaussian kernel is normalised.
In step S410 the output pixel determination logic 310 uses the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels. The output pixel determination logic 310 may use the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels in step S410 by applying the one or more bilateral sharpening kernels previously generated in step S408 by combining each of the one or more range kernels with a sharpening kernel. In other words, the one or more bilateral sharpening kernels are applied (in step S410) after the one or more range kernels are combined with a sharpening kernel to generate the one or more bilateral sharpening kernels (in step S408). Ways in which the bilateral sharpening kernels can be used to determine the output pixels are described in detail below with reference to different examples.
In some examples, between steps S408 and S410 there may be a step of normalising each of the one or more bilateral sharpening kernels. A kernel can be normalised by summing all of the values in the kernel and then dividing each of the values by the result of the sum to determine the values of the normalised kernel.
In step S412 the block of output pixels 306 is output from the output pixel determination logic 310, and output from the processing module 304. The output pixels in the block of output pixels have been upsampled and adaptively sharpened. When the block of upsampled pixels 306 has been output, then the method can be repeated for the next block of input pixels by striding across the input image with a stride of 1, and by striding the output by 2, such that a 2× upsampling is achieved. In other words, for each pixel of the input image we take a block of input pixels (e.g. a 4×4 block of input pixels) and we output a 2×2 block of (upsampled) output pixels. By doing this across the whole input image, the resolution of the image is doubled, i.e. the number of pixels is multiplied by four, and the upsampled pixels are adaptively sharpened. The pixels may be processed in raster scan order, i.e. in rows from top to bottom and within each row from left to right, or in any other suitable order, e.g. boustrophedon order or Morton order. After the block of output pixels 306 has been output from the processing module 304 it may be used in any suitable manner, e.g. it may be stored in a memory, displayed on a display or transmitted to another device. It is noted that in the processing module 304 the upsampling and adaptive sharpening may be performed for blocks of input pixels in a single pass through the processing module 304, rather than implementing a two-stage process of upsampling the whole, or part of, the input image and then sharpening the whole, or part of, the upsampled image, which may require some intermediate storage between the two stages to store the upsampled (but unsharpened) image. Furthermore, it is noted that in the examples described herein the block of output pixels is a 2×2 block of output pixels, but in other examples the block of output pixels could be a different size and/or shape.
A first embodiment of a first example implementation is described with reference to
The method starts with step S402 as described above in which the block of input pixels 602 is received at the processing module 304. The block of input pixels 602 is a 4×4 block of input pixels. The block of input pixels 602 is passed to the upsampling logic 308. In step S404 the upsampling logic 308 determines a block of upsampled pixels 604 based on the block of input pixels 602. As described above, the upsampling logic 308 could determine the block of upsampled pixels 604 according to any suitable technique, such as by performing bilinear upsampling on the block of input pixels 602. In the embodiment of the first example shown in
In this example, step S406 of determining one or more range kernels comprises step S702 in which a plurality of range kernels are determined. In particular, in step S702, the output pixel determination logic 310 determines, for each of a plurality of partially overlapping sub-blocks of upsampled pixels 606 within the block of upsampled pixels 604, a respective range kernel 608 based on the upsampled pixels of that sub-block of upsampled pixels 606. In particular, as shown in
In this example, step S408 of combining the range kernels with a sharpening kernel comprises step S704. In step S704 the output pixel determination logic 310 combines the range kernel for each sub-block with a sharpening kernel to determine a bilateral sharpening kernel for each sub-block. The sharpening kernel is not shown in
In this example, step S410 of using the one or more bilateral sharpening kernels to determine the output pixels of the block of output pixels comprises step S706. In step S706 the output pixel determination logic 310 determines each of the output pixels of the block of output pixels 616 by applying to a respective one of the plurality of partially overlapping sub-blocks of upsampled pixels 606, the respective bilateral sharpening kernel that was determined by combining the respective range kernel 608 determined for that sub-block of upsampled pixels 606 with the sharpening kernel. As shown in
In some examples, the bilateral sharpening kernels 610 may be determined in such a way in step S704 that they are normalised, such that a separate step of normalising the bilateral sharpening kernels is not necessary.
As described above, in step S412 the block of output pixels 616 is output from the output pixel determination logic 310, and output from the processing module 304. The method can then be repeated for the next block of input pixels by striding across the input image with a stride of 1, and by striding the output by 2 such that a 2× upsampling is achieved. After the block of output pixels 616 has been output from the processing module 304 it may be used in any suitable manner, e.g. it may be stored in a memory, displayed on a display or transmitted to another device. It will be appreciated that the same principle may be applied to achieve other upsampling factors such as 3× and 4×, and that the example implementation described with respect to
So, in the first example shown in
A second embodiment of the first example implementation is described with reference to
In the second embodiment of the first example, the method starts with step S402 as described above in which the block of input pixels 802 is received at the processing module 304. In the example shown in
The partially overlapping sub-blocks (8061, 8062, 8063 and 8064) are 7×7 sub-blocks of upsampled pixels. In step S406 (i.e. step S702) the output pixel determination logic 310 determines a respective range kernel (8081, 8082, 8083 and 8084) for each of the partially overlapping sub-blocks of upsampled pixels (8061, 8062, 8063 and 8064). In the example shown in
In step S408 (i.e. step S704) the output pixel determination logic 310 combines each of the range kernels (8081, 8082, 8083 and 8084) with a sharpening kernel to determine a respective bilateral sharpening kernel (8101, 8102, 8103 and 8104). The bilateral sharpening kernels (8101, 8102, 8103 and 8104) can each be normalised to determine the normalised bilateral sharpening kernels (8121, 8122, 8123 and 8124). In the example shown in
In step S410 (i.e. step S706) the output pixel determination logic 310 determines each of the output pixels of the block of output pixels 816 by applying the bilateral sharpening kernels (or the normalised bilateral sharpening kernels (8121, 8122, 8123 and 8124)) to the respective sub-blocks of upsampled pixels (8061, 8062, 8063 and 8064).
In step S412 the block of output pixels 816 is output from the output pixel determination logic 310, and output from the processing module 304. The method can then be repeated for the next block of input pixels by striding across the input image with a stride of 1, and by striding the output by 2 such that a 2× upsampling is achieved. After the block of output pixels 816 has been output from the processing module 304 it may be used in any suitable manner, e.g. it may be stored in a memory, displayed on a display or transmitted to another device. It will be appreciated that the same principle may be applied to achieve other upsampling factors such as 3× and 4×, and that the example implementation described with respect to
In general, in the first example (shown in the embodiments of
A second example implementation is described with reference to
The method starts with step S402 as described above in which the block of input pixels 902 is received at the processing module 304. The block of input pixels 902 is a 4×4 block of input pixels. The block of input pixels 902 is passed to the upsampling logic 308. In step S404 the upsampling logic 308 determines a block of upsampled pixels 904 based on the block of input pixels 902. As described above, the upsampling logic 308 could determine the block of upsampled pixels 904 according to any suitable technique, such as by performing bilinear upsampling on the block of input pixels 902. In the example shown in
In this example, step S406 of determining one or more range kernels comprises step S1002 in which a single range kernel is determined. In particular, in step S1002, the output pixel determination logic 310 determines a single range kernel 906 based on upsampled pixels of the block of upsampled pixels 904. In particular, the range kernel 906 is based on the central 5×5 upsampled pixels in the block of upsampled pixels 904, which are indicated by the dashed box 905 in
In this example, step S408 of combining the range kernel with a sharpening kernel comprises step S1004. In step S1004 the output pixel determination logic 310 combines the single range kernel 906 with the sharpening kernel to determine a single bilateral sharpening kernel 908. In this example, the sharpening kernel and the bilateral sharpening kernel 908 are 5×5 kernels.
In this example, step S410 of using the bilateral sharpening kernel 908 to determine the output pixels of the block of output pixels 916 comprises steps S1006 and S1008. In step S1006 the output pixel determination logic 310 uses the bilateral sharpening kernel 908 to determine a plurality of bilateral sharpening subkernels 912 by performing kernel decomposition.
In step S1102 the output pixel determination logic 310 (or the upsampling logic 308) upsamples the bilateral sharpening kernel 908 to determine an upsampled bilateral sharpening kernel 909. The upsampling of the bilateral sharpening kernel 908 could be performed according to any suitable technique, such as by performing bilinear upsampling. Techniques for performing upsampling, such as bilinear upsampling are known to those skilled in the art. For example, bilinear upsampling may be performed by performing a convolution operation on the bilateral sharpening kernel 908 using a bilinear kernel (e.g. a 3×3 bilinear kernel of the form
In the embodiment of the second example shown in
In step S1104 the output pixel determination logic 310 pads the upsampled bilateral sharpening kernel with one or more rows and/or one or more columns of zeros. The result of the padding is an 8×8 upsampled bilateral sharpening kernel 910 in the example shown in
In step S1106 the output pixel determination logic 310 deinterleaves the values of the (padded) upsampled bilateral sharpening kernel 910 to determine the plurality of bilateral sharpening subkernels 9121, 9122, 9123 and 9124. The different types of hatching in
In step S1108 the output pixel determination logic 310 normalises the bilateral sharpening subkernels 9121, 9122, 9123 and 9124. As described above, the normalisation of a bilateral sharpening subkernel can be performed by summing all of the values in the bilateral sharpening subkernel and then dividing each of the values by the result of the sum to determine the values of the normalised bilateral sharpening subkernel. In some examples, the bilateral sharpening subkernels 9121, 9122, 9123 and 9124 may be determined in such a way that they are normalised, such that a separate step of normalising the bilateral sharpening subkernels (i.e. step S1108) is not necessary.
In step S1008 the output pixel determination logic 310 applies each of the bilateral sharpening subkernels (9121, 9122, 9123 and 9124) to the block of input pixels 902 to determine respective output pixels of the block of output pixels 916. In particular, the first bilateral sharpening subkernel 9121 is applied to the block of input pixels 902 to determine the first output pixel (e.g. the top left output pixel, which is shown with diagonal hatching sloping upwards to the right in
In some implementations steps S1106 and S1108 may be combined into a single step, so that instead of padding the upsampled bilateral sharpening kernel and then deinterleaving the values of the padded kernel, the method may just split the 7×7 kernel into a 4×4 kernel, a 4×3 kernel, a 3×4 kernel and a 3×3 kernel which can then each be applied to the block of input pixels.
In step S412 the block of output pixels 916 is output from the output pixel determination logic 310, and output from the processing module 304. The method can then be repeated for the next block of input pixels by striding across the input image with a stride of 1, and by striding the output by 2 such that a 2× upsampling is achieved. After the block of output pixels 916 has been output from the processing module 304 it may be used in any suitable manner, e.g. it may be stored in a memory, displayed on a display or transmitted to another device.
In general, in the second example (shown in the embodiments of
A third example implementation is described with reference to
The method starts with step S402 as described above in which the block of input pixels 1202 is received at the processing module 304. The block of input pixels 1202 is a 4×4 block of input pixels. The block of input pixels 1202 is passed to the upsampling logic 308. In step S404 the upsampling logic 308 determines a block of upsampled pixels 1204 based on the block of input pixels 1202. As described above, the upsampling logic 308 could determine the block of upsampled pixels 1204 according to any suitable technique, such as by performing bilinear upsampling on the block of input pixels 1202. In the third example shown in
A plurality of partially overlapping sub-blocks of upsampled pixels 1206 within the block of upsampled pixels 1204 are identified. As shown in
In this example, step S406 of determining one or more range kernels comprises step S1302 in which a single range kernel is determined. In particular, in step S1302, the output pixel determination logic 310 determines a single range kernel 1208 based on the upsampled pixels of one of the sub-blocks of upsampled pixels 1206. In the example shown in
In this example, step S408 of combining the range kernel with a sharpening kernel comprises step S1304. In step S1304 the output pixel determination logic 310 combines the single range kernel 1208 with the sharpening kernel to determine a single bilateral sharpening kernel 1210. In this example, the sharpening kernel and the bilateral sharpening kernel 1210 are 5×5 kernels.
In this example, step S410 of using the bilateral sharpening kernel 1210 to determine the output pixels of the block of output pixels 1216 comprises step S1306. In step S1306 the output pixel determination logic 310 determines each of the output pixels of the block of output pixels 1216 by applying 1214 the bilateral sharpening kernel to a respective one of the plurality of partially overlapping sub-blocks of upsampled pixels 1206. As shown in
In step S412 the block of output pixels 1216 is output from the output pixel determination logic 310, and output from the processing module 304. The method can then be repeated for the next block of input pixels by striding across the input image with a stride of 1, and by striding the output by 2 such that a 2× upsampling is achieved. After the block of output pixels 1216 has been output from the processing module 304 it may be used in any suitable manner, e.g. it may be stored in a memory, displayed on a display or transmitted to another device.
The bilateral filtering techniques described herein reduce overshoot near edges. Furthermore, the bilateral filtering techniques described herein can maintain sharpening in low contrast regions.
The first example (shown in
In this method, a block of input pixels is received in step S402 and a block of upsampled pixels is obtained based on the block of input pixels in step S404. In step S406, one or more range kernels are determined. Following step S406, in step S1402 the output pixel determination logic 310 determines an indication of contrast for the block of input pixels. The indication of contrast could be determined based on the block of input pixels or the block of upsampled pixels. As mentioned above, the pixel values may be pixel values from the Y channel (i.e. the luminance channel). Any suitable indication of contrast could be determined. For example, the output pixel determination logic 310 could identify a minimum pixel value and a maximum pixel value within the block of input pixels or within the block of upsampled pixels values, and determine a difference between the identified minimum and maximum pixel values. This determined difference can be used as an indication of contrast for the block of input pixels. As another example, the output pixel determination logic 310 could determine a standard deviation or a variance of the input pixel values or of the upsampled pixel values, and this determined standard deviation or variance can be used as an indication of contrast for the block of input pixels.
In step S1404 the output pixel determination logic 310 determines whether the determined indication of contrast for the block of input pixels is below a threshold indicating that the block of input pixels is substantially flat. As an example, the indication of contrast could be scaled to lie in a range from 0 to 1 (where 0 indicates that the block of input pixels is completely flat and 1 indicates a maximum possible contrast for the block of input pixels), and in this example the threshold which indicates that a block of input pixels is substantially flat could be 0.02. If the indication of contrast for the block of input pixels is below the threshold then the block of input pixels can be considered to be flat. If sharpening is applied to image regions that are considered to be flat (e.g. plain background sky in an image), noise can be added to smooth regions of the image. Such noise can be particularly noticeable in image regions that are substantially flat, and it can be considered better to blur these regions slightly rather than introduce noise. As such, for these substantially flat image regions the output pixel determination logic may use a smoothing kernel rather than a sharpening kernel for determining the output pixels. In particular, if it is determined in step S1404 that the determined indication of contrast for the block of input pixels is below the threshold then the method passes to step S1406 (and not to step S408).
In step S1406 the output pixel determination logic 310 combines each of the one or more range kernels with a spatial Gaussian kernel to determine one or more bilateral smoothing kernels. This is similar to how a conventional bilateral filter kernel is determined.
In step S1408 (which follows step S1406) the output pixel determination logic 310 uses the one or more bilateral smoothing kernels (and not a bilateral sharpening kernel) to determine the output pixels of the block of output pixels. In this way smoothing, rather than sharpening, is applied to image regions that are considered to be flat. The method passes from step S1408 to step S412 in which the block of output pixel is output.
However, if it is determined in step S1404 that the determined indication of contrast for the block of input pixels is not below the threshold then the method passes to step S408 (and not to step S1406).
As described above, in step S408 the output pixel determination logic 310 combines each of the one or more range kernels with a sharpening kernel to determine one or more bilateral sharpening kernels.
In step S410 (which follows step S408) the output pixel determination logic 310 uses the one or more bilateral sharpening kernels (and not a bilateral smoothing kernel) to determine the output pixels of the block of output pixels. In this way sharpening, rather than smoothing, is applied to image regions that are not considered to be flat. The method passes from step S410 to step S412 in which the block of output pixel is output.
In the examples described above, the upsampling is 2× upsampling, i.e. the number of pixels is doubled in each dimension of the 2D image. In some situations a different upsampling (or “upscaling”) factor may be desired, and in other examples, other upsampling factors may be implemented. For example, an upsampling factor of 1.33 (i.e. 4/3) may be desired. In order to implement 1.33× upsampling, a 2× upsampling process can be performed as described above and then a downsampling (or “downscaling”) process can be performed with a downsampling ratio of 1.5.
The processing module of
The processing modules described herein may be embodied in hardware on an integrated circuit. The processing modules described herein may be configured to perform any of the methods described herein. Generally, any of the functions, methods, techniques or components described above can be implemented in software, firmware, hardware (e.g., fixed logic circuitry), or any combination thereof. The terms “module,” “functionality,” “component”, “element”, “unit”, “block” and “logic” may be used herein to generally represent software, firmware, hardware, or any combination thereof. In the case of a software implementation, the module, functionality, component, element, unit, block or logic represents program code that performs the specified tasks when executed on a processor. The algorithms and methods described herein could be performed by one or more processors executing code that causes the processor(s) to perform the algorithms/methods. Examples of a computer-readable storage medium include a random-access memory (RAM), read-only memory (ROM), an optical disc, flash memory, hard disk memory, and other memory devices that may use magnetic, optical, and other techniques to store instructions or other data and that can be accessed by a machine.
The terms computer program code and computer readable instructions as used herein refer to any kind of executable code for processors, including code expressed in a machine language, an interpreted language or a scripting language. Executable code includes binary code, machine code, bytecode, code defining an integrated circuit (such as a hardware description language or netlist), and code expressed in a programming language code such as C, Java or OpenCL. Executable code may be, for example, any kind of software, firmware, script, module or library which, when suitably executed, processed, interpreted, compiled, executed at a virtual machine or other software environment, cause a processor of the computer system at which the executable code is supported to perform the tasks specified by the code.
A processor, computer, or computer system may be any kind of device, machine or dedicated circuit, or collection or portion thereof, with processing capability such that it can execute instructions. A processor may be or comprise any kind of general purpose or dedicated processor, such as a CPU, GPU, NNA, System-on-chip, state machine, media processor, an application-specific integrated circuit (ASIC), a programmable logic array, a field-programmable gate array (FPGA), or the like. A computer or computer system may comprise one or more processors.
It is also intended to encompass software which defines a configuration of hardware as described herein, such as HDL (hardware description language) software, as is used for designing integrated circuits, or for configuring programmable chips, to carry out desired functions. That is, there may be provided a computer readable storage medium having encoded thereon computer readable program code in the form of an integrated circuit definition dataset that when processed (i.e. run) in an integrated circuit manufacturing system configures the system to manufacture a processing module configured to perform any of the methods described herein, or to manufacture a processing module comprising any apparatus described herein. An integrated circuit definition dataset may be, for example, an integrated circuit description.
Therefore, there may be provided a method of manufacturing, at an integrated circuit manufacturing system, a processing module as described herein. Furthermore, there may be provided an integrated circuit definition dataset that, when processed in an integrated circuit manufacturing system, causes the method of manufacturing a processing module to be performed.
An integrated circuit definition dataset may be in the form of computer code, for example as a netlist, code for configuring a programmable chip, as a hardware description language defining hardware suitable for manufacture in an integrated circuit at any level, including as register transfer level (RTL) code, as high-level circuit representations such as Verilog or VHDL, and as low-level circuit representations such as OASIS (RTM) and GDSII. Higher level representations which logically define hardware suitable for manufacture in an integrated circuit (such as RTL) may be processed at a computer system configured for generating a manufacturing definition of an integrated circuit in the context of a software environment comprising definitions of circuit elements and rules for combining those elements in order to generate the manufacturing definition of an integrated circuit so defined by the representation. As is typically the case with software executing at a computer system so as to define a machine, one or more intermediate user steps (e.g. providing commands, variables etc.) may be required in order for a computer system configured for generating a manufacturing definition of an integrated circuit to execute code defining an integrated circuit so as to generate the manufacturing definition of that integrated circuit.
An example of processing an integrated circuit definition dataset at an integrated circuit manufacturing system so as to configure the system to manufacture a processing module will now be described with respect to
The layout processing system 1704 is configured to receive and process the IC definition dataset to determine a circuit layout. Methods of determining a circuit layout from an IC definition dataset are known in the art, and for example may involve synthesising RTL code to determine a gate level representation of a circuit to be generated, e.g. in terms of logical components (e.g. NAND, NOR, AND, OR, MUX and FLIP-FLOP components). A circuit layout can be determined from the gate level representation of the circuit by determining positional information for the logical components. This may be done automatically or with user involvement in order to optimise the circuit layout. When the layout processing system 1704 has determined the circuit layout it may output a circuit layout definition to the IC generation system 1706. A circuit layout definition may be, for example, a circuit layout description.
The IC generation system 1706 generates an IC according to the circuit layout definition, as is known in the art. For example, the IC generation system 1706 may implement a semiconductor device fabrication process to generate the IC, which may involve a multiple-step sequence of photo lithographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of semiconducting material. The circuit layout definition may be in the form of a mask which can be used in a lithographic process for generating an IC according to the circuit definition. Alternatively, the circuit layout definition provided to the IC generation system 1706 may be in the form of computer-readable code which the IC generation system 1706 can use to form a suitable mask for use in generating an IC.
The different processes performed by the IC manufacturing system 1702 may be implemented all in one location, e.g. by one party. Alternatively, the IC manufacturing system 1702 may be a distributed system such that some of the processes may be performed at different locations, and may be performed by different parties. For example, some of the stages of: (i) synthesising RTL code representing the IC definition dataset to form a gate level representation of a circuit to be generated, (ii) generating a circuit layout based on the gate level representation, (iii) forming a mask in accordance with the circuit layout, and (iv) fabricating an integrated circuit using the mask, may be performed in different locations and/or by different parties.
In other examples, processing of the integrated circuit definition dataset at an integrated circuit manufacturing system may configure the system to manufacture a processing module without the IC definition dataset being processed so as to determine a circuit layout. For instance, an integrated circuit definition dataset may define the configuration of a reconfigurable processor, such as an FPGA, and the processing of that dataset may configure an IC manufacturing system to generate a reconfigurable processor having that defined configuration (e.g. by loading configuration data to the FPGA).
In some embodiments, an integrated circuit manufacturing definition dataset, when processed in an integrated circuit manufacturing system, may cause an integrated circuit manufacturing system to generate a device as described herein. For example, the configuration of an integrated circuit manufacturing system in the manner described above with respect to
In some examples, an integrated circuit definition dataset could include software which runs on hardware defined at the dataset or in combination with hardware defined at the dataset. In the example shown in
The implementation of concepts set forth in this application in devices, apparatus, modules, and/or systems (as well as in methods implemented herein) may give rise to performance improvements when compared with known implementations. The performance improvements may include one or more of increased computational performance, reduced latency, increased throughput, and/or reduced power consumption. During manufacture of such devices, apparatus, modules, and systems (e.g. in integrated circuits) performance improvements can be traded-off against the physical implementation, thereby improving the method of manufacture. For example, a performance improvement may be traded against layout area, thereby matching the performance of a known implementation but using less silicon. This may be done, for example, by reusing functional blocks in a serialised fashion or sharing functional blocks between elements of the devices, apparatus, modules and/or systems. Conversely, concepts set forth in this application that give rise to improvements in the physical implementation of the devices, apparatus, modules, and systems (such as reduced silicon area) may be traded for improved performance. This may be done, for example, by manufacturing multiple instances of a module within a predefined area budget.
The applicant hereby discloses in isolation each individual feature described herein and any combination of two or more such features, to the extent that such features or combinations are capable of being carried out based on the present specification as a whole in the light of the common general knowledge of a person skilled in the art, irrespective of whether such features or combinations of features solve any problems disclosed herein. In view of the foregoing description it will be evident to a person skilled in the art that various modifications may be made within the scope of the invention.
Number | Date | Country | Kind |
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2214438.0 | Sep 2022 | GB | national |