Patent Application
20140055111
The present invention generally relates to more electric architecture (MEA), where traditionally hydraulic and pneumatic subsystems of an aircraft are replaced with electric loads.
Such electric loads may include electro-hydrostatic actuators (EHAs), electromechanical actuators (EMAs), advanced radar, and directed energy weapons (DEW).
Such loads may cause repeated, rapid, wide fluctuation of load currents (e.g., peak-to-average power ratios exceeding five to one with time intervals from fifty milliseconds to five seconds), regenerative power flow equal to peak power draw for brief periods of time (e.g., twenty to two hundred milliseconds), and poor power quality on a bus used to supply the electric loads.
As can be seen, there is a need for a way to meet stringent average, pulsed and regenerative power requirements and facilitate optimized real-time power flow control, management, delivery, and integrated protection among various sources of DC power and/or energy storage systems.
In one aspect of the present invention, a system is adapted to regulate a voltage of a supply bus. The system includes: a source adapted to supply a source current to the supply bus; a load adapted to draw a load current from the supply bus; and a bi-directional voltage to current converter adapted to provide an output current, wherein the output current is at least partly based on the source current and the load current.
In another aspect of the present invention, a bi-directional voltage to current converter includes: an inductor coupled to a supply bus; a set of switches adapted to connect the inductor to an energy storage device; and a pulse-width modulation (PWM) controller adapted to control the operation of the set of switches.
In yet another aspect of the present invention, a method is adapted to provide a set of gate driver outputs for a pulse width modulation (PWM) controller. The method: retrieves a PWM period associated with the PWM controller; determines a reference current associated with a source and a load coupled to a supply bus; calculates a duty cycle based at least partly on the retrieved PWM period and the received reference current; and generates the set of gate driver outputs based at least partly on the calculated duty cycle.
These and other features, aspects and advantages of the present invention will become better understood with reference to the following drawings, description and claims.
The following detailed description is of the best currently contemplated modes of carrying out exemplary embodiments of the invention. The description is not to be taken in a limiting sense, but is made merely for the purpose of illustrating the general principles of the invention, since the scope of the invention is best defined by the appended claims.
Various inventive features are described below that can each be used independently of one another or in combination with other features.
Broadly, embodiments of the present invention generally provide a way to meet stringent average, pulsed and regenerative power requirements and facilitate optimized real-time power flow control, management, delivery, and integrated protection among various sources of DC power and/or energy storage systems.
The connections among the various components 110-140 are conceptual and an actual implementation may include various other appropriate components, signals, supplies, circuitry, etc. In addition, various connections and/or components have been omitted for clarity. For instance, the bi-directional voltage to current converter 110 may receive signals from sensors, processors, and/or other appropriate components (e.g., the converter may receive signals from current sensing elements that are configured to measure iS, iL, and/or iO).
The source(s) 120, load(s) 130, and converter 110 may all be connected to a single bus 150, as shown. The bus 150 may be a 270V bus in some embodiments, having a supply line at two hundred seventy volts and a return line at zero volts. Different embodiments may be implemented with different specific voltages and/or connection schemes, as appropriate.
During operation, the bi-directional voltage to current converter 110 may sense the difference between the source current and the load current, and adjust its output current such that the DC source may provide only the average current demanded by the load. In this way, rapid current variations at the source may be eliminated or reduced. The result is [maintain permissive language even with inventor feedback] an improved power quality because associated voltage drops for these variations are also eliminated. For some sources, each associated voltage drop may be proportional to a change in current.
The inductor 210 may be any appropriate inductor, and may be selected based on various relevant factors (e.g., size, cost, voltage range, etc.). The switches 220 may include any appropriate power switching devices. For instance, each switch 220 may include a power metal oxide semiconductor field-effect transistors (MOSFETs) or insulated gate bipolar transistors (IGBTs) with anti-parallel diode, as shown in exploded view 240. The switches 220 may be controlled using signals 250 provided by the PWM controller 230.
Although various components of the system 300 are shown as being external to the converter 110 (e.g., components 310-340), one of ordinary skill in the art will recognize that in some embodiments some or all system components may be included in the converter 110. Alternatively, the various signals generated by the system 300 may be received from other sources, when appropriate (e.g., in some embodiments a processor, controller, and/or other appropriate device may provide the signals to the converter).
As shown in
The power inverter 320 may, in turn, generate a transient output current. The power inverter 320 may be configured to provide slow closed loop operation so that during time intervals between pulses of peak power the DC input source may provide energy to replenish and recharge the energy storage device to the desired output voltage such that the energy storage device may be able to maintain a regulated output.
The second summing node 330 may receive the transient output current and an average source current and may generate an output signal that represents the total available source current. Summing node 240340 may receive a load current and the total source current and may generate a reference current based on the difference between the load current and the total source current.
The reference current may be provided to the converter 110. In addition, the converter 110 may receive a voltage from the energy storage device and a signal representing average source current. The converter 110, in turn, may generate an output signal having a magnitude and polarity that corresponds to the transient difference between available source current and required load current. The calculations may be done by PWM controller 230 described above in reference to
The PWM controller 230 may receive measured values of iS and iL and calculate an average source current based on a running discrete Fourier series calculation at every time step. Using closed loop control (e.g., elements 310-320 described above in reference to
During a first operation interval from t0 to t0+t1, switches Q1 and Q2 are closed, and the operation of the circuitry is defined by equation (1) below.
Where L is the inductance of inductor 210, vc(t) is the voltage across capacitor 140, and VS is the voltage at the output of source 120. After discretization, equation (1) may be represented as equation (2) below.
Where, as shown in timing diagram 400, t1 is a duration of a first operating state, VS is the voltage of capacitor 140 at time t0, i′O(n) is an output current of converter 110 at time t1, and iO(n) is an output current of converter 110 at time t0.
During a second operation interval from t1 to t1+t2, switches Q3 and Q4 are closed, and the operation of the circuitry is defined by equation (3) below.
After discretization, equation (3) may be represented as equation (4) below.
Where, as shown in timing diagram 400, t2 is a duration of a second operating state and iO(n+1) is an output current of converter 110 at time t1+t2. Equations (2) and (4) may be combined to form equation (5) below.
Equation (6) below may be used to estimate the value of iO(n+1), as the output current at the following (n+1) PWM cycle is driven to match the reference current i*O(n) calculated at the previous PWM cycle.
i
O(n+1)≈i*O(n) (6)
The reference current i*O(n) for the output current of controller 330 may be estimated by subtracting iS(TOT) from iL(n), where iS(TOT) is calculated as the sum of iS(VCC) and iS(AVG).
Equation (7) below indicates the relationship among t1, t2, and T.
t
1
+t
2
=T (7)
Equations (6) and (7) may be combined with equation (5) to calculate the values of t1 and t2. The calculated values of t1 and t2 may be provided to the PWM controller 230 such that the operation of switches 220 may be controlled in a way to provide the desired output current to match the available source current and needed load current.
The two pairs of switches 220 (Q1 and Q2, Q3 and Q4) may be controlled such that either one pair or the other pair is activated at any given time. (Some embodiments may include a deadtime, such that any two switches from the same leg cannot be turned on at the same time to avoid short circuit of the DC side.) In the example of
As shown in
The calculations described above in reference to equations (1)-(7) may be performed by one or more appropriate entities (e.g., processors, microcontrollers, dedicated circuitry, etc.).
Process 500 may begin by retrieving (at 510) a PWM period (e.g., period T described above). Such a period may be retrieved in various appropriate ways (e.g., the period may be stored in memory as a numeric value). Alternatively, the PWM period may be received from a component such as a processor. The process then receives (at 520) measured source current and load current for the current cycle. The currents may be measured in various appropriate ways (e.g., using current sensors or current sensing resistors placed at appropriate locations to measure the source and load currents). The process may then determine (at 530) a reference current. The reference current may be received from an external element (e.g., a processor) or calculated internally. Such a reference current may be calculated as described above in reference to
Process 500 may then calculate (at 530) a duty cycle (values for t1 and t2) based at least partly on the reference current and PWM period. Such a calculation may be performed as described above in reference to equations (1)-(7). The process may then generate (at 550) gate driver signals based at least partly on the calculated duty cycle. The generated gate driver output signals may be generated based on the calculated values of t1 and t2, as described above in reference to equations (1)-(7). Next, the generated gate driver signals may be applied to the switches such that Q1 and Q2 close (at 560) for the t1 interval and Q3 and Q4 close (at 570) for the t2 interval. The gate driver signals may be provided using various appropriate output circuitry.
Next, process 500 may determine (at 580) whether to stop the bi-directional voltage to current converter. Such a determination may be based on various appropriate factors (e.g., a received command signal, a state of a physical switch, sensing of an attached power source, etc.). When the process determines (at 580) that the controller should not be stopped, the process may return to operation 510 and continue to the next operation cycle. In some embodiments, the PWM period may not change from cycle to cycle and thus, the process may return to operation 520 after determining (at 580) that the controller should not be stopped. When the process determines (at 580) that the controller should be stopped, the process may end.
One of ordinary skill in the art will recognize that process 500 may be performed in various different ways without departing from the spirit of the invention. For instance, the operations of the process may be performed in different orders than those described above. In addition, various operations may be omitted and/or other operations may be included. Furthermore, the process may be implemented as a set of sub-processes or as part of a larger macro-process.
Many of the processes and modules described above may be implemented as software processes that are specified as at least one set of instructions recorded on a non-transitory storage medium. When these instructions are executed by one or more computational element(s) (e.g., microprocessors, microcontrollers, Digital Signal Processors (DSPs), Application-Specific ICs (ASICs), Field Programmable Gate Arrays (FPGAs), etc.) the instructions cause the computational element(s) to perform actions specified in the instructions.
Computer system 600 may be implemented using various appropriate devices. For instance, the computer system may be implemented using one or more personal computers (PCs), servers, mobile devices (e.g., a smartphone), tablet devices, and/or any other appropriate devices. The various devices may work alone (e.g., the computer system may be implemented as a single PC) or in conjunction (e.g., some components of the computer system may be provided by a mobile device while other components are provided by a server).
Computer system 600 may include a bus 610, at least one processing element 620, a system memory 630, a read-only memory (“ROM”) 640, other components (e.g., a graphics processing unit) 650, input devices 660, output devices 670, permanent storage devices 680, and/or a network connection 690. The components of computer system 600 may be electronic devices that automatically perform operations based on digital and/or analog input signals.
Bus 610 represents all communication pathways among the elements of computer system 600. Such pathways may include wired, wireless, optical, and/or other appropriate communication pathways. For example, input devices 660 and/or output devices 670 may be coupled to the system 600 using a wireless connection protocol or system. The processor 620 may, in order to execute the processes of some embodiments, retrieve instructions to execute and data to process from components such as system memory 630, ROM 640, and permanent storage device 680. Such instructions and data may be passed over bus 610.
ROM 640 may store static data and instructions that may be used by processor 620 and/or other elements of the computer system. Permanent storage device 680 may be a read-and-write memory device. This device may be a non-volatile memory unit that stores instructions and data even when computer system 600 is off or unpowered. Permanent storage device 680 may include a mass-storage device (such as a magnetic or optical disk and its corresponding disk drive).
Computer system 600 may use a removable storage device and/or a remote storage device as the permanent storage device. System memory 630 may be a volatile read-and-write memory, such as a random access memory (“RAM”). The system memory may store some of the instructions and data that the processor uses at runtime. The sets of instructions and/or data used to implement some embodiments may be stored in the system memory 630, the permanent storage device 680, and/or the read-only memory 640. For example, the various memory units may include instructions for generating PWM signals in accordance with some embodiments. Other components 650 may perform various other functions. These functions may include.
Input devices 660 may enable a user to communicate information to the computer system and/or manipulate various operations of the system. The input devices may include keyboards, cursor control devices, audio input devices and/or video input devices. Output devices 670 may include printers, displays, and/or audio devices. Some or all of the input and/or output devices may be wirelessly or optically connected to the computer system.
Finally, as shown in
As used in this specification and any claims of this application, the terms “computer”, “server”, “processor”, and “memory” all refer to electronic devices. These terms exclude people or groups of people. As used in this specification and any claims of this application, the term “non-transitory storage medium” is entirely restricted to tangible, physical objects that store information in a form that is readable by electronic devices. These terms exclude any wireless or other ephemeral signals.
It should be recognized by one of ordinary skill in the art that any or all of the components of computer system 600 may be used in conjunction with the invention. Moreover, one of ordinary skill in the art will appreciate that many other system configurations may also be used in conjunction with the invention or components of the invention.
Moreover, while the examples shown may illustrate many individual modules as separate elements, one of ordinary skill in the art would recognize that these modules may be combined into a single functional block or element. One of ordinary skill in the art would also recognize that a single module may be divided into multiple modules.
It should be understood, of course, that the foregoing relates to exemplary embodiments of the invention and that modifications may be made without departing from the spirit and scope of the invention as set forth in the following claims.
