This application claims priority to Taiwan Patent Application No. 112148671 filed on Dec. 14, 2023, which is hereby incorporated by reference in its entirety.
The present invention relates to an all-lateral wide band-gap (WBG) cascode switch device, particularly a switching device using a lateral depletion-mode WBG semiconductor switch and a lateral enhancement-mode silicon semiconductor switch with the same vertical orientation.
In recent years, gallium nitride (GaN) cascode switching devices have been widely used in the fields of consumer electronics, automation and control systems, communication systems, and electric vehicles.
The GaN cascode switching devices are suitable for power switching systems with voltages between 600 and 900 volts (V) and currents between 20 and 60 amps (A). However, the switching frequency and the reliability of the GaN cascode switching devices are limited by the component and packaging architectures. Therefore, it is difficult to significantly improve them.
Given this, how to improve the switching frequency and the reliability of GaN cascode switching devices to meet various application requirements is an urgent issue for the industry to solve.
An objective of the present invention is to provide an all-lateral WBG cascode switch device whose switching frequency and reliability are improved by using a lateral depletion-mode WBG semiconductor switch and a lateral enhancement-mode silicon semiconductor switch with the same vertical orientation. Therefore, compared with the conventional GaN cascode switching device, the all-lateral WBG cascode switch device of the present invention has higher switching frequency and higher reliability, and has more flexibility and versatility in the assembly and packaging architectures to meet the various application requirements.
To achieve the above objective, the present invention discloses an all-lateral WBG cascode switch device including: a source terminal; a gate terminal; a drain terminal; a lateral enhancement-mode silicon semiconductor switch having a first source electrode, a first drain electrode, and a first gate electrode; and a lateral depletion-mode WBG semiconductor switch disposed laterally apart from and cascoded with the lateral enhancement-mode silicon semiconductor switch, having a second source electrode, a second drain electrode, and a second gate electrode. The first source electrode is coupled to the source terminal. The first gate electrode is coupled to the gate terminal. The first drain electrode is coupled to the second source electrode. The second gate electrode is coupled to the first source electrode. The second drain electrode is coupled to the drain terminal. The first source electrode, the first drain electrode, and the first gate electrode of the lateral enhancement-mode silicon semiconductor switch and the second source electrode, the second drain electrode and the second gate electrode of the lateral depletion-mode WBG semiconductor switch have the same vertical orientation to face the same side.
In an example, the lateral depletion-mode WBG semiconductor switch is one of a depletion-mode gallium nitride (GaN) high electron mobility transistor (HEMT) and a silicon carbide (SiC) junction field-effect transistor (JFET).
In an example, the lateral enhancement-mode silicon semiconductor switch is an enhancement-mode metal oxide semiconductor field-effect transistor (MOSFET).
In an example, the first source electrode, the first drain electrode and the first gate electrode of the lateral enhancement-mode silicon semiconductor switch and the second source electrode, the second drain electrode and the second gate electrode of the lateral depletion-mode WBG semiconductor switch are vertically oriented upward.
In an example, the source terminal, the gate terminal, the drain terminal, the first source electrode, the first drain electrode and the first gate electrode of the lateral enhancement-mode silicon semiconductor switch, and the second source electrode, the second drain electrode and the second gate electrode of the lateral depletion-mode WBG semiconductor switch are coupled by wire bonding.
In an example, the source terminal, the gate terminal, the drain terminal, the first source electrode, the first drain electrode and the first gate electrode of the lateral enhancement-mode silicon semiconductor switch, and the second source electrode, the second drain electrode and the second gate electrode of the lateral depletion-mode WBG semiconductor switch are coupled by copper clips.
In an example, the first source electrode, the first drain electrode and the first gate electrode of the lateral enhancement-mode silicon semiconductor switch and the second source electrode, the second drain electrode and the second gate electrode of the lateral depletion-mode WBG semiconductor switch are vertically oriented downward.
In an example, the source terminal, the gate terminal, the drain terminal, the first source electrode, the first drain electrode and the first gate electrode of the lateral enhancement-mode silicon semiconductor switch, and the second source electrode, the second drain electrode and the second gate electrode of the lateral depletion-mode WBG semiconductor switch are coupled in a flip-chip manner through a plurality of metal interconnections in a carrier substrate.
In an example, a bottom of a substrate of the lateral enhancement-mode silicon semiconductor switch and a bottom of a substrate of the lateral depletion-mode WBG semiconductor switch have a plurality of trenches.
In an example, the all-lateral WBG cascode switch device further includes: a first passive component coupled between the first gate electrode and the gate terminal; and a second passive component coupled between a first contact and a second contact, the first contact being between the first drain electrode and the second source electrode, the second contact being between the second gate electrode and the first source electrode.
In an example, the second passive component is one of a resistor and a Zener diode.
In an example, the all-lateral WBG cascode switch device is packaged into a power switching device by a molding material.
After referring to the drawings and the detailed description of embodiments described later, those of ordinary skill in the art can understand other objectives of the present invention, as well as the technical means and implementations of the present invention.
In the following description, the present invention will be explained with reference to various embodiments thereof. These embodiments of the present invention are not intended to limit the present invention to any specific environment, application or particular method for implementations described in these embodiments. Therefore, the description of these embodiments is for illustrative purposes only and is not intended to limit the present invention. It shall be appreciated that, in the following embodiments and the attached drawings, partial elements not directly related to the present invention are omitted from the illustration, and dimensional proportions among individual elements and the numbers of each element in the accompanying drawings are provided only for ease of understanding but are not intended to limit the actual scale.
An embodiment of the present invention is shown in
The lateral enhancement-mode silicon semiconductor switch 107 has a first source electrode S1, a first drain electrode D1 and a first gate electrode G1. The lateral enhancement-mode silicon semiconductor switch 107 may be an enhancement-mode metal oxide semiconductor field-effect transistor (MOSFET).
The lateral depletion-mode WBG semiconductor switch 109 is disposed laterally apart from and cascoded with the lateral enhancement-mode silicon semiconductor switch 107. The lateral depletion-mode WBG semiconductor switch 109 has a second source electrode S2, a second drain electrode D2 and a second gate electrode G2. The lateral depletion-mode WBG semiconductor switch 109 may be one of a depletion-mode gallium nitride (GaN) high electron mobility transistor (HEMT) or a silicon carbide (SiC) junction field effect transistor (JFET).
The first source electrode S1 of the lateral enhancement-mode silicon semiconductor switch 107 is coupled to the source terminal 101. The first gate electrode G1 of the lateral enhancement-mode silicon semiconductor switch 107 is coupled to the gate terminal 103. The first drain electrode D1 of the lateral enhancement-mode silicon semiconductor switch 107 is coupled to the second source electrode S2 of the lateral depletion-mode WBG semiconductor switch 109. The second gate electrode G2 of the lateral depletion-mode WBG semiconductor switch 109 is coupled to the first source electrode S1 of the lateral enhancement-mode silicon semiconductor switch 107. The second drain electrode D2 of the lateral depletion-mode WBG semiconductor switch 109 is coupled to the drain terminal 105. Accordingly, the all-lateral WBG cascode switch device 1 of the present invention can be constructed by coupling the components as mentioned above.
The first source electrode S1, the first drain electrode D1 and the first gate electrode G1 of the lateral enhancement-mode silicon semiconductor switch 107 and the second source electrode S2, the second drain electrode D2 and the second gate electrode G2 of the lateral depletion-mode WBG semiconductor switch 109 have the same vertical orientation, that is, they face the same side in the all-lateral WBG cascode switch device 1. Different implementations of the same vertical orientation will be further described in the following embodiments.
However, in other embodiments, the source terminal 101, the gate terminal 103, the drain terminal 105, the first source electrode S1, the first drain electrode D1 and the first gate electrode G1 of the lateral enhancement-mode silicon semiconductor switch 107, and the second source electrode S2, the second drain electrode D2 and the second gate electrode G2 of the lateral depletion-mode WBG semiconductor switch 109 may be coupled by copper clips. Compared to wire bonding, the coupling method using copper clips can significantly reduce the inductive effects between components. Since a person having ordinary skill in the art can easily understand the implementation of the coupling using copper clips, no further schematic views are provided here for illustration.
The substrate of the lateral enhancement-mode silicon semiconductor switch 107 is bonded to the source terminal 101 by, for example, the silver adhesive SG1, and the substrate of the lateral depletion-mode WBG semiconductor switch 109 is bonded to the source terminal 101 by, for example, the silver adhesive SG2. In this structure, the source terminal 101 is like a metal carrier substrate to carry the lateral enhancement-mode silicon semiconductor switch 107 and the lateral depletion-mode WBG semiconductor switch 109.
Accordingly, since the lateral enhancement-mode silicon semiconductor switch 107 and the lateral depletion-mode WBG semiconductor switch 109 are both lateral components, the number of bonding wires can be reduced and heat dissipation efficiency can be improved. In addition, the assembly and packaging architectures have more flexibility and versatility.
The source terminal 101, the gate terminal 103, the drain terminal 105, the first source electrode S1, the first drain electrode D1 and the first gate electrode G1 of the lateral enhancement-mode silicon semiconductor switch 107, and the second source electrode S2, the second drain electrode D2 and the second gate electrode G2 of the lateral depletion-mode WBG semiconductor switch 109 are coupled in a flip-chip manner through a plurality of metal interconnections in a carrier substrate 200. In other words, the first source electrode S1, the first drain electrode D1 and the first gate electrode G1 of the lateral enhancement-mode silicon semiconductor switch 107 and the second source electrode S2, the second drain electrode D2 and the second gate electrode G2 of the lateral depletion-mode WBG semiconductor switch 109 may be first coupled to corresponding contacts on the top surface of the carrier substrate 200, and then coupled to each other through the metal interconnections in the carrier substrate 200, or coupled to the source terminal 101, the gate terminal 103 and the drain terminal 105 formed on the bottom surface of the carrier substrate 200.
The carrier substrate 200 may be a chip substrate, e.g., a bismaleimide triazine (BT) substrate, an ajinomoto build-up film (ABF) substrate, a printed circuit board (PCB), an aluminum nitride (AlN) substrate, an aluminum oxide (Al2O3) substrate or a silicon substrate.
Based on the above description, those skilled in the art can understand that the structures of the lateral enhancement-mode silicon semiconductor switch 107 and the lateral depletion-mode WBG semiconductor switch 109 can have various implementations. Furthermore, in the present invention, depending on different vertical orientations (upward or downward), suitable structures for the lateral enhancement-mode silicon semiconductor switch 107 and the lateral depletion-mode WBG semiconductor switch 109 can be chosen. Accordingly, the structures of the lateral enhancement-mode silicon semiconductor switch 107 and the structures of the lateral depletion-mode WBG semiconductor switch 109 shown in
The electrical coupling between components through the carrier substrate 200 can avoid wiring or reduce the number of bonding wires and improve heat dissipation efficiency for thereby improving the overall component performance and reliability of the all-lateral WBG cascode switch device 1. Moreover, since the lateral enhancement-mode silicon semiconductor switch 107 and the lateral depletion-mode WBG semiconductor switch 109 are both lateral components, the assembly and packaging architectures have more flexibility and versatility.
In the vertically downward-oriented embodiment corresponding to
The structures of the all-lateral WBG cascode switch device 1 shown in
An embodiment of the present invention is shown in
In summary, the all-lateral WBG cascode switch device of the present invention improves switching frequency and reliability by using the lateral depletion-mode WBG semiconductor switch and the lateral enhancement-mode silicon semiconductor switch. Therefore, compared with conventional switch devices, the all-lateral WBG cascode switch device of the present invention can provide higher switching frequency and higher reliability, and has more flexibility and versatility in the assembly and packaging architectures to meet the various application requirements.
The above embodiments are used only to illustrate the implementations of the present invention and to explain the technical features of the present invention, and are not intended to limit the scope of the present invention. Any modifications or equivalent arrangements that can be easily accomplished by those skilled in this art are considered to fall within the scope of the present invention, and the scope of the present invention should be limited by the claims of the patent application.
Number | Date | Country | Kind |
---|---|---|---|
112148671 | Dec 2023 | TW | national |