The present disclosure generally relates to circuits for use in displays, particularly displays such as active matrix organic light emitting diode displays having multiple readout circuits for monitoring the values of selected parameters of the individual pixels in the displays.
Displays can be created from an array of light emitting devices each controlled by individual circuits (i.e., pixel circuits) having transistors for selectively controlling the circuits to be programmed with display information and to emit light according to the display information. Thin film transistors (“TFTs”) fabricated on a substrate can be incorporated into such displays. TFTs tend to demonstrate non-uniform behavior across display panels and over time as the displays age. Compensation techniques can be applied to such displays to achieve image uniformity across the displays and to account for degradation in the displays as the displays age.
Some schemes for providing compensation to displays to account for variations across the display panel and over time utilize monitoring systems to measure time dependent parameters associated with the aging (i.e., degradation) of the pixel circuits. The measured information can then be used to inform subsequent programming of the pixel circuits so as to ensure that any measured degradation is accounted for by adjustments made to the programming. Such monitored pixel circuits may require the use of additional transistors and/or lines to selectively couple the pixel circuits to the monitoring systems and provide for reading out information. The incorporation of additional transistors and/or lines may undesirably decrease pixel-pitch (i.e., “pixel density”).
In accordance with one embodiment, the OLED voltage of a selected pixel is extracted from the pixel produced when the pixel is programmed so that the pixel current is a function of the OLED voltage. One method for extracting the OLED voltage is to first program the pixel in a way that the current is not a function of OLED voltage, and then in a way that the current is a function of OLED voltage. During the latter stage, the programming voltage is changed so that the pixel current is the same as the pixel current when the pixel was programmed in a way that the current was not a function of OLED voltage. The difference in the two programming voltages is then used to extract the OLED voltage.
Another method for extracting the OLED voltage is to measure the difference between the current of the pixel when it is programmed with a fixed voltage in both methods (being affected by OLED voltage and not being affected by OLED voltage). This measured difference and the current-voltage characteristics of the pixel are then used to extract the OLED voltage.
A further method for extracting the shift in the OLED voltage is to program the pixel for a given current at time zero (before usage) in a way that the pixel current is a function of OLED voltage, and save the programming voltage. To extract the OLED voltage shift after some usage time, the pixel is programmed for the given current as was done at time zero. To get the same current as time zero, the programming voltage needs to change. The difference in the two programming voltages is then used to extract the shift in the OLED voltage. Here one needs to remove the effect of TFT aging from the second programming voltage first; this is done by programming the pixel without OLED effect for a given current at time zero and after usage. The difference in the programming voltages in this case is the TFT aging, which is subtracted from the calculated difference in the aforementioned case.
In one implementation, the current effective voltage VOLED of a light-emitting device in a selected pixel is determined by supplying a programming voltage to the drive transistor in the selected pixel to supply a first current to the light-emitting device (the first current being independent of the effective voltage VOLED of the light-emitting device); measuring the first current; supplying a second programming voltage to the drive transistor in the selected pixel to supply a second current to the light-emitting device, the second current being a function of the current effective voltage VOLED of the light-emitting device; measuring the second current and comparing the first and second current measurements; adjusting the second programming voltage to make the second current substantially the same as the first current; and extracting the value of the current effective voltage VOLED of the light-emitting device from the difference between the first and second programming voltages.
In another implementation, the current effective voltage VOLED of a light-emitting device in a selected pixel is determined by supplying a first programming voltage to the drive transistor in the selected pixel to supply a first current to the light-emitting device in the selected pixel (the first current being independent of the effective voltage VOLED of the light-emitting device), measuring the first current, supplying a second programming voltage to the drive transistor in the selected pixel to supply a second current to the light-emitting device in the selected pixel (the second current being a function of the current effective voltage VOLED of the light-emitting device), measuring the second current, and extracting the value of the current effective voltage VOLED of the light-emitting device from the difference between the first and second current measurements.
In a modified implementation, the current effective voltage VOLED of a light-emitting device in a selected pixel is determined by supplying a first programming voltage to the drive transistor in the selected pixel to supply a predetermined current to the light-emitting device at a first time (the first current being a function of the effective voltage VOLED of the light-emitting device), supplying a second programming voltage to the drive transistor in the selected pixel to supply the predetermined current to the light-emitting device at a second time following substantial usage of the display, and extracting the value of the current effective voltage VOLED of the light-emitting device from the difference between the first and second programming voltages.
In another modified implementation, the current effective voltage VOLED of a light-emitting device in a selected pixel is determined by supplying a predetermined programming voltage to the drive transistor in the selected pixel to supply a first current to the light-emitting device (the first current being independent of the effective voltage VOLED of the light-emitting device), measuring the first current, supplying the predetermined programming voltage to the drive transistor in the selected pixel to supply a second current to the light-emitting device (the second current being a function of the current effective voltage VOLED of the light-emitting device), measuring the second current, and extracting the value of the current effective voltage VOLED of the light-emitting device from the difference between the first and second currents and current-voltage characteristics of the selected pixel.
In a preferred implementation, a system is provided for controlling an array of pixels in a display in which each pixel includes a light-emitting device. Each pixel includes a pixel circuit that comprises the light-emitting device, which emits light when supplied with a voltage VOLED; a drive transistor for driving current through the light-emitting device according to a driving voltage across the drive transistor during an emission cycle, the drive transistor having a gate, a source and a drain and characterized by a threshold voltage; and a storage capacitor coupled across the source and gate of the drive transistor for providing the driving voltage to the drive transistor. A supply voltage source is coupled to the drive transistor for supplying current to the light-emitting device via the drive transistor, the current being controlled by the driving voltage. A monitor line is coupled to a read transistor that controls the coupling of the monitor line to a first node that is common to the source side of the storage capacitor, the source of the drive transistor, and the light-emitting device. A data line is coupled to a switching transistor that controls the coupling of the data line to a second node that is common to the gate side of the storage capacitor and the gate of the drive transistor. A controller coupled to the data and monitor lines and to the switching and read transistors is adapted to:
The foregoing and additional aspects and embodiments of the present invention will be apparent to those of ordinary skill in the art in view of the detailed description of various embodiments and/or aspects, which is made with reference to the drawings, a brief description of which is provided next.
The foregoing and other advantages of the invention will become apparent upon reading the following detailed description and upon reference to the drawings.
While the invention is susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and will be described in detail herein. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
For illustrative purposes, the display system 50 in
Each pixel 10 includes a driving circuit (“pixel circuit”) that generally includes a driving transistor and a light emitting device. Hereinafter the pixel 10 may refer to the pixel circuit. The light emitting device can optionally be an organic light emitting diode (OLED), but implementations of the present disclosure apply to pixel circuits having other electroluminescence devices, including current-driven light emitting devices. The driving transistor in the pixel 10 can optionally be an n-type or p-type amorphous silicon thin-film transistor, but implementations of the present disclosure are not limited to pixel circuits having a particular polarity of transistor or only to pixel circuits having thin-film transistors. The pixel circuit can also include a storage capacitor for storing programming information and allowing the pixel circuit to drive the light emitting device after being addressed. Thus, the display panel 20 can be an active matrix display array.
As illustrated in
With reference to the top-left pixel 10 shown in the display panel 20, the select line 24i is provided by the address driver 8, and can be utilized to enable, for example, a programming operation of the pixel 10 by activating a switch or transistor to allow the data line 22j to program the pixel 10. The data line 22j conveys programming information from the data driver 4 to the pixel 10. For example, the data line 22j can be utilized to apply a programming voltage or a programming current to the pixel 10 in order to program the pixel 10 to emit a desired amount of luminance. The programming voltage (or programming current) supplied by the data driver 4 via the data line 22j is a voltage (or current) appropriate to cause the pixel 10 to emit light with a desired amount of luminance according to the digital data received by the controller 2. The programming voltage (or programming current) can be applied to the pixel 10 during a programming operation of the pixel 10 so as to charge a storage device within the pixel 10, such as a storage capacitor, thereby enabling the pixel 10 to emit light with the desired amount of luminance during an emission operation following the programming operation. For example, the storage device in the pixel 10 can be charged during a programming operation to apply a voltage to one or more of a gate or a source terminal of the driving transistor during the emission operation, thereby causing the driving transistor to convey the driving current through the light emitting device according to the voltage stored on the storage device.
Generally, in the pixel 10, the driving current that is conveyed through the light emitting device by the driving transistor during the emission operation of the pixel 10 is a current that is supplied by the first supply line 26i and is drained to a second supply line 27i. The first supply line 26i and the second supply line 27i are coupled to the supply voltage 14. The first supply line 26i can provide a positive supply voltage (e.g., the voltage commonly referred to in circuit design as “Vdd”) and the second supply line 27i can provide a negative supply voltage (e.g., the voltage commonly referred to in circuit design as “Vss”). Implementations of the present disclosure can be realized where one or the other of the supply lines (e.g., the supply line 27i) is fixed at a ground voltage or at another reference voltage.
The display system 50 also includes a monitoring system 12. With reference again to the top left pixel 10 in the display panel 20, the monitor line 28j connects the pixel 10 to the monitoring system 12. The monitoring system 12 can be integrated with the data driver 4, or can be a separate stand-alone system. In particular, the monitoring system 12 can optionally be implemented by monitoring the current and/or voltage of the data line 22j during a monitoring operation of the pixel 10, and the monitor line 28j can be entirely omitted. Additionally, the display system 50 can be implemented without the monitoring system 12 or the monitor line 28j. The monitor line 28j allows the monitoring system 12 to measure a current or voltage associated with the pixel 10 and thereby extract information indicative of a degradation of the pixel 10. For example, the monitoring system 12 can extract, via the monitor line 28j, a current flowing through the driving transistor within the pixel 10 and thereby determine, based on the measured current and based on the voltages applied to the driving transistor during the measurement, a threshold voltage of the driving transistor or a shift thereof.
The monitoring system 12 can also extract an operating voltage of the light emitting device (e.g., a voltage drop across the light emitting device while the light emitting device is operating to emit light). The monitoring system 12 can then communicate signals 32 to the controller 2 and/or the memory 6 to allow the display system 50 to store the extracted degradation information in the memory 6. During subsequent programming and/or emission operations of the pixel 10, the degradation information is retrieved from the memory 6 by the controller 2 via memory signals 36, and the controller 2 then compensates for the extracted degradation information in subsequent programming and/or emission operations of the pixel 10. For example, once the degradation information is extracted, the programming information conveyed to the pixel 10 via the data line 22j can be appropriately adjusted during a subsequent programming operation of the pixel 10 such that the pixel 10 emits light with a desired amount of luminance that is independent of the degradation of the pixel 10. In an example, an increase in the threshold voltage of the driving transistor within the pixel 10 can be compensated for by appropriately increasing the programming voltage applied to the pixel 10.
The driving circuit for the pixel 110 also includes a storage capacitor 116 and a switching transistor 118. The pixel 110 is coupled to a select line SEL, a voltage supply line Vdd, a data line Vdata, and a monitor line MON. The driving transistor 112 draws a current from the voltage supply line Vdd according to a gate-source voltage (Vgs) across the gate and source terminals of the drive transistor 112. For example, in a saturation mode of the drive transistor 112, the current passing through the drive transistor 112 can be given by Ids=β(Vgs−Vt)2, where β is a parameter that depends on device characteristics of the drive transistor 112, Ids is the current from the drain terminal to the source terminal of the drive transistor 112, and Vt is the threshold voltage of the drive transistor 112.
In the pixel 110, the storage capacitor 116 is coupled across the gate and source terminals of the drive transistor 112. The storage capacitor 116 has a first terminal, which is referred to for convenience as a gate-side terminal, and a second terminal, which is referred to for convenience as a source-side terminal. The gate-side terminal of the storage capacitor 116 is electrically coupled to the gate terminal of the drive transistor 112. The source-side terminal 116s of the storage capacitor 116 is electrically coupled to the source terminal of the drive transistor 112. Thus, the gate-source voltage Vgs of the drive transistor 112 is also the voltage charged on the storage capacitor 116. As will be explained further below, the storage capacitor 116 can thereby maintain a driving voltage across the drive transistor 112 during an emission phase of the pixel 110.
The drain terminal of the drive transistor 112 is connected to the voltage supply line Vdd, and the source terminal of the drive transistor 112 is connected to (1) the anode terminal of the OLED 114 and (2) a monitor line MON via a read transistor 119. A cathode terminal of the OLED 114 can be connected to ground or can optionally be connected to a second voltage supply line, such as the supply line Vss shown in
The switching transistor 118 is operated according to the select line SEL (e.g., when the voltage on the select line SEL is at a high level, the switching transistor 118 is turned on, and when the voltage SEL is at a low level, the switching transistor is turned off). When turned on, the switching transistor 118 electrically couples node A (the gate terminal of the driving transistor 112 and the gate-side terminal of the storage capacitor 116) to the data line Vdata.
The read transistor 119 is operated according to the read line RD (e.g., when the voltage on the read line RD is at a high level, the read transistor 119 is turned on, and when the voltage RD is at a low level, the read transistor 119 is turned off). When turned on, the read transistor 119 electrically couples node B (the source terminal of the driving transistor 112, the source-side terminal of the storage capacitor 116, and the anode of the OLED 114) to the monitor line MON.
During the second cycle 154, the SEL line is low to turn off the switching transistor 118, and the drive transistor 112 is turned on by the charge on the capacitor 116 at node A. The voltage on the read line RD goes high to turn on the read transistor 119 and thereby permit a first sample of the drive transistor current to be taken via the monitor line MON, while the OLED 114 is off. The voltage on the monitor line MON is Vref, which may be at the same level as the voltage Vb in the previous cycle.
During the third cycle 158, the voltage on the select line SEL is high to turn on the switching transistor 118, and the voltage on the read line RD is low to turn off the read transistor 119. Thus, the gate of the drive transistor 112 is charged to the voltage Vd2 of the data line Vdata, and the source of the drive transistor 112 is set to VOLED by the OLED 114. Consequently, the gate-source voltage Vgs of the drive transistor 112 is a function of VOLED (Vgs=Vd2−VOLED).
During the fourth cycle 162, the voltage on the select line SEL is low to turn off the switching transistor, and the drive transistor 112 is turned on by the charge on the capacitor 116 at node A. The voltage on the read line RD is high to turn on the read transistor 119, and a second sample of the current of the drive transistor 112 is taken via the monitor line MON.
If the first and second samples of the drive current are not the same, the voltage Vd2 on the Vdata line is adjusted, the programming voltage Vd2 is changed, and the sampling and adjustment operations are repeated until the second sample of the drive current is the same as the first sample. When the two samples of the drive current are the same, the two gate-source voltages should also be the same, which means that:
After some operation time (t), the change in VOLED between time 0 and time t is ΔVOLED=VOLED(t)−VOLED(0)=Vd2(t)−Vd2(0). Thus, the difference between the two programming voltages Vd2(t) and Vd2(0) can be used to extract the OLED voltage.
During the first cycle 200 of the exemplary timing diagram in
When multiple readout circuits are used, multiple levels of calibration can be used to make the readout circuits identical. However, there are often remaining non-uniformities among the readout circuits that measure multiple columns, and these non-uniformities can cause steps in the measured data across any given row. One example of such a step is illustrated in
The above adjustment technique can be executed on each row independently, or an average row may be created based on a selected number of rows. Then the delta values are calculated based on the average row, and all the rows are adjusted based on the delta values for the average row.
Another technique is to design the panel in a way that the boundary columns between two readout circuits can be measured with both readout circuits. Then the pixel values in each readout circuit can be adjusted based on the difference between the values measured for the boundary columns, by the two readout circuits.
If the variations are not too great, a general curve fitting (or low pass filter) can be used to smooth the rows and then the pixels can be adjusted based on the difference between real rows and the created curve. This process can be executed for all rows based on an average row, or for each row independently as described above.
The readout circuits can be corrected externally by using a single reference source (or calibrated sources) to adjust each ROC before the measurement. The reference source can be an outside current source or one or more pixels calibrated externally. Another option is to measure a few sample pixels coupled to each readout circuit with a single measurement readout circuit, and then adjust all the readout circuits based on the difference between the original measurement and the measured values made by the single measurement readout circuit.
While particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and compositions disclosed herein and that various modifications, changes, and variations can be apparent from the foregoing descriptions without departing from the spirit and scope of the invention as defined in the appended claims.
This application is a continuation of U.S. patent application Ser. No. 17/354,233, filed Jun. 22, 2021, now allowed, which is a continuation of U.S. patent application Ser. No. 16/574,191, filed Sep. 18, 2019, now allowed, which is a continuation of U.S. patent application Ser. No. 15/978,871, filed May 14, 2018, now U.S. Pat. No. 10,460,660, which is a continuation of U.S. patent application Ser. No. 15/630,142, filed Jun. 22, 2017, now U.S. Pat. No. 9,997,107, which is a continuation of U.S. patent application Ser. No. 15/077,399, filed Mar. 22, 2016, now U.S. Pat. No. 9,721,512, which is a continuation of U.S. patent application Ser. No. 14/204,209, filed Mar. 11, 2014, now U.S. Pat. No. 9,324,268, which claims the benefit of U.S. Provisional Application No. 61/787,397, filed Mar. 15, 2013 all of which are is-hereby incorporated by reference herein in their entirety.
Number | Name | Date | Kind |
---|---|---|---|
20060092183 | Malmberg | May 2006 | A1 |
20080203930 | Budzelaar et al. | Aug 2008 | A1 |
20100134475 | Ogura | Jun 2010 | A1 |
20120293478 | Chaji | Nov 2012 | A1 |
20220223094 | Nathan et al. | Jul 2022 | A1 |
Number | Date | Country | |
---|---|---|---|
20230215370 A1 | Jul 2023 | US |
Number | Date | Country | |
---|---|---|---|
61787397 | Mar 2013 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 17354233 | Jun 2021 | US |
Child | 18184090 | US | |
Parent | 16574191 | Sep 2019 | US |
Child | 17354233 | US | |
Parent | 15978871 | May 2018 | US |
Child | 16574191 | US | |
Parent | 15630142 | Jun 2017 | US |
Child | 15978871 | US | |
Parent | 15077399 | Mar 2016 | US |
Child | 15630142 | US | |
Parent | 14204209 | Mar 2014 | US |
Child | 15077399 | US |