Patent Grant
8208876
1. Field of the Invention
The present invention relates to a circuit for controlling RF PAs (Radio Frequency Power Amplifiers), and more specifically, to an RF PA controller circuit that controls the supply voltage of a PA using a closed amplitude control loop with an amplitude correction signal.
2. Description of the Related Art
RF (Radio Frequency) transmitters and RF power amplifiers are widely used in portable electronic devices such as cellular phones, laptop computers, and other electronic devices. RF transmitters and RF power amplifiers are used in these devices to amplify and transmit the RF signals remotely. RF PAs are one of the most significant sources of power consumption in these electronic devices, and their efficiency has a significant impact on the battery life on these portable electronic devices. For example, cellular telephone makers make great efforts to increase the efficiency of the RF PA circuits, because the efficiency of the RF PAs is one of the most critical factors determining the battery life of the cellular telephone and its talk time.
The RF power amplifier 104 in general includes an output transistor (not shown) for its last amplification stage. When an RF modulated signal 106 is amplified by the RF PA 104, the output transistor tends to distort the RF modulated signal 106, resulting in a wider spectral occupancy at the output signal 110 than at the input signal 106. Since the RF spectrum is shared amongst users of the cellular telephone, a wide spectral occupancy is undesirable. Therefore, cellular telephone standards typically regulate the amount of acceptable distortion, thereby requiring that the output transistor fulfill high linearity requirements. In this regard, when the RF input signal 106 is amplitude-modulated, the output transistor of the PA 104 needs to be biased in such a way that it remains linear at the peak power transmitted. This typically results in power being wasted during the off-peak of the amplitude of the RF input signal 106, as the biasing remains fixed for the acceptable distortion at the peak power level.
Certain RE modulation techniques have evolved to require even more spectral efficiency, and thereby forcing the RF PA 104 to sacrifice more efficiency. For instance, while the efficiency at peak power of an output transistor of the PA 104 can be above 60%, when a modulation format such as WCDMA is used, with certain types of coding, the efficiency of the RF PA 104 falls to below 30%. This change in performance is due to the fact that the RF transistor(s) in the RE PA 104 is maintained at an almost fixed bias during the off-peak of the amplitude of the RF input signal 106.
Certain conventional techniques exist to provide efficiency gains in the RF PA 104. One conventional technique is EER (Envelope Elimination and Restoration). The EER technique applies the amplitude signal (not shown in
The conventional EER technique can function better only if a variable power supply with a very large variation range is used to adjust the supply voltage based on the amplitude signal of the RF input signal 106, while not reducing the efficiency of the RF transmitter by power consumed by the power supply itself. However, the variable power supply, which is typically comprised of a linear regulator (not shown in
Quite often, the conventional methods of controlling a PA fail to address the amplitude-to-phase re-modulation (AM-to-PM) which occurs in a non-frequency linear device such as a PA. Thus, the conventional methods are not suitable for the common types of PAs for use in common mobile telephony or mobile data systems because the required spectral occupancy performance is compromised by the AM to PM distortion.
Finally, PAs are typically used in conjunction with band pass filters that have a high electric coefficient of quality. These filters are typically of the SAW (surface acoustic wave) type. Due to their high coefficient of quality, the filters exhibit a relatively high group delay. The group delay makes it very difficult for a correction loop to work around the arrangement of the SAW filter and the PA while still meeting the high bandwidth requirements needed for the correction of the AM-to-PM.
Thus, there is a need for an RF PA system that is efficient over a wide variety of modulation techniques and results in a significant net decrease in power consumption by the RF PA circuit. There is also a need for a PA controller that can correct the AM to PM effects, while not relying on a PA specially designed for low AM to PM at the expense of efficiency. In addition, there is a need for a PA controller that can exclude the use of SAW filters from the path of the correction loop in the PA circuitry.
One embodiment of the present invention disclosed is a power amplifier controller circuit for controlling a power amplifier based upon an amplitude correction signal or amplitude error signal. The power amplifier receives and amplifies an input signal to the power amplifier and generates an output signal, and the power amplifier controller circuit controls the power amplifier so that it operates in an efficient manner.
The PA controller circuit comprises an amplitude control loop and a phase control loop. The amplitude control loop determines the amplitude correction signal (also referred to herein as the amplitude error signal), which is indicative of the amplitude difference between the amplitude of the input signal and the attenuated amplitude of the output signal, and adjusts the supply voltage to the power amplifier based upon the amplitude correction signal. The phase control loop determines a phase error signal, which indicates a phase difference between phases of the input signal and the output signal, and adjusts the phase of the input signal based upon the phase error signal to match the phase of the output signal. Thus, the phase control loop corrects for unwanted phase modulation introduced by the AM to PM non-ideality of the power amplifier and thus reduces phase distortion generated by the power amplifier.
In a first embodiment of the present invention, the amplitude control loop comprises an amplitude comparator comparing the amplitude of the input signal with an attenuated amplitude of the output signal to generate an amplitude correction signal, and a power supply coupled to receive the amplitude correction signal and generating the adjusted supply voltage provided to the power amplifier based upon the amplitude correction signal. The power supply can be a switched mode power supply. By using the amplitude correction signal to control the supply voltage to the power amplifier, a high efficiency yet low-bandwidth power supply such as the switched mode power supply may be used to provide the adjusted supply voltage to the power amplifier.
In a second embodiment of the present invention, the amplitude correction signal is split into two or more signals with different frequency ranges and provided respectively to different types of power supplies with different levels of efficiency to generate the adjusted supply voltage provided to the power amplifier. For example, in the second embodiment, the power supplies include a first power supply with a first efficiency and a second power supply with a second efficiency higher than the first efficiency. The first power supply receives a first portion of the amplitude correction signal in a first frequency range and generates a first adjusted supply output based upon the first portion of the amplitude correction signal, and the second power supply receives a second portion of the amplitude correction signal in a second frequency range lower than the first frequency range and generates a second adjusted supply output based upon the second portion of the amplitude correction signal. The first and second adjusted supply outputs are combined to form the adjusted supply voltage provided to the power amplifier. The first power supply can be a linear regulator, and the second power supply can be a switched mode power supply. By dividing the amplitude correction signal into two or more signals with different frequency ranges, the second embodiment of the present invention has the additional advantage that the switched mode power supply may be implemented with even narrower bandwidth as compared to the first embodiment without significantly sacrificing efficiency. A narrower bandwidth power supply or a variable power supply with a smaller range of voltage variation is easier to implement.
In a third embodiment of the present invention, the amplitude control loop further comprises a gain control module receiving the amplitude correction signal to generate a gain control signal, and a variable gain amplifier adjusting the amplitude of the input signal according to the gain control signal. The third embodiment has the advantage that it is possible to operate the power amplifier at any given depth beyond its compression point, resulting in an extra degree of freedom in designing the PA circuit. This is useful in optimizing the efficiency gain versus spectral occupancy performance. By adding the variable gain amplifier, the amplitude of variation of the Vcc or bias voltage to the PA is further reduced, resulting in further significant efficiency gains.
In a fourth embodiment of the present invention, the amplitude loop includes a variable gain amplifier adjusting the amplitude of the input signal, as in the third embodiment, thus providing a second means of adjusting the amplitude of the output of the PA. The amplitude loop can further comprise a compression control block which may be configured either to adjust the gain in the variable gain amplifier or the voltage from the power supply based upon the operating level of the other, in addition to being based upon the amplitude correction signal. By linking the operating level of either the power supply or variable gain amplifier with the adjustment of the other, the two may be operated with a controllable operating point offset relative to each other, and thus provide a convenient means of controlling and maintaining the depth beyond the PA's compression point, allowing a tradeoff between efficiency of the RF power amplifier and spectral occupancy performance, as well as a tradeoff between efficiency of the RF power amplifier and the voltage swings and bandwidth required from the power supply block.
The features and advantages described in the specification are not all inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the inventive subject matter.
The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings.
The Figures (FIG.) and the following description relate to preferred embodiments of the present invention by way of illustration only. It should be noted that from the following discussion, alternative embodiments of the structures and methods disclosed herein will be readily recognized as viable alternatives that may be employed without departing from the principles of the claimed invention.
Reference will now be made to several embodiments of the present invention(s), examples of which are illustrated in the accompanying figures. Wherever practicable similar or like reference numbers may be used in the figures and may indicate similar or like functionality. The figures depict embodiments of the present invention for purposes of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles of the invention described herein.
The PA controller circuit 202 may also adjust the phase and amplitude of the signal 204 to allow for power control and PA ramping, in accordance with information received through the configuration signals 209. Since the PA controller circuit 202 is aware of the voltage at the output and the current in the power amplifier 104, it can also adjust for load variations at an antenna (not shown herein) that may be used with the PA. If a directional coupler (not shown) is used to feed the attenuated amplitude of the signal 204, the PA controller 202 can adjust the forward power while controlling the PA operation point as it is aware of the voltage and current at node 208.
The phase control loop includes two limiters 312, 314, a phase comparator 316, a loop filter (PLF (Phase Loop Filter)) 318, and a phase shifter 320. To achieve stability over all conditions, the phase comparator 316 is of an adequate type with a capture range greater than 2* PI. To achieve this, a combination of adjustable delay elements and frequency dividers may be used. Also a phase sub-ranging system can be used since the dynamic phase variations that the phase correction loop processes are limited in amplitude. A sub-ranging phase control block (not shown) could be one of the constituents of the phase comparator 316 used with this system. Advantages of using sub-ranging in the phase comparator 316 are stability and good noise.
The amplitude control loop includes an adjusted variable attenuator (RFFA (RF Feedback Attenuator)) 306, two matched amplitude detectors 302, 304, a comparator 308, and a switched mode power supply (SMPS) 310. Note that the limiter 312 and the detector 302, and the limiter 314 and the detector 304, can be combined into a single limiter/power detector blocks without altering the functionality of the system.
Referring to
The function of the phase control loop is to counteract the AM (Amplitude Modulation) to PM (Phase Modulation) characteristics of the PA 104, which is part of the normal distortion characteristics of transistor-based amplifiers, allowing for the phase of the RF signal to be held constant at the output 110 of the PA 104 compared with the input 204 of the phase shifter 320 and thus reducing phase distortion generated by the PA 104. This phase control loop contributes to linearizing the PA 104 as the AM to PM phase shift of the PA 104 tends to become higher at higher power levels. By limiting the effects of AM to PM of the PA 104, the phase control loop allows the PA 104 to function at higher power levels with less distortion for the output signal 110, thus allowing the use of the PA 104 in more favorable efficiency conditions. In addition, the phase control loop also helps in correcting any additional AM to PM characteristics that the amplitude control loop (described below) may cause. While
Note that the phase control loop is of the error correction only type. In other words, the phase control loop does not modify the phase of the input signal 204 to the PA 104 unless the PA 104 or the amplitude control loop introduces a phase error. Since the noise contributions of the feedback loops affect the overall signal quality of the RF transmitter, an error correction only loop such as the phase control loop shown in
The amplitude control loop is also of the error correction only type, and thus is referred to herein as the amplitude correction loop. Thus, amplitude control loop and amplitude correction loop are used synonymously herein. Referring to
For a given output power, adjusting the supply voltage 208 of the PA 104 has the effect of varying its gain, as well as changing its efficiency. For a given output power, lowering the supply voltage 208 to the PA 104 provides better efficiency for the PA 104. The adjusted supply voltage 208 of the PA 104 is adjusted to ensure that the PA 104 stays in its most efficient amplification zone. Because adjusting the supply voltage 208 of the PA 104 does make a change to the gain of the PA 104, the output amplitude of the PA 104 changes with the supply voltage 208 from the SMPS 310, and the amplitude control loop can be closed. The principles of such operation can be explained as follows.
When the input to the PA 104 increases, the output of the PA 104 also increases. As the PA 104 stays in its linear region of operation, which corresponds to small input signals, its output will increase linearly with its input. Thus, both inputs to the comparator 308 will rise by the same amount, resulting in no error correction and no change to the supply voltage 208. This is the case when the output power is relatively small and well below the saturation point.
As the input power continues to rise at the input of PA 104, there will be a point beyond which the output of the PA 104 will no longer be directly proportional with the input to the PA 104. The amplitude control loop will detect this error between the output and input of the PA 104, and raise the supply voltage to the PA 104 such that the initially-desired output power is delivered, resulting in linear operation of the system, even with a non-linear PA 104.
In a practical application, the PA 104 will be fully or partially saturated from its Vcc, for example, the highest 10 dB of its output power range, and as the RF modulation of the RF signal 204 forces the amplitude to vary, the amplitude control loop will only be actively controlling the supply voltage 208 to the PA 104 when the highest powers are required. For lower input power, the amplitude control loop will leave the supply voltage 208 at a fixed level because it detects no gain error, resulting in a fixed gain for the PA 104. The depth beyond compression can be adjusted by setting the level of the input signal 204 and the level of the attenuator 306, as well as the default supply voltage Vcc (not shown in
Varying the supply voltage to the PA 104 also results in a phase change. Thus, the phase control loop described above operates in conjunction with the amplitude control loop to maintain the accuracy of RF modulation at the output signal of the PA 104. Note that the phase control loop is also an error correction loop only, and therefore minimally contributes to noise.
Furthermore, the amplitude correction loop has the advantage that an SMPS 310, which does not consume any significant power by itself and thus actually increases the efficiency of the overall RF power amplifier system, can be used to generate the adjusted supply voltage 208 to the PA 104. This is possible because the adjusted supply voltage 208 to the PA 104 is generated by the SMPS 310 based upon the amplitude correction signal 309 which by nature has a much narrower range of variation or fluctuation rather than the actual amplitude of the RF input signal 204 which by nature has a much wider range of variation or fluctuation. An SMPS 310 is easier to implement to follow the amplitude correction signal 309 with a narrow range of variation, but would be more difficult to implement if it had to follow the unmodified amplitude of the RF input signal 204. This is related to the fact that the amplitude signal itself has its fastest variations when the amplitude itself is low. The amplitude correction loop does not need to make any changes to its output when the PA is operating in linear mode. For example, the amplitude correction signal 309 may be only active for the highest 10 dB of the actual output power variation. In contrast, the amplitude signal itself may vary by 40 dB, and varies much faster between −10 dBc to −40 dBc than it does between 0 dBc to −10 dBc. Thus the bandwidth requirements on the SMPS 310, which are coupled with the rate of change of the voltage, are reduced when an amplitude correction signal 309 rather than the amplitude signal itself is used to control the supply of the PA 104. The SMPS 310 does not consume any significant power by itself; and thus does not significantly contribute to usage of the battery power, and actually increases the efficiency of the RF power amplifier system. In contrast, a conventional polar modulation technique typically utilizes the amplitude signal itself to adjust the supply voltage to the PA 104, which prevents the use of an SMPS 310 for wideband RF signals because of the higher bandwidth requirements. Therefore, conventional RF power amplifier control systems typically use linear regulators (rather than an SMPS) to adjust the supply voltage to the PA 104. Such a linear regulator by itself consumes power resulting from its current multiplied by the voltage drop across the linear regulator. When there is a large drop in the amplitude signal, this can result in significant power being lost and results in none or little reduction in the overall battery power being consumed by the RF transmitter. This is because any efficiency gained in the RF PA is mostly lost in the linear regulator itself.
The amplitude correction signal 309 is split into the high frequency amplitude correction signal 401 and the low frequency amplitude correction signal 403 using the high pass filter 410 and the low pass filter 411, respectively. The high frequency amplitude correction signal 401 comprised of components of the amplitude correction signal 309 higher than a predetermined frequency and the low frequency amplitude correction signal 403 is comprised of components of the amplitude correction signal 309 lower than the predetermined frequency. The predetermined frequency used to split the amplitude correction signal 309 can be set at any frequency, but is preferably set at an optimum point where the efficiency of the overall RF transmitter system becomes sufficiently improved. For example, the predetermined frequency can be as low as 1/20th of the spectrally occupied bandwidth for the RF signal. In other embodiments, the predetermined frequency may not be fixed but may be adjusted dynamically to achieve optimum performance of the RF transmitter system.
Power consumed by the linear regulator 401 from a power source such as a battery (not shown) for a given control voltage 208 on the PA 104 can be approximated as follows:
If the average input voltage Vpa to the PA 104 is significantly lower than supply voltage Vcc of the battery, the SMPS 404 achieves much lower power consumption. While the linear regulator 402 is generally less efficient than the SMPS 404, the linear regulator 402 processing the high frequency part 401 of the amplitude correction signal 309 does not make the overall RF PA system inefficient in any significant way, because most of the energy of the amplitude correction signal 309 is contained in the low frequency part 403 rather than the high frequency part 401. This is explained below with reference to
Using both a high efficiency path comprised of the SMPS 404 carrying the low frequency portion 403 of the amplitude correction signal 309 and a low efficiency path comprised of the linear regulator 402 carrying the high frequency portion 401 of the amplitude correction signal 309 has the advantage that it is possible to use an SMPS 404 with a limited frequency response. In other words, the SMPS 404 need not accommodate for very high frequencies but just accommodates for a limited range of lower frequencies of the amplitude correction signal 309, making the SMPS 404 much easier and more cost-effective to implement. Combining the SMPS 404 with the linear regulator 402 enables high bandwidths of operation accommodating for full frequency ranges of the amplitude correction signal 309 without sacrificing the overall efficiency of the RF PA system in any significant way, since most of the energy of the amplitude correction signal 309 that is contained in the low frequency part 403 of the amplitude correction signal 309 is processed by the more efficient SMPS 404 rather than the less efficient linear regulator 402.
For example, Table 1 below illustrates the percentage of energy contained in the various frequency ranges in a hypothetical simple 4 QAM (Quadrature Amplitude Modulation) signal used in WCDMA cellular telephones and the overall efficiency that can be expected to be achieved by the RF transmitter according to the embodiment of
Despite the extremely narrow bandwidth (100 KHz) of the SMPS 404 shown in the example of Table 1, 71% efficiency in the RF power amplifier supply system according to the embodiment of
More specifically, the gain control block 506 receives the amplitude correction signal 309 and adjusts the gain of the variable gain amplifier 502 based upon the amplitude correction signal 309, as well as passing the low frequency and high frequency parts 403, 401 of the amplitude correction signal 309 to the SMPS 404 and the linear regulator 402, respectively, to generate the adjusted supply voltage 208 as explained above with reference to
With the addition of the variable gain amplifier 502 and the gain control block 506, it is possible to use the PA 104 at any given depth beyond its compression point. The term “depth beyond compression” is used herein to refer to the difference between the averaged input compression level of the PA 104 and the actual averaged input power at the PA 104. For instance, when the peak output power is required, the input to the PA 104 can be overdriven by 10 dB beyond the 1 dB compression point of the PA 104. It is also possible to adjust the supply voltage of the PA 104 at the instant when the peak power is required, such that the 1 dB compression point is set higher and it is only necessary to overdrive the PA 104 input by 3 dB to obtain the same output peak power. A dynamic adjustment of both the input level and the supply voltage allows this loop system to reduce significantly further the amplitude of the control voltage 208.
In the embodiment of
In addition, the third embodiment of
As the process begins 602, the comparator 316 compares 604 the phase of the RF input signal 204 with the phase of the attenuated RF output signal 326 from the PA 104 to generate the phase error signal 317. The phase error signal 316 is filtered 606 by the loop filter (PLF) 318 to generate the phase control signal 319. The phase of the input RF signal 204 is shifted 608 based upon the phase control signal 319 so that the difference between the phase of the input signal 204 and the phase of the output RF signal 110 is held constant, and the process ends 610.
Upon reading this disclosure, those of skill in the art will appreciate still additional alternative structural and functional designs for the RF power amplifier controller through the disclosed principles of the present invention. For example, although the embodiment in
For another example, digital techniques can be used to process some of the signals of the PA system described herein. Whether a signal is represented in an analog form or a digital form will not change the functionality or principles of operation of amplitude and phase control loops of the PA system according to various embodiments of the present invention. For instance, based on the observation of the amplitude error signal 309, one could calculate a typical transfer function for the PA 104 and construct the signals that drive the PA at nodes 206, 208, which is still a form of closed loop control.
In one example of the fourth embodiment, the compression control block 1002 adjusts the gain in the VGA 502 with VGA gain control line 1010 based on the amplitude correction signal 309. The compression control block 1002 also adjusts the power supply block 1120 with voltage control line 1014; this however, based not just upon the amplitude correction signal 309 but also upon the gain level in VGA 502. By forcing the power supply voltage 208 to depend on the VGA gain level, the compression control block 1002 links these two systems for setting the gain. By further adding an offset to the VGA gain level, and forcing the power supply voltage to depend on the VGA gain level as well as this offset, the compression control block 1002 provides a convenient technique of controlling and maintaining the depth beyond the PA's compression point by allowing an adjustment of this offset. Adjusting the depth beyond compression allows a tradeoff between efficiency of the RF power amplifier and spectral occupancy performance, as well as a tradeoff between efficiency of the RF power amplifier and the voltage swings and bandwidth required from the power supply block. In
As mentioned, in this example the gain control signal 1010 is used as an approximate measure of the gain of the VGA 502. Therefore, the relationship between the gain control signal 1010 and the gain of the VGA 502 should be predictable. Specifically, in this example, the gain control signal 1010 should control the variable gain amplifier 502 in a linear-in-dB manner. That is, a linear change in signal level of the gain control signal 1010 affects a change in dB of gain at the variable gain amplifier 502. Thus, the voltage control offset signal 1149, to be summed in summer 1150 into voltage control signal 1014, is responsive to an operating gain of the variable gain amplifier 502 in dB, such that a change in dB of gain at the variable gain amplifier 502 will result in a similar change in the level of the voltage control offset signal 1149.
Filter 1154 filters higher frequency components at the modulation rate from the gain control signal 1010 (as well as any high frequency components, if present, from compression control signal 1008), thus providing a representation of the average level of operating gain of the VGA 502 at voltage control offset signal 1149. Note that filter 1154 could be alternatively coupled between summer 1111 and gain control signal 1010, producing the same result if compression control signal 1008 does not change rapidly.
The compression control block 1002 may include a first filter 1146, a second filter 1148, and a third filter 1152. A purpose of these filters is to ensure that loop stability criteria are met, by reducing gain in the amplitude correction loop at high frequencies, as is common in control loops. An additional purpose is to apportion the control frequency range between the gain control and voltage control branches. For example, it may be advantageous for the variable gain amplifier 502 to handle higher frequencies within the amplitude correction signal 309 rather than the power supply block 1120. Additionally, the filters may have various gains, which serve to apportion gains between the gain control and voltage control branches. Although this embodiment includes all of the first, second, and third filters 1146, 1148, and 1152, respectively, the filtering may be distributed about the circuit as desired. Furthermore, the response of such filters may be included in components generating or receiving signals in the compression control block, the amplitude comparator 308, the power supply block 1120, the variable gain amplifier 502, or combinations of such components. For example, the amplitude comparator 308 can include filtering that takes the place of the first filter 1146. Any combination of filters, including no filters in the compression control block 1002 can be used.
Note that various aspects of the compression control block 1002 shown in
Thus, with compression control signal 1008 set to a value of −5, the variable gain amplifier 502 has been offset to provide an average gain of approximately 5 dB (Node C −5 dB), while the supply voltage provided by the power supply block 1120 exhibits increased voltage swing (Node D −5 dB). With a compression control signal 1008 set to a value of −2, the variable gain amplifier 502 has been offset to provide an average gain of 2 dB (Node C −2 dB), while the supply voltage provided by the power supply block 1120 exhibits reduced voltage swing (Node D −2 dB).
Referring to
In another example of setting the PA's compression level in response to a condition, the compression level may be set responsive to a measure of the PA's output amplitude, or may be set responsive to mean output power. In the example shown in
Although calculating an average level of the amplitude of the output 322 of the detector has been described as estimating the PA's output power, any technique, circuit, or the like that can convert an amplitude into a power can be used as the power detector 1040. Furthermore, although the power detector 1040 and the detector 304 have been described as distinct, the functions and/or the circuitry of both can be combined together into a single power/amplitude detector.
In yet another example, the PA's compression level may be set according to the type of modulation present at the input 204. For modulation schemes that exhibit high peak-to-average ratios, the PA's depth beyond compression may be reduced, in order to limit the voltage swings required from the output of the power supply 208. It may not be desirable to design a power supply to accommodate these high voltage swing levels, because such a power supply design may have undesirable efficiency tradeoffs even when operating at lower power levels. To reduce the PA's depth beyond compression, the digital baseband IC may adjust the compression control 1008 through a DAC, based on the type of modulation present in the transmitter.
Although generated from a variety of sources, the power detector output signal 1041, the mismatch control input 1006, and the type of modulation present at the input 204 are examples of the compression control signal 1008. Furthermore, a variety of such sources can contribute to the compression control signal 1008.
As is shown, both the gain control signal 1010 and power supply control signal 1014 are responsive to the amplitude correction signal 309 as in
As mentioned, in this example the power supply control signal 1014 is used as a representation of the approximate voltage at the output 208 of power supply block 1120. Therefore, the relationship between the power supply control signal 1014 and the voltage 208 at the output of power supply block 1120 should be predictable. Specifically, in this example, the power supply control signal 1014 should control the power supply block 1120 in a linear-in-dB manner. That is, a linear change in signal level at the power supply control signal 1014 affects a change in dB of voltage at the output 208 of power supply block 1120. Thus, the gain control offset signal 64, to be summed in summer 1550 into gain control signal 1010, is responsive to an operating power supply of the power supply block 1120 in dB, such that a change in dB of voltage of the power supply block 1120 will result in a similar change in the level of the gain control offset signal 1564.
Filter 1560 filters higher frequency components at the modulation rate from the power supply control signal 1014 (as well as any high frequency components, if present, from compression control signal 1008), thus providing a representation of the average level of operating voltage at the output 208 of power supply block 1120 at gain control offset signal 1564. Note that filter 1560 could be alternatively coupled between summer 1560 and power supply control signal 1014, producing the same result if compression control signal 1008 does not change rapidly.
The compression control block 1002 may include a first filter 1556, a second filter 1558, and a third filter 1562. A purpose of these filters is to ensure that loop stability criteria are met, by reducing gain in the amplitude correction loop at high frequencies, as is common in control loops. An additional purpose is to apportion the control frequency range between the gain control and gain control branches. For example, it may be advantageous for the variable gain amplifier 502 to handle higher frequencies within the amplitude correction signal 309 rather than the power supply block 1120. Additionally, the filters may have various gains, which serve to apportion gains between the gain control and gain control branches. Although this embodiment includes all of the first, second, and third filters 1556, 1558, and 1562, respectively, the filtering may be distributed about the circuit as desired. Furthermore, the response of such filters may be included in components generating or receiving signals in the compression control block 1002, the amplitude comparator 308, the power supply block 1120, the variable gain amplifier 502, or combinations of such components. For example, the amplitude comparator 308 can include filtering that takes the place of the first filter 1558. Any combination of filters, including no filters in the compression control block 1002 can be used.
Note that, as in the example of
Referring back to
Alternatively, both the gain control signal 1010 controlling the variable gain amplifier 502, and the PA gain control line 1012 controlling the gain setting of the PA 104 can be used. In such a case, averaged values of the gain of the VGA 502 and the gain setting of the PA 104 can both be combined with the amplitude correction signal 309 to generate the power supply control signal 1014.
In another example, phase shifter 320 is omitted, and rather the phase of PA 104 is adjusted directly with PA phase control line 1104
In yet another example, linear regulator 402, summing junction 406, highpass filter 410, lowpass filter 411, and SMPS 404 are replaced by a single SMPS, similar to that shown in
In yet another example, the phase control loop, comprised of limiters 312 and 314, phase comparator 316, lowpass filter 318, and phase shifter 320, is omitted. In this case it is assumed that PA 104 is a design which has minimal AM-PM distortion; however, the AM-PM distortion need not be minimal as long as the AM-PM distortion is an acceptable level for the design.
Referring to
In another example illustrated in
As described above, a supply voltage or bias for the power amplifier can be responsive to various signals. As used in this description, adjusting the power supply can include adjusting such supply voltages, biases, control voltages or the like.
Although examples of methods have been described with processes occurring in a particular order, other examples can include the processes described above in any order, including occurring simultaneously. For example, the power supply can be adjusted in 1608 in response to the gain, while simultaneously the power supply is adjusted in response to the compression control signal in 1612.
Another example includes a power amplifier controller circuit for controlling a power amplifier. The power amplifier coupled to receive and amplify an input signal to generate an output signal. The power amplifier controller circuit includes means for generating an amplitude correction signal indicative of an amplitude difference between an amplitude of the input signal and an attenuated amplitude of the output signal, means for adjusting a power supply for the power amplifier in response to the amplitude correction signal, and means for adjusting a gain setting of at least one of a variable gain amplifier and the power amplifier in response to the amplitude correction signal.
In addition, the power amplifier controller circuit includes at least one of means for adjusting the power supply for the power amplifier in response to the gain setting, and means for adjusting the gain setting in response to the power supply for the power amplifier.
Another example of a power amplifier controller circuit includes at least one of means for adjusting the power supply for the power amplifier in response to a compression control signal, and means for adjusting the gain setting in response to the compression control signal. As a result of such means, a depth of compression of the power amplifier is responsive to the compression control signal.
Another example of a power amplifier controller circuit includes means for generating a phase error signal indicative of a phase difference between phases of the input signal and the output signal, and means for adjusting the phase of the input signal to match the phase of the output signal based upon the phase error signal.
As described above, various circuits, systems, configurations, and the like have been described as part of a power amplifier controller circuit. Such circuitry describes examples of the means for performing the functions described above.
Although signals have been described above as amplitudes, envelopes, RF signals, operating in a linear or log domain, or the like, such types of signals and conversions between types may be distributed as desired. For example, the input signal 24 of
In another embodiment, digital techniques may be used to process some of the signals of a system described herein. Whether a signal is represented in an analog form or a digital form will not change the functionality or principles of operation of the RF power amplifier circuit according to various embodiments. For instance, the control distribution block 14 and the compression control block 34 of
Thus, while particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and components disclosed herein and that various modifications, changes and variations which will be apparent to those skilled in the art may be made in the arrangement, operation and details of the method and apparatus of the present invention disclosed herein without departing from the spirit and scope of the invention as defined in the appended claims.
This application claims priority under 35 U.S.C. §119(e) from U.S. Provisional Patent Application No. 60/764,947, entitled “RF Power Amplifier with Efficiency Improvement for High Peak to Average Modulation Types,” filed on Feb. 3, 2006; and this application is a continuation-in-part application of, and claims the benefit under 35 U.S.C. §120 from, co-pending U.S. patent application Ser. No. 11/429,119, entitled “Power Amplifier Controller Circuit,” the subject matter of both of which are incorporated by reference herein in their entirety.
| Number | Name | Date | Kind |
|---|---|---|---|
| 3900823 | Sokal et al. | Aug 1975 | A |
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