This invention relates to wireless communication, and in particular, to wireless communication that employs multiple antennas and beamforming.
Massive multiple input multiple output (mMIMO) technology is considered, as of this writing, as typically employing 16 antennas or more for wireless communication, whereas most commonly used are arrays of 32 antennas. Other, higher numbers of antennas, e.g., 64, may also be employed. mMIMO, by using a large number of antennas is able to support two or more users at one time instant, using the same frequency, which may be achieved by pointing an individual beam at each user using beamforming. mMIMO is expected to be a major contributor to the expected success of fifth generation wireless technology (5G) as it promises to provide better exploitation of the space dimension in service of increasing wireless network capability. Herein, the term 5G is meant to refer to the current generation of mobile networks as specified by the International Telecommunications Union-Radio communications sector (ITU-R) and/or the 3rd Generation Partnership Project (3GPP), which is well known to those of ordinary skill in the art.
mMIMO systems require an analog front end (AFE) unit to provide amplified signals for transmission to the antennas and to amplify received signals from the antennas. In the transmit direction, each AFE unit amplifies the signal it receives that is to be transmitted. These signals have already been upconverted from baseband to the frequency of interest for transmission. Each AFE unit then supplies the amplified signal it produced to one antenna element (AE) of an antenna array, which is an array of M antenna elements, each of which is also referred to herein simply as an antenna, e.g., via a respective antenna feeding port. As such, there may be a bank of AFE units that is made up of M individual AFE units.
To this end, each AFE unit contains a power amplifier (PA) to amplify the signal for transmission that is supplied to the antennas coupled to the AFE unit. The PA is typically an amplifier producing a high-power output that has at least a range of operation of which a portion thereof is not linear in amplification and may also introduce a phase distortion. Since it is desirable to use as much of the range of the PA as possible, digital pre-distortion (DPD) is employed to modify the input to the PA to provide for an effective linear operation of the PA, i.e., to reduce the distortion created by running the PA in any nonlinear regions. DPD is a cost-effective linearization technique which aims to provide improved linearity, better efficiency, and to take full advantage of the PA. DPD typically functions by modifying an original signal for transmission to produce the signal supplied to the PA using modification values from a lookup table (LUT) which are used to modify the original signal for transmission. The LUT is developed based on feedback of the output of the high-PA as compared to what is supplied thereto as input.
More specifically, DPD may use the LUT to properly distort the original signal for transmission, the resulting distorted signal being the signal actually supplied to the high-PA. Such distorted signal, i.e., the output of the DPD, is generated so that when it is supplied to the high-PA the signal output by the high-PA is expected to be a linearly amplified version of the original signal for transmission, i.e., prior to undergoing DPD.
In addition, in the receive direction, each AFE unit amplifies signals received by the at least one antenna coupled to it. Individual AFE units may be coupled to more than one antenna which may be connected together to one feeding port. Because the received signal may be weak, e.g., received from a distant transmitter with limited power, a low-noise amplifier (LNA) is typically used so that minimal noise is added to the weak received signal, which may already be close to the level of noise.
Often, 5G systems operate in a time division duplex (TDD) fashion, so that they transmit during a first time period and then receive during a second, subsequent time period, where the first and second time periods alternate. As such, the AFE unit includes a switch to switch from transmit mode to receive mode and vice versa. While such a switch may have various operating modes, the primary function is to couple the amplified signal for transmission from the PA to the one or more antennas coupled to the front end unit, e.g., via a feeding port, during the first time period and to couple the antennas to a LNA during the second time period.
Disadvantageously, in a communication system, DPD is typically done individually for each PA based on feedback therefor, which can be complicated and computationally intensive.
A summary of several example embodiments of the disclosure follows. This summary is provided for the convenience of the reader to provide a basic understanding of such embodiments and does not wholly define the breadth of the disclosure. This summary is not an extensive overview of all contemplated embodiments and is intended to neither identify key or critical elements of all embodiments nor to delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later. For convenience, the term “certain embodiments” may be used herein to refer to a single embodiment or multiple embodiments of the disclosure.
Certain embodiments disclosed herein include apparatus for causing a power amplifier (PA) to act as an idealized power amplifier (iPA). The apparatus comprises: a fixed digital predistortion (DPD) circuit; a PA coupled to the DPD circuit; at least one sensor adapted to determine at least one condition related to the power amplifier; and a neural network adapted to control a level of amplification provided by the power amplifier based on a measurement of the at least one condition as measured by the at least one sensor.
Certain embodiments disclosed herein include a beamforming transmitter for use in wireless communication. The beamforming transmitter comprises: a plurality of fixed digital predistortion (DPD) circuits each receiving a respective input for transmission and supplying as an output an adjusted version of its received input; a plurality of filtering and gain chains, each of the plurality of filtering and gain chains receiving as input a respective one of the adjusted versions of the inputs; and a plurality of idealized beamformers (iBFs), each iBF of the plurality being coupled to receive as input an output supplied from one of the filtering and chain gains and supplying as output an amplified version of its respective received input for transmission by at least one antenna, wherein each of the filtering and gain chains supplies its output to a plurality of the iBFs., wherein each iBF comprises: a power amplifier (PA); at least one sensor adapted to determine at least one condition related to of the power amplifier; a neural network adapted to control a level of amplification provided by the power amplifier based on a measurement of the at least one condition as measured by the at least one sensor; and an analog beamformer interposed between input to the iBF and the PA of the iBF, the analog beamformer controlling at least one of phase and amplitude of an output signal based on the input to the iBF.
In the drawing:
It is important to note that the embodiments disclosed herein are only examples of the many advantageous uses of the innovative teachings herein. In general, statements made in the specification of the present application do not necessarily limit any of the various claimed embodiments. Moreover, some statements may apply to some inventive features but not to others. In general, unless otherwise indicated, singular elements may be in plural and vice versa with no loss of generality. In the drawings, like numerals refer to like parts through several views.
In accordance with the principles of the disclosure, a fixed, i.e., not adaptive, linearizing element, e.g., fixed or feed-forward digital pre-distortion (DPD), is employed to adjust the signals eventually applied to a power amplifier (PA). To achieve this, in accordance with an aspect of the disclosure, linearization is done in part in the analog domain. In some embodiments, for each PA an analog neural network (NN), also referred to herein as a supervisor, is employed to make all PA behave as if they have the same non-linear amplification curve. In particular, the NN may “idealize” each PA, i.e., cause it to behave like an ideal PA with a known amplification curve regardless of various conditions such as temperature, voltage, technology process, and the like. Advantageously, as a result, the fixed DPD, which is relatively simple as compared to adaptive, and hence computationally intensive, DPDs used in the prior art, may be employed because it effectively sees a static PA. In accordance with an aspect of the disclosure, training of the analog NN may take place in the cloud. In accordance with another aspect of the disclosure, the linearization techniques may be employed with both analog and digital beamforming.
Fixed DPD 103 is a feed-forward, non-adaptive linearizing element, e.g., DPD, which adjusts the signal it receives as input to effectively linearize iPA 107 by performing DPD on the input signal. The signal supplied as input to fixed DPD 103 may be a baseband signal or a radio frequency (RF) signal. If the signal is at baseband then an upconverter to RF is required in filtering and gain stage 105 to upconvert the baseband signal before an RF signal can be supplied to iPA 107.
Filtering and gain chain 105, which may be optional, implements certain filtering that may be desired, e.g., anti-aliasing filtering. Filtering and gain chain 105 may also include a gain stage that provides a certain level of amplification before the final amplification provided by iPA 107.
iPA 107 includes PA 113, sensors 115, and supervisor-neural network (NN) 117. iPA 107 behaves like an ideal PA with a known amplification curve regardless of various conditions such as temperature, voltage, technology process, and the like based on control signals provided by supervisor-NN 117 which is responsive to sensors 115.
PA 113 is a power amplifier whose behavior, i.e., amplification curve, is response to a control signal provided by supervisor-NN 117.
Sensors 115 may sense various conditions such as temperature, voltage, technology process, and the like, in or adjacent to PA 113 and supplies indications of such conditions as input to supervisor-NN 117. Such sensors may be integrated with or simply in the vicinity of, e.g., adjacent to PA 113.
Supervisor-NN 117 is a neural network that supplies the control signal for PA 113. Supervisor-NN 117 is preferably analog, which, advantageously, is likely to achieve a higher degree of integration of parts of the system, e.g., onto a single die, and therefore lower cost, but it may be digital, e.g., implemented in a field programmable gate array (FPGA), in the alternative, or some combination thereof. Supervisor-NN 117 receives as input the indications of the conditions sensed by sensors 115 and uses such indications to determine the output signal supplied to control PA 113. A supervisor-NN may also be referred to herein as a supervisor or simply as NN.
Supervisor-NN 117 may be implemented as a well-known multilayer perceptron NN such as the one disclosed in G. Volanis, D. Maliuk, Y. Lu, K. S. Subramani, A. Antonopoulos and Y. Makris, “On-die learning-based self-calibration of analog/RF ICs,” 2016 IEEE 34th VLSI Test Symposium (VTS), Las Vegas, NV, USA, 2016, pp. 1-6, doi: 10.1109/VTS.2016.7477297 which is incorporated by reference as if fully set forth herein. Also see D. Maliuk and Y. Makris, “An Experimentation Platform for On-Chip Integration of Analog Neural Networks: A Pathway to Trusted and Robust Analog/RF ICs,” in IEEE Transactions on Neural Networks and Learning Systems, vol. 26, no. 8, pp. 1721-1734 August 2015, doi: 10.1109/TNNLS.2014.2354406 and Y. Lu, K. S. Subramani, H. Huang, N. Kupp, K. Huang and Y. Makris, “A comparative study of one-shot statistical calibration methods for analog/RF ICs,” 2015 IEEE International Test Conference (ITC), Anaheim, CA, USA, 2015, pp. 1-10, doi: 10.1109/TEST.2015.7342415 each of which is also incorporated by reference as if fully set forth herein.
Supervisor-NN 117 may be trained in the cloud. To this end, supervisor-NN 117 and sensors 115 are coupled to edge computing/storage resources 111 by an uplink 119. A downlink 121 couples edge computing/storage resources 111 to supervisor-NN 117. Uplink 119 is used to upload observation data, i.e., various data that is known at supervisor-NN 117, including a copy of the signal used to control PA 113, as well as data from, or derived from sensors 115, to edge computing/storage resources 111. Downlink 121 is employed to download control parameters, such as the weights produced as a result of the training process, to supervisor-NN 117. Each of links 119 and 121 may be any form of communication link, e.g., they may be implemented as or part of, without limitation, a wireless, cellular or wired network, a local area network (LAN), a wide area network (WAN), a metro area network (MAN), the Internet, the worldwide web (WWW), similar networks, and any combination thereof. Links 119 and 121 need not be the same form of communication link.
Advantageously, good linearization performance is achieved without requiring feedback from PA 113 to an adaptive DPD as is required in the prior art. Further advantageously, a fixed DPD is much less expensive to implement than an adaptive DPD.
NN 117 also receives control parameters, e.g., weights, from NN training mechanism (NNTM) 235, located in edge computing/storage resources 111, which are received via link 121. NN 117 provides as an output a control signal which is supplied as an input to PA 113 to control the behavior of PA 113. The control signal (CONTROL) produced as output by NN 117 is also supplied as an input to the NNTM 235 via link 119. The control signal may be based on the weights produced by NNTM 235 and received therefrom via link 121. The control signal produced by NN 117 may be used to adjust the operation of the PA. In one embodiment, the control signal is applied to tuning knobs of the PA which may correspond to bias voltages and currents used for adjusting the operation of the PA.
P-sensor 115-1 provides an indication of the technology process of the implemented PA 113 as signal P-DATA. T-sensor 115-2 provides an indication of the temperature in the vicinity of PA 113 as signal T-DATA. Other types of observation data indicating various signals or conditions within the circuit implementing PA 113 may also be produced by PA 113, and these are collectively referred to as SENSOR-DATA. Signals P-DATA, T-DATA, SENSOR-DATA, and a copy of the control signal developed by NN 117 are supplied via link 119 as input to NNTM 235.
In one embodiment, only a small portion of the P-DATA, T-DATA, SENSOR-DATA, and a copy of the control signal developed by NN 117, or information representative of such information, is transmitted to NNTM 235. Furthermore, such transmission may be performed only occasionally, i.e., from time to time. To this end, the data may be stored in a local memory, e.g., a flash memory, not shown, prior to transmission. As such, link 119 may be activated for transmission only rarely or even very rarely, e.g., being employed in order to supply information regarding very slow changes at iPA 107, such as the aging of the circuit, which is sufficient to enable correction of such conditions using updated information received via link 121. Similarly, in one embodiment, after the downloading of the initial set of control parameters, link 121 may be used quite infrequently to download updated versions of the parameters.
NNTM 235 may be located within edge computing/storage resources 111. It is used to train NN 117 based on the P-DATA, T-DATA, SENSOR-DATA, and the copy of the control signal developed by NN 117 that is supplied thereto. More specifically, the data from the sensors together with the control signal produced as output by NN 117 are fed to NNTM 235.
In one embodiment, edge computing/storage resources 111 may maintain a copy of the contents of stimuli 233. Doing so enables edge computing/storage resources 111 to update the contents of stimuli 233 from time to time, e.g., via link 121 and further routing of such information within iPA 107. Typically, edge computing/storage resources 111 possesses has much greater resources as compared to the resources available in iPA 107 and, furthermore, edge computing/storage resources 111 is generally expected to be the master of the overall training in that it supplies the weights employed in NN 117 which converts NN 117 into a trained neural network. NN 117 may be located on the same die as PA 113, while, as shown in the embodiment of
Multiple instantiations of iPA 107 that normally operate independently of each other may periodically send the same type of data from their own respective NN 117 to NNTM 235 for use in improving the weights supplied to at least one of the NN 117 of the iPAs 107. Such is shown in
Analog beamformer (BF) controller 447 supplies the control signals to beamformer 441 which are used to adjust the gain of VGA 443 and the phase of adjustable phase controller 445. In one embodiment, VGA 443 and adjustable phase controller 445 are analog components. Advantageously, analog beamforming enables providing semi-static beamforming, for example, enabling radio features such as tilt control or dynamic sectorization. Analog BF controller 447 receives control signals from higher protocol layers, e.g., processors of the higher layer protocol (not shown) that specify what beamforming should be performed. In one embodiment, analog BF controller 447 is implemented as a digital signal processor (DSP).
More specifically analog beamformer (BF) controller 647 supplies the control signals which are used to adjust the gain of each VGA and the phase of each adjustable phase controller within the various iBFs 651. Analog BF controller 647 receives control signals from higher protocol layers, e.g., processors of the higher layer protocol (not shown) that specify what beamforming should be performed. In one embodiment, analog BF controller 647 is implemented as a digital signal processor (DSP).
The output of each filtering and gain chain 105 is supplied to M idealized beamformers which further implement analog beamforming. Each of the idealized beamformers is designated 651 with appropriate suffixes corresponding to the pathway to which it belongs and which of the M iBFs of the chain that it is, e.g., iBF 651-1-1 to iBF 651-1-M for the pathway corresponding to in-1 and iBF 651-N-1 to iBF 651-N-M for the pathway corresponding to in-N. The output of each of iBF 651 of
Analog beamformer (BF) controller 747 supplies the control signals which are used to adjust the gain of each VGA and the phase of each adjustable phase controller within the various iBFs 651. Analog BF controller 747 receives control signals from higher protocol layers, e.g., processors of the higher layer protocol (not shown) that specify what beamforming should be performed. In one embodiment, analog BF controller is 747 is implemented as a digital signal processor (DSP).
The output of each filtering and gain chain 105 is supplied to 2 idealized beamformers which further implement analog beamforming. Each of the idealized beamformers is designated 651 with appropriate suffixes corresponding to the pathway to which it belongs and which of the two iBFs it is, e.g., iBF 651-1-1 and iBF 651-1-2 for the pathway corresponding to in-1 and iBF 651-N-1 and iBF 651-N-2 for the pathway corresponding to in-N. The output of each of iBF 651 of
Analog beamformer (BF) controller 847 supplies the control signals which are used to adjust the gain of each VGA and the phase of each adjustable phase controller within the various iBFs 651. Analog BF controller 847 receives control signals from higher protocol layers, e.g., processors of the higher layer protocol (not shown) that specify what beamforming should be performed. In one embodiment, analog BF controller 847 is implemented as a digital signal processor (DSP).
While the foregoing has been presented in terms of a PA in a wireless communication system, those of ordinary skill in the art will readily recognize that the foregoing techniques can be applied to any amplifier that needs to be linearized, i.e., idealized.
The processing circuitry 910 may be realized as one or more hardware logic components and circuits. For example, and without limitation, illustrative types of hardware logic components that can be used include field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), Application-specific standard products (ASSPs), system-on-a-chip systems (SOCs), graphics processing units (GPUs), tensor processing units (TPUs), general-purpose microprocessors, microcontrollers, digital signal processors (DSPs), and the like, or any other hardware logic components that can perform calculations or other manipulations of information.
The memory 920 may be volatile, e.g., random access memory, etc., non-volatile, e.g., read only memory, flash memory, etc., or a combination thereof.
In one configuration, software for implementing one or more embodiments disclosed herein may be stored in the storage 930. In another configuration, the memory 920 is configured to store such software. Software shall be construed broadly to mean any type of instructions, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Instructions may include code, e.g., in source code format, binary code format, executable code format, or any other suitable format of code. The instructions, when executed by the processing circuitry 910, cause the processing circuitry 910 to perform the various processes described herein.
The storage 930 may be magnetic storage, optical storage, and the like, and may be realized, for example, as flash memory or other memory technology, compact disk-read only memory (CD-ROM), Digital Video Disks (DVDs), or any other medium which can be used to store the desired information.
The network interface 940 allows the system 900 to communicate with, for example, an idealized power amplifier or a beamformer of an idealized beamformer, or other, e.g., digital, portions of a wireless communication system.
It should be understood that the embodiments described herein are not limited to the specific architecture illustrated in
The various embodiments disclosed herein can be implemented as hardware, firmware, firmware executing on hardware, software, software executing on hardware, or any combination thereof. Moreover, the software is implemented tangibly embodied on a program storage unit or computer readable medium consisting of parts, or of certain devices and/or a combination of devices. The application program may be uploaded to, and executed by, a machine comprising any suitable architecture. Preferably, the machine is implemented on a computer platform having hardware such as one or more central processing units (CPUs), a memory, and input/output interfaces. The computer platform may also include an operating system and microinstruction code. The various processes and functions described herein may be implemented as either part of the microinstruction code or part of the application program, or any combination thereof, which may be executed by a CPU, whether or not such a computer or processor is explicitly shown. In addition, various other peripheral units may be connected to the computer platform such as an additional data storage unit and a printing unit. Furthermore, a non-transitory computer readable medium is any computer readable medium except for a transitory propagating signal.
All examples and conditional language recited herein are intended for pedagogical purposes to aid the reader in understanding the principles of the disclosed embodiment and the concepts contributed by the inventor to furthering the art and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the disclosed embodiments, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.
It should be understood that any reference to an element herein using a designation such as “first,” “second,” and so forth does not generally limit the quantity or order of those elements. Rather, these designations are generally used herein as a convenient method of distinguishing between two or more elements or instances of an element. Thus, a reference to first and second elements does not mean that only two elements may be employed there or that the first element must precede the second element in some manner. Also, unless stated otherwise, a set of elements comprises one or more elements.
As used herein, the phrase “at least one of” followed by a listing of items means that any of the listed items can be utilized individually, or any combination of two or more of the listed items can be utilized. For example, if a system is described as including “at least one of A, B, and C,” the system can include A alone; B alone; C alone; 2A; 2B; 2C; 3A; A and B in combination; B and C in combination; A and C in combination; A, B, and C in combination; 2A and C in combination; A, 3B, and 2C in combination; and the like.
The following merely illustrates the principles of the invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and conditional language recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor(s) to furthering the art and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.
Note that wherever a signal that is transmitted from a transmit antenna is referred to, in systems without antennas such phraseology may be considered to refer to signal supplied to a transmit branch. Similarly, the number of transmit branches may be substituted for the number of transmit antennas.
Likewise, wherever a signal that originates at a receive antenna is referred to, in systems without antennas such phraseology may be considered to refer to a signal arriving at a receive branch. Similarly, the number of receive branches may be substituted for the number of receive antennas.
Herein, the term 5G is meant to refer to the next generation of mobile networks as specified by the International Telecommunications Union-Radio communications sector (ITU-R), referred to as 4G standards which is well known to those of ordinary skill in the related art.
Unless otherwise explicitly specified herein, the drawings are not drawn to scale.
In the description, identically numbered components within different ones of the FIGs. refer to components that are substantially the same.