The present invention is related to an amplifier DC bias protection circuit and related audio system, and more particularly, to an amplifier DC bias protection circuit and related audio system capable of providing signal amplification and DC bias protection.
Amplifiers are used in consumer audio system for amplifying the waveform sent to it by a preamplifier without introducing much distortion. Each amplifier class comes with its own set of strengths and weaknesses. A Class-A amplifier is conducting through all the period of the signal and characterized in larger quiescent current and smaller distortion, but is disadvantageous in having low power efficiency and high heat sink requirement. A Class-B amplifier is conducting only for one-half the input period and characterized in smaller quiescent current and higher power efficiency, but is disadvantageous in having larger distortion. In a Class-AB amplifier, the conduction angle is intermediate between a Class-A amplifier and a Class-B amplifier. Class-AB amplifiers are widely considered a good compromise for amplifiers with intermediate quiescent current, intermediate distortion, and intermediate power efficiency.
Class-D amplifiers have become increasingly popular in recent year. A Class-D amplifier operates its output device in a switching manner, thereby achieving high power efficiency. Compared to an equivalent Class-AB device, a class-D amplifier's lower losses does not require the use of a heat sink or cooling device while also reducing the amount of input power required, allowing for a lower-capacity power supply design. Therefore, Class-D amplifiers are typically smaller than an equivalent Class-AB amplifier, and thus more suitable for use in portable electronic devices.
In a Class-D amplifier, an analog signal is converted into a stream of pulse-width modulation (PWM) signals for driving active devices (transistors). Each switch is either completely on or completely off for functioning as an electronic switch instead of a linear gain device, thereby lowering the power loss at the output stage and achieving high-efficient signal amplification. A Class-D amplifier is configured amplify an input signal with zero direct-current (DC) bias and generate a non-inverting signal and an inverting signal for driving a speaker, wherein the non-inverting signal and the inverting signal have the DC biases equal to the same absolute value. Therefore, the DC biases of the non-inverting signal and the inverting signal may be completely canceled at the speaker for providing a speaker output signal with zero DC bias.
However, since the characteristics of electronic devices are easily influenced due to process variations, the P-type transistors and the N-type transistors in the Class-D amplifier may have different DC biases due to DC offset. Under such circumstance, the non-inverting signal and the inverting signal generated by the Class-D amplifier have DC biases with different absolute values, resulting in the speaker output signal with non-zero DC bias. If the non-inverting signal and the inverting signal have DC biases with different absolute values when the Class-D amplifier is turned on, the resulting speaker output signal with non-zero DC bias may produce pop noise and even damage the circuit.
Therefore, there is a need for an amplifier DC bias protection circuit capable of providing signal amplification and DC bias protection in audio equipment.
The present invention provides an amplifier DC bias protection circuit which includes an amplifier module, a filter module and a comparator module. The amplifier module is configured to convert an input signal into a non-inverting signal and an inverting signal. The filter module is configured to block an AC component in the non-inverting signal for providing a corresponding first DC bias signal and block an AC component in the inverting signal for providing a corresponding second DC bias signal. The comparator module is configured to determine whether an absolute value of a DC bias difference signal is greater than a predetermined value and output a determination signal for deactivating the amplifier module when the absolute value of the DC bias difference signal is greater than the predetermined value. The DC bias difference signal is associated with a voltage difference between the first DC bias signal and the second DC bias signal.
The present invention also provides an audio system which provides signal amplification and DC bias protection. The audio system includes a speaker module and an amplifier DC bias protection circuit. The amplifier DC bias protection circuit includes an amplifier module, a filter module and a comparator module. The amplifier module is configured to convert an input signal into a non-inverting signal and an inverting signal for driving the speaker module. The filter module is configured to block an AC component in the non-inverting signal for providing a corresponding first DC bias signal and block an AC component in the inverting signal for providing a corresponding second DC bias signal. The comparator module is configured to determine whether an absolute value of a DC bias difference signal is greater than a predetermined value and output a determination signal for deactivating the amplifier module when the absolute value of the DC bias difference signal is greater than the predetermined value. The DC bias difference signal is associated with a voltage difference between the first DC bias signal and the second DC bias signal.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
During the operation of the operational amplifier OP1, the resistors R1 and R2 provide a negative feedback path which creates a virtual ground (the voltage difference between the non-inverting input end and the inverting input end of the operational amplifier OP1 is essentially zero). Under such circumstance, the relation between the non-inverting signal S+ and the input signal SIN may be represented by S+=(1+R2/R1)*SIN, which means the gain G1 of the operational amplifier OP1 is equal to (1+R2/R1). During the operation of the operational amplifier OP2, the resistors R3 and R4 provide a negative feedback path which creates a virtual ground (the voltage difference between the non-inverting input end and the inverting input end of the operational amplifier OP2 is essentially zero). Under such circumstance, the relation between the inverting signal S− and the input signal SIN may be represented by S−=−(R4/R3)*SIN, which means the gain G2 of the operational amplifier OP2 is equal to −(R4/R3). In an embodiment of the present invention, the values of the resistors R1-R4 are determined in a way so that G1=−G2, which allows the non-inverting signal S+ and the inverting signal S− to have the same DC bias and opposite phases. It is to be noted that the circuit structure depicted in
Vd=V+*[(R8/(R7+R8))*[(R9+R10)/R9)]−V−*(R10/R9) . . . (1)
Assuming that R7=R9 and R8=R10, equation (1) can be simplified to Vd=(R8/R7)*(V+−V−), which means the gain G3 of the operational amplifier OP3 is equal to (R8/R7). In an embodiment of the present invention, the values of the resistors R7-R10 are determined in a way so that G3<1, thereby limiting the value of DC bias difference signal Vd.
The comparator CP1 is configured to provide a comparison signal S1 according to the relationship between the DC bias difference signal Vd and a threshold voltage Vth. The comparator CP1 includes a non-inverting input end coupled to the output end of the operational amplifier OP3 for receiving the DC bias difference signal Vd, an inverting input end coupled to the threshold voltage Vth, and an output end for outputting the comparison signal S1. The comparator CP2 is configured to provide a comparison signal S2 according to the relationship between an inverting DC bias difference signal Vd′ and the threshold voltage Vth. The comparator CP2 includes a non-inverting input end coupled to the output end of the operational amplifier OP3 via the inverter 34 for receiving the inverting DC bias difference signal Vd′, an inverting input end coupled to the threshold voltage Vth, and an output end for outputting the comparison signal S2, wherein Vd′=−Vd.
For illustrative purpose, it is assumed that the threshold voltage Vth has a positive value. When the DC bias difference signal Vd has a positive value greater than the positive threshold voltage Vth, the inverting DC bias difference signal Vd′ has a negative value which cannot be greater than the positive threshold voltage Vth. Under such circumstance, the comparator CP1 is configured to output the comparison signal S1 having a first level (such as logic 1), and the comparator CP2 is configured to output the comparison signal S2 having a second level (such as logic 0). When the DC bias difference signal Vd has a negative value and the corresponding inverting DC bias difference signal Vd′ has a positive value greater than the positive threshold voltage Vth, the negative DC bias difference signal Vd cannot be greater than the positive threshold voltage Vth. Under such circumstance, the comparator CP1 is configured to output the comparison signal S1 having the second level (such as logic 0), and the comparator CP2 is configured to output the comparison signal S2 having the first level (such as logic 1). When the absolute value of the DC bias difference signal Vd is between 0 and the threshold voltage Vth, it is impossible for the condition Vd>Vth or Vd′>Vth to be satisfied. Under such circumstance, the comparator CP1 is configured to output the comparison signal S1 having the second level (such as logic 0), and the comparator CP2 is configured to output the comparison signal S2 having the second level (such as logic 0).
In an embodiment of the present invention, the judge circuit 32 maybe an exclusive-OR gate configured to output the determination SY according to the comparison signals S1 and S2. The judge circuit 32 includes a first input end coupled to the output end of the comparator CP1 for receiving the comparison signal S1, a second input end coupled to the output end of the comparator CP2 for receiving the comparison signal S2, and an output end for outputting the determination signal SY. As well-known to those skilled in the art, the judge circuit 32 implemented as an exclusive-OR gate is configured to output a logic 0 determination SY when its first input end and its second input end have different logic levels, and output a logic 1 determination SY when its first input end and its second input end have the same logic level. It is to be noted that the circuit structure depicted in
As previous depicted, when the comparator module 30 determines that the absolute value of the DC bias difference signal Vd is greater than the threshold voltage (Vd>Vth or Vd′>Vth), it indicates that the difference between the DC bias V+ of the non-inverting signal S+ and the DC bias V− of the inverting signal S− is too large, and the large DC bias of the resulting speaker output signal SouT may cause circuit damages. Under such circumstance, the judging circuit 32 is configured to output the determination signal SY having the first level (such as logic 1) for deactivating the amplifier module 10. When the comparator module determines that the absolute value of the DC bias difference signal Vd is not greater than the threshold voltage, it indicates that the difference between the DC bias V+ of the non-inverting signal S+ and the DC bias V− of the inverting signal S− is essentially zero. Under such circumstance, the judging circuit 32 is configured to output the determination signal SY having the second level (such as logic 0) so that the amplifier module 10 may continue to operate normally.
In conclusion, in the amplifier DC bias protection circuit of the present invention, the amplifier module is configured to convert the input signal into the non-inverting signal and the inverting signal for driving the speaker module. The filter module is configured to provide two DC bias signals associated with the DC biases of the non-inverting signal and the inverting signal. The comparator module is configured to provide the DC bias difference signal is associated with the voltage difference between the first DC bias signal and the second DC bias signal and output the determination signal for deactivating the amplifier module when the absolute value of the DC bias difference signal is greater than the predetermined value in order to prevent the speaker output signal with large DC bias from causing circuit damages.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Number | Date | Country | Kind |
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111131941 | Aug 2022 | TW | national |