BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a circuit diagram showing the configuration of a class D amplifier according to an embodiment of the invention.
FIG. 2 is a circuit diagram showing the detailed circuit configuration of a pre-driver 1 in FIG. 1.
FIG. 3 is a timing chart of a signal appearing at each section of the class D amplifier in FIG. 1.
FIG. 4 shows the driver 4 in FIG. 1 using a high value resistor pull-up.
FIG. 5 shows the driver 4 in FIG. 1 using a latch to retain the gate voltage.
FIG. 6 shows the timing of the rising and falling edges of the output from the O1 and O2 terminals in FIG. 1.
FIG. 7 is a block diagram showing a related art class D amplifier.
FIG. 8 shows the relationship between the signal input and signal output in the class D amplifier in FIG. 7.