Patent Application
20120014541
The present invention relates to amplifying devices for condenser microphones and more particularly relates to condenser-microphone amplifying devices with ESD (electrostatic discharge) protection functions.
Capacitive signal sources such as sound pressure sensors have been known as signal sources having high internal impedances. Condenser microphones have been known as a typical example of the sound pressure sensor which is a capacitive signal source. A condenser microphone is configured such that with a diaphragm and an electrode arranged face to face with each other, an external voltage is applied to the electrode to charge it. Because of this configuration, displacement of the diaphragm causes a change in electrostatic capacitance between the diaphragm and the electrode, thereby consequently causing a change in electric potential between the diaphragm and the electrode. By taking out such an electric potential change as an electric signal, the condenser microphone converts sound (sound pressure) into electric signals.
As a conventional amplifying device for such a condenser microphone, there is known an amplifying device as set forth, for example, in Patent Literature 1.
Patent Literature 1: JP-A-2008-028879
Incidentally, electret condenser microphones (ECMs) often finds application in small portable equipment such as portable phones. ECMs are a type of condenser microphone that uses, as a condenser-microphone electrode, an electret produced by causing semi-permanent polarization in the inside of a dielectric substance such as a high polymer material so that electric charges are held in the surface thereof, thereby eliminating the need for the external application of voltage.
The sensitivity and the characteristic of an ECM depend on the electrostatic capacitance between its diaphragm and electrode, and the output of the ECM is in proportion to the amplitude of the diaphragm. The electrostatic capacitance of the ECM depends on the size of the diaphragm, the size of the electrode and the structure therebetween, and is generally from several pF to several tens of pF. In addition, as the load resistance becomes greater, the frequency characteristic becomes flat from lower frequencies. Therefore, in order that the frequency characteristic may be flattened in a voice band (20 Hz to 20 kHz), it is required that the load resistance is set so as to have an extremely large value. Therefore, either an field effect transistor or an operational amplifier having an extremely high input impedance is used as the load resistance of the ECM. On the other hand, if the input impedance is too high, this produces the problem of causing a delay in the response time taken to return to a desired DC operating voltage after power-on to the ECM or after sensing of loud sound. Therefore, generally, the input impedance is set so as to range from several GΩ to several tens of GΩ.
Therefore, it is conceivable that if a conventional amplifying device (for example, as shown in
However, there are cases where ESD (Electrostatic Discharge) may occur not only in the process of assembling an ECM amplifying device, but also in the process of assembling a condenser-microphone amplifying device, and countermeasures thereagainst are required to be made accordingly. Nevertheless, in the case where ESD occurs to the inverting input terminal 1 in the amplifying device configured in the conventional way, there is only one current route out to the output terminal 102 of the operational amplifier 101 through the resistor 104, as a route by way of which such static electricity is allowed to escape. Due to this, a high voltage is applied to the resistor 104 if electrostatic discharge momentarily occurs. If this high voltage goes beyond the withstand voltage of the resistor 104, the withstand voltage of the capacitor 103 or the withstand voltage (gate withstand voltage) of an input transistor (for example, a MOS transistor) of the operational amplifier 101, these elements will be destructed.
On the other hand, if an ESD protecting element such as a diode is connected between the inverting input terminal and the grounding terminal or between the inverting input terminal and the power supply terminal in order that ESD destruction may be prevented, this causes the input impedance of the amplifying device to decrease. If the input impedance decreases, this deteriorates the characteristic of the amplifying device. Because of this, elements that cause the input impedance to decrease, such as ESD protecting elements, cannot be connected between the inverting input terminal, and the grounding terminal or the power supply terminal.
If no ESD protecting element is disposed, the inverting input terminal becomes extremely low in ESD tolerance. As a result, in the case where an ECM is connected to the inverting input terminal so as to be faulted as an ECM module, although there is no exposure to outside the module, not only special handling but also special production control is required in order to take extra care of ESD destruction during its manufacture process, thereby making the manufacture method extremely complicated.
It should be noted that, as described above, this problem is not only the problem with ECM amplifying devices, but also the problem in common with condenser-microphone amplifying devices.
The present invention was devised with a view to providing solutions to the above-described problems with the prior art. Accordingly, an object of the present invention is to provide such a condenser-microphone amplifying device that the input impedance can be set at from several GΩ to several tens of GΩ and in addition, the ESD tolerance is improved.
In order to solve the above-described problems, the present invention provides an amplifying device for a condenser microphone. This condenser-microphone amplifying device comprises: a differential amplifier having an inverting input terminal to which a sound pressure signal output from the condenser microphone is input and a non-inverting input terminal to which a dc bias voltage is applied; a condenser connected between an output terminal of the differential amplifier and the inverting input terminal of the differential amplifier; a resistive element connected, in parallel with the condenser, between the output terminal of the differential amplifier and the inverting input terminal of the differential amplifier; and an ESD protecting element having bidirectional diode characteristics, the ESD protecting element being connected, in parallel with the condenser, between the output terminal of the differential amplifier and the inverting input terminal of the differential amplifier.
In accordance with this configuration, the input impedance can be set at from several GΩ to several tens of GΩ and in addition, the ESD tolerance can be improved. As a result, neither special handling nor special control is required in the manufacture procedure, thereby achieving reduction in manufacture lead time and in addition, making it possible to intend to cut down the costs.
The ESD protecting element may be constituted by a pair of diodes which are connected so as to be opposite with each other in a conduction direction of ON-current.
The ESD protecting element may be constituted by a pair of MOS transistors which are each diode-connected and which are connected so as to be opposite with each other in a conduction direction of ON-current.
The ESD protecting element is constituted by a pair of bipolar transistors which are each diode-connected and which are connected so as to be opposite with each other in a conduction direction of ON-current.
The differential amplifier may be an operational amplifier.
The differential amplifier may be configured using a MOS transistor as an amplifying element.
The condenser microphone may be an electret condenser microphone.
This configuration eliminates the need for the external application of voltage and therefore finds application in small portable equipment such as portable phones or the like.
The condenser microphone may be an MEMS microphone.
In accordance with this configuration, as the electrode, there is used an electret which holds surface electric charges produced by semi-permanent polarization whereby the need for the external application of voltage is made unnecessary, thereby finding application in small portable equipment such as portable phones and so on. In addition, it is possible to prepare electrets using inorganic materials, thereby accomplishing excellent resistance to heat and making it possible to perform reflow mounting. Furthermore, when compared to ECM, the number of components can be reduced, thereby making it possible to cut down the costs.
The above and further objects and features of the invention will more fully be apparent from the following detailed description with reference to accompanying drawings.
The present invention is configured as described above which provides advantageous effects that the input impedance can be set at from several GΩ to several tens of GΩ, and that the ESD tolerance is improved in the condenser-microphone amplifying device.
Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. Throughout the drawings, the same or corresponding constituents are designated by the same reference signs and will not be described repetitively.
As shown in
The response time taken to return to a desired dc voltage after power-on is suitably chosen so that the input impedance of the condenser-microphone amplifying device is set at from several GΩ to several tens of GΩ and thereby the frequency characteristic is flattened in a sound signal band (from 20 Hz to 20 kHz).
Next, a description will be given in regard to the characteristics required for the ESD protecting element 25 in view of the configuration of the microphone amplifying device.
Referring to
As shown in
In the differential amplifying unit 51, a first current source 15 is connected to a power supply 18; the source of a first P-channel MOS transistor 4 is connected to the first current source 15; one of the ends of a first resistor 12 is connected to the drain of the first P-channel MOS transistor 4; and the other of the ends of the first resistor 12 is connected to a grounding terminal. In addition, the source of a second P-channel MOS transistor 5 is connected, in parallel with the first P-channel MOS transistor 4, to the first current supply 15; one of the ends of a second resistor 13 is connected to the drain of the second P-channel MOS transistor 5; and the other of the ends of the second resistor 13 is connected to a grounding terminal. And the gate of the first P-channel MOS transistor 4 is connected to the inverting input terminal 1, and the gate of the second P-channel MOS transistor 5 is connected to the non-inverting input terminal 2.
In the differential outputting unit 52, the source of a third P-channel MOS transistors 6 is connected to a power supply 18; the drain of a first N-channel MOS transistor 8 is connected to the drain of the third P-channel MOS transistor 6; and the source of the first N-channel MOS transistor 8 is connected to a node where the first resistor 12 of the differential amplifying unit 51 and the drain of the first P-channel MOS transistor 4 are joined. In addition, the source of a fourth P-channel MOS transistor 7 is connected to a power supply 18; the drain of a second N-channel MOS transistor 9 is connected to the drain of the fourth P-channel MOS transistor 7; and the source of the second N-channel MOS transistor 9 is connected to a node where the second resistor 13 of the differential amplifying unit 51 and the drain of the second P-channel MOS transistor 5 are joined. The gate of the third P-channel MOS transistor 4 and the gate of the fourth P-channel MOS transistor 5 are connected together and the gate of the fourth P-channel MOS transistor 5 is connected to the drain of the aforementioned P-channel MOS transistor 5. That is, the P-channel MOS transistor 5 is diode-connected. The gate of the first N-channel MOS transistor 8 and the gate of the second N-channel MOS transistor 9 are connected together and in addition, are connected to the gate voltage setting unit 53.
In the gate voltage setting unit 53, a second current source 16 is connected to a power supply 18; the drain of a third N-channel MOS transistor 10 is connected to the second current source 16; one of the ends of a third resistor 14 is connected to the source of the third N-channel MOS transistor 10; and the other of the ends of the third resistor 14 is connected to a grounding terminal. The third N-channel MOS transistor 10 is diode-connected, and the gate of the third N-channel MOS transistor 10 is connected to both of the gates of the first and second N-channel MOS transistors 8 and 9 of the differential outputting unit 52.
In the outputting unit 54, a third current source 17 is connected to a power supply 18; the drain of a fourth N-channel MOS transistor 11 is connected to the third current source 17; and the source of the fourth N-channel MOS transistor 11 is connected to a grounding terminal. The gate of the fourth N-channel MOS transistor 11 is connected to a node where the drain of the third P-channel MOS transistor 6 of the differential outputting part and the drain of the first N-channel MOS transistor 8 of the differential outputting part are joined. And, Connected to the output terminal 3 is a node where the third current source 17 and the drain of the fourth N-channel MOS transistor 11 are joined.
Next, a brief description will be given in regard to the operation of the operational amplifier 20 configured as above. In the gate voltage setting unit 53, a current determined by the current of the third current source 16 and the resistive value of the third resistor 14 is converted, by the diode-connected, third N-channel MOS transistor 10, into a constant voltage that is then applied to both of the gates of the first and the second N-channel MOS transistors 8 and 9. This constant voltage is set so that these transistors operate in the active region.
In this state, when the input voltage Vin1 is input to the non-inverting input terminal 1 and the input voltage Vin2 is input to the inverting input terminal 2, this causes the outputting of a voltage, decreased from the constant bias voltage by the amount of a voltage proportional to the differential input ΔVin, to a node where the first resistor 12 and the drain of the first P-channel MOS transistor 4 are joined in the differential amplifying unit 51, and also causes the outputting of a voltage, increased from the constant bias voltage by the amount of a voltage proportional to the differential input ΔVin, to a node of the second resistor 13 and the drain of the second P-channel MOS transistor 5 are joined in the differential amplifying unit 51.
Because of the operation of the first N-channel MOS transistor 8 and the operation of the second N-channel MOS transistor 9, currents according, respectively, to a pair of output voltages from the differential amplifying unit 51 flow, respectively, through two current pathways of the differential outputting circuit 52. However, the current determined by the operation of the second N-channel MOS transistor 9 is converted by the diode-connected, fourth P-channel MOS transistor 7 into a voltage that is then applied to the gate of the third P-channel MOS transistor 6. Thereby, the current determined by the operation of the first N-channel MOS transistor 8 is diminished by the operation of the third P-channel MOS transistor 6. Thereby, a differential between the pair of the output voltages from the differential amplifying unit 51, αΔVin, is fed to a node where the first N-channel MOS transistor 8 and the third P-channel MOS transistor 6 are joined.
This differential αΔVin is further amplified by the fourth N-channel MOS transistor 11 of the outputting unit 54 and is output as a differential amplified output voltage Vout from the output terminal 3.
Next, a description will be given in regard to the operation of the condenser-microphone amplifying device having the above-described configuration.
First, its normal operation will be described. Referring to
Next, a description will be given in regard to the operation in the case where electrostatic discharge occurs.
Referring to
Hereinafter, referring to
If on the basis of the grounding terminal 19, a plus surge voltage is applied to the inverting input terminal 1, a current by the surge voltage flows from the inverting input terminal 1, through the ESD protecting element 25 and then through the fifth P-channel MOS transistor 32 (the third current source 17) of the operational amplifier 20, to the grounding terminal 19 because of the breaking down of the N-channel transistor 33 (the exterior terminal ESD protecting element) connected between the power supply terminal 18 and the grounding terminal 19, as indicated by alternate long and short dash line in
In addition, in the case where a plus surge voltage is applied to the inverting input terminal 1, it is likely that a current by the surge voltage flows from the inverting input terminal 1, through the ESD protecting element 25, to the grounding terminal 19 because of the breaking down of the fourth N-channel MOS transistor 11 of the operational amplifier 20, as indicated by dotted line in
On the other hand, in the case where on the basis of the grounding terminal 19, a minus surge voltage is applied to the inverting input terminal 1, a current by the surge voltage flows from the grounding terminal 19, through the fourth N-channel MOS transistor 11 of the operational amplifier 20 and then through the ESD protecting element 25, to the inverting input terminal 1, as indicated by broken line in
In the case where on the basis of the power supply terminal 18, a plus surge voltage is applied to the inverting input terminal 1, a current by the surge voltage flows from the inverting input terminal 1, through the ESD protecting element 25 and then through the fifth P-channel MOS transistor 32 of the operational amplifier 20, to the power supply terminal 18, as indicated by broken line in
As has been described above, according to the first embodiment, the input impedance is set at from several GΩ to several tens of GΩ so that to a desired electric characteristic is met and in addition, the ESD tolerance is improved. As a result, neither special handling nor special control is required in the manufacture, whereby the manufacture lead time can be reduced and in addition, it becomes possible to intend to cut down the costs.
In addition, since the ESD tolerance depends on the allowable current value of the ESD protecting element 25, it is accordingly preferable to set the size of the ESD protecting element 25, depending on the element characteristic, so that the input impedance ranges from several GΩ to several tens of GΩ and in addition, the ESD tolerance becomes one free from special handling and special control in the manufacture.
In addition, in the foregoing description making reference to
As shown in
More specifically, the ESD protecting element 25 is constituted by the pair of the N-channel MOS transistors 28 and 29 wherein the drain of the one N-channel MOS transistor 28 and the source of the other N-channel MOS transistor 29 are connected together while on the other hand, the source of the one N-channel MOS transistor 28 and the drain of the other N-channel MOS transistor 29 are connected together. Each of the N-channel MOS transistors 28 and 29 is formed into a drain-gate connected “diode connection”. Even when employing such a configuration, the same effects as the first embodiment can be accomplished.
In addition, as a substitute for the one pair of the N-channel MOS transistors 28 and 29, a pair of P-channel MOS transistors may be used, and it is needless to say that a combination of a single N-channel MOS transistor and a single P-channel MOS transistor may be employed.0
As shown in
More specifically, the ESD protecting element 25 is constituted by the pair of the NPN bipolar transistors 30 and 31 wherein the collector of the one NPN bipolar transistor 30 and the emitter of the other NPN bipolar transistor 31 are connected together while on the other hand, the emitter of the one NPN bipolar transistor 30 and the collector of the other NPN bipolar transistor 31 are connected together. Each of the NPN bipolar transistors 30 and 31 is Formed into a collector-base connected “diode connection”. In such a configuration, also, the same effects as the first embodiment can be accomplished.
In addition, as a substitute for the one pair of the NPN bipolar transistors 30 and 31, a pair of PNP bipolar transistors may be used, and it is needless to say that a combination of a single NPN bipolar transistor and a single PNP bipolar transistor may be employed.
As shown in
More specifically, for example, the resistive element 23 is provided with a seventh N-channel MOS transistor 34, an eighth N-channel MOS transistor 35 and a fourth current source 36.
The gate of the seventh N-channel MOS transistor 34 is fed with a gate-source voltage VGS corresponding to the on voltage of the diode-connected, eighth N-channel MOS transistor 35 connected to the fourth current source 36. Because of this, the seventh N-channel MOS transistor 34 operates in an on state, i.e., in a strong inversion region. When the current (drain current) of the seventh N-channel MOS transistor 34 is nearly zero, the seventh N-channel MOS transistor 34 operates in a non-saturation region (triode region).
The current, Itri, in the non-saturation region is represented by the following expression (see, for example, “Design of Analog CMOS Integrated Circuit, p 17: by Behzad Razavi, McGRAW-HILL),
Itri=k·(W1/L1)·((VGS1−VTH)·VDS1−VDS12/2),
where k is the current amplification factor that can be expressed by a product of the mobility μ and the MOS transistor's gate capacity (Cox), W is the gate width and L is the gate length. VTH is the threshold voltage and VDS is the drain-source voltage.
If the current Itri is differentiated with respect to the drain-source voltage VDS to take the reciprocal thereof, this results in Ron (the MOS transistor's resistive value) which is represented by the following expression:
Ron=L1/(k·W1·(VGS1−VDS1−VTH))
With the configuration shown in
In addition,
In accordance with the fourth embodiment, by causing the seventh N-channel MOS transistor 34 to operate in a non-saturation region as described above, it becomes possible to provide a configuration that has a smaller chip area and a higher resistance value as compared to polysilicon resistors. Because of this, although the chip area increases due to the provision of the ESD protecting element 25, its degree of increase can be reduced.
In addition, in the first embodiment and the fourth embodiment, a zener diode or an MSM diode (metal-semiconductor-metal diode) may be used as the ESD protecting element 25.
In addition, the fourth embodiment may be combined with the second embodiment or the third embodiment.
As this invention may be embodied in several forms without departing from the sprit of essential characteristics thereof, the present embodiments are therefore illustrative and not restrictive, since the scope of the invention is defined by the appended claims rather than by the description proceeding them, and all changes that fall within metes and bounds of the claims, or equivalence of such metes and bounds thereof are therefore intended to be embraced by the claims.
The microphone amplifying device of the present invention finds useful applications in small portable equipment for portable phones as an amplifying device which is capable of setting of the input impedance at from several GΩ to several tens of GΩ and which is improved in ESD tolerance.
54 OUTPUTTING UNIT
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-099774 | Apr 2010 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2010/005429 | 9/3/2010 | WO | 00 | 5/17/2011 |
