NSF Award
9460720
9460720 Lin This SBIR Phase I project explores a holographic optical associative memory (HOAM) technology for asynchronous transfer mode (ATM) communication network applications. With the recent intensive development efforts in high speed optical transceivers and optical switching arrays, the bottleneck of future fiber optic ATM networks will be in the data processing of header information of incoming ATM cells (rather than in the transceiver and switch array). In other words, an ultrafast processor is needed to determine the routing decision and provide the decision to the switching array for physical switching operations. It is found that the processing time of the processor should be much shorter than the data packet duration of an ATM cell. In such a way, the processor enable an ATM switch node to handle incoming ATM cells on-the-fly, and requires a very small buffer memory in the node. A small network testbed with a preliminary HOAM based switch node will be constructed in Phase I to examine the feasibility of the proposed technology. Packaging issues will also be evaluated because the ultimate goal is a compact HOAM processor chip that can be mounted on a circuit board.
