ANALOG SIGNAL TRANSITION DETECTOR

Abstract

An apparatus configured to detect transitions between relatively rising and falling amplitudes of an input signal Vin(t) arriving at a input node comprises a comparator having a first input, a second input, and an output for providing a two state output signal Vout(t) wherein state changes in the output signal Vout(t) correspond to the relatively rising amplitude of the input signal Vin(t) and the relatively falling amplitude of the input signal Vin(t). A delay circuit provides a shifted signal Vin(t+Δt) to the second input of the comparator, and a hysteresis circuit provides hysteretic deadband appended input signal Vin+ΔV to the first input of the comparator.

Description

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1A is a schematic diagram of a transition detection circuit according to the present invention;

FIG. 1B depicts waveforms of electrical signals at various locations in the transition detection circuit;

FIG. 2 is set of waveforms depicting a signal processing deadband;

FIG. 3 shows a schematic diagram of a fixed element signal transition detector;

FIG. 4 is a schematic diagram of an adaptive signal transition detector;

FIG. 5 schematically illustrates the signal path through a single, fixed signal transition detector;

FIG. 6 schematically illustrates the signal path through a single, adaptive signal transition detector;

FIG. 7 is a schematic diagram of the signal path through a multiple, fixed signal transition detector; and

FIG. 8 shows the signal path through a multiple, adaptive signal transition detector.

DETAILED DESCRIPTION OF THE INVENTION

Although the present invention is described in the context of transition detection of physiological signals, the present signal feature detector may be used for a variety of signals, including but not limited to electrical, mechanical, acoustic and ultrasound signals. It is important that the input signal Vin(t) to the detector is a band limited signal.

Initially, referring to FIGS. 1A and 1B, a hardware implementation of a signal feature detector 95 according to the present invention includes a comparator 100, which receives the input signal Vin(t) at and input node 105 to be containing transitions to be detected and receives a time-shifted version of that signal Vin(t+Δt) 110. An exemplary input signal Vin(t) is depicted by line 115 and with waveform 120 corresponding to the time-shifted signal Vin(t+Δt). In response to those signals, the comparator 100 identifies features in the input signal Vin(t) that are distinguished by having a local zero derivative representing the change of direction of the signal amplitude. The signal feature detector can be implemented using a conventional operational amplifier for input signals at frequencies less than 200 Hz. For higher frequency input signals, a comparator type operational amplifier is preferred to provide a digital output signal with well-defined slopes.

The method is sensitive to the time delay value, which separates the input signals in time. The time delay value is controlled by a signal shifter 128 the resistor (R) 125 and capacitor (C) 130. In a preferred embodiment, the RC time constant is set to exclude certain portions of the input signal time sequence. This decision is application dependent. Although the input voltage of the signal feature detector 95 is analog, that voltage at its output 140 is digital, or binary, with the high and low states.

With reference to FIG. 2, the waveforms and the amplitude transition threshold (deadband) needed to trip the comparator 100 are functions of the associated hysteresis of the circuit, and the open loop gain of the comparator. The hysteresis amount ΔV can be chosen based on the component selection.

FIG. 3 shows a single, fixed element signal transition detector (STD) 150 which is similar to the circuit 95 shown in FIG. 1 with additional resistive elements providing feedback. This STD 150 has an input node 151 for receiving the input signal Vin(t). The resistors R1 and R2 are chosen such that the ratio of their resistances is proportional to the desired hysteresis and thus form a hysteresis circuit 156. The components R and C constitute a signal shifter 154 in the form of a delay circuit and the values of these components determine the time constant of the signal delay. The threshold at which the comparator 152 switches states is a function of the gain and slew rate of the comparator or operational amplifier at the frequencies of interest. Typically the gain roll off rate is 20 dB/decade from 1 kHz onward. With such a roll off point, a 105 dB gain at 1 kHz reduces to a gain of 65 dB at 100 kHz. The slew rate is the maximum rate by which the output can change state. For example, a 1 volt/msec slew rate would require at least 5 ms to go from 0 to 5 volts, regardless how hard the input is being overdriven.

FIG. 4 shows an adaptive signal transition detector 160 which may be desired for applications requiring adjustable delay and deadband. This adaptive STD 160 has an input node 161 for receiving the input signal Vin(t). Here, the resistors R1 and R2 in FIG. 3 have been replaced by digital-to-analog (D/A) converters 162 and 164, such as a model DAC0830 manufactured by National Semiconductor of Santa Clara, Calif., USA., the details of which ware schematically illustrated for the first one 162 being shown. The D/A converters 162 and 164 receive multiple bit, digital control signals from a control circuit of the signal processing device (for example, a central processing unit, CPU), wherein each bit controls the state of one of the switches in the respective D/A converter. The states of the switches alter the voltage at the output 165 of the converter, which causes the D/A converter to behave as a programmable resistor. Similarly, to further improve adaptability of the delay circuit, the RC circuit of FIG. 3 has been replaced with a well known constant-amplitude variable phase shifter 166. Any of several well-known constant amplitude, variable phase shifters may be used, such as the one described in U.S. Pat. No. 4,663,594, for example.

FIG. 5 shows the overall signal path while passing through a single branch, fixed element signal transition detector (STD) that was previously described with respect to FIG. 3. The electrical signal being processed is produced by either a sensor or a transducer 170. After passing through amplifier 172, the signal is fed into a low pass filter (LPF) 174 having a corner frequency that is greater than the operating frequency range of an application in which the signal transition detector (STD) is used. However, the corner frequency of the low pass filter 174 is lower than the corner frequency of the delay circuit in STD 176. As an example, for an application with a frequency range of 10-300 Hz, the corner frequency of low pass filter may be at 1 kHz, while that of the delay circuit may at 10 kHz. In another example, for an application with a frequency range of 300-3000 Hz, the corner frequency of low pass filter may be at 10 kHz, while that of the delay circuit may at 100 kHz. In any case, the frequency of the low pass filter and the STD delay circuit is chosen such that there is negligible signal degradation due to the low pass filtering operation at the specified frequency range of 10-300 Hz. Without low pass filtering the overall signal arriving at STD 176, the delay circuit of STD would behave like a low pass filter at the input of comparator 152 and deteriorate the comparator performance. The STD 176 in this case is a single, fixed circuit and is similar to that shown in FIG. 3. The output of the STD circuit is digital as mentioned before and goes to the control circuit 178 which in one exemplary embodiment may be a central processing unit with memory and firmware for analyzing the signal.

FIG. 6 shows the overall signal path while passing through a single branch, adaptive element STD, such as the one shown in FIG. 4. The electrical signal being processed is produced by either a sensor or a transducer 180. The signal is then passed through amplifier 182 and a low pass filter 184 that has similar operating characteristics as described with respect to the filter 175 in FIG. 5. However, the corner frequency of the low pass filter is less than the corner frequency of the delay circuit in the STD 186. The STD 186 in this case is a single, adaptive element circuit and is similar to the one shown in FIG. 4. The digital output of the STD 186 is applied to the control circuit 188 which analyzes the detected transitions and controls operation of the digital-to-analog converters 162 and 164 in the STD.

FIG. 7 shows the overall signal path of a multiple transition detector 200 which has multiple branches each configured to detect a different type of transition in an input signal. The signal from the sensor/transducer 202 is amplified by amplifier 203 which produces the input signal for transition detection. There are “N” circuit branches to detect N different types of signal transitions. Each branch comprises a band pass filter 206, 207 or 208 followed a fixed element STD 210, 211 or 212, respectively. The frequency ranges of band pass filters 206-208 are predetermined and work in tandem with the corner frequencies of the delay circuit in the associated STD 210-212. In one example, for an application in the frequency range of 10-300 Hz, the three circuit have the following configuration: band pass filter 206 has range of 5-80 Hz and the delay circuit in STD 210 operates in a range of 100-1600 Hz; band pass filter 204 has a range of 80-640 Hz and the delay circuit in STD 211 operating in the 1600-12800 Hz range; and band pass filter 208 has a range of 640-10240 Hz and the delay circuit in STD 212 operates the 12800-102400 Hz range. The outputs produced by the STDs 210, 211 or 212 are coupled to inputs to the CPU/control circuit 214. This multi-branch multiple transition detector 200 provides greater design flexibility when compared to a single branch configuration, but adds additional circuit elements.

FIG. 8 represents the overall signal path of a multiple transition detector 220 that employs adaptive element STDs 222, 223 and 224, but otherwise in the same as the multiple transition detector 200 in FIG. 7. Here the frequency ranges of band pass filters are programmable and work in tandem with the corner frequencies of the lag circuits of corresponding STDs, as described previously.

The present signal feature detector preferably is configured to detect transitions from relatively rising and relatively falling amplitudes of an input signal Vin(t) arriving at an input port. The signal feature detector comprises a comparator circuit that has first and second inputs and an output at which a two state output signal Vout(t) is produced, wherein state changes in the output signal Vout(t) correspond to the relatively rising amplitude of the input signal Vin(t) and the relatively falling amplitude of the input signal Vin(t). A delay circuit shifts the input signal by an amount of time Δt to provide a time shifted signal Vin(t+Δt) at the second input of the comparator. A hysteresis circuit produces hysteretic deadband signal Vin+ΔV which is appended to the first input of the comparator, wherein the hysteretic deadband ΔV is proportional to a ratio of a first resistor connected between the input port and the first comparator input and a second resistor connected between the comparator's first input and output. The resistor ratio is selected to be proportional to an amplitude of an anticipated noise signal n(t). The shifted signal may be time shifted which is a wideband signal over 2 octaves, or phase shifted which is narrow band less than 1 octave.

The input signal may be an electrocardiogram in the frequency range of 10 Hz to 300 Hz, a mechanical signal such as a vibration signal, or an acoustic signal, such as a human voice, in the frequency range of 20 Hz to 4000 Hz.

The output of the signal feature detector is a transformed signal which is discrete. It should be noted that this technique is immune to the variations in the continuous input signal unlike traditional methods. The discrete signal can be advantageously used for signal classification.

It should be understood that the signal feature detector can be implemented in hardware, as described previously or by software as will be described hereinafter. It may also be a combination of software and hardware.

Another embodiment of the signal feature detector is implemented by software that is executed by a computer. Here transitions between relatively rising and falling amplitudes of an input signal Vin(t) are detected by a comparator function that has a first and a second input and an output at which a two state output signal Vout(t) is produced, wherein state changes in the output signal correspond to the relatively rising and falling amplitude of the input signal. A delay function shifts the input signal by an amount of time Δt to apply a time shifted signal Vin(t+Δt) to the second input of the comparator function. A hysteresis function appends a hysteretic deadband signal Vin+ΔV to the first input of the comparator function wherein the hysteretic deadband ΔV is proportional to the amplitude of the anticipated noise signal n(t). In a computer implemented method, the delay functions, hysteresis functions and comparator functions of each signal feature detector are implemented in software or firmware.

Application to Physiological Signal Detection:

In one example, a signal feature detector in conjunction with software executed by the control circuit can determine the heart rate which is used in an algorithm for pacing a patient's heart. The heart rate detection is based on the number of cardiac signal transitions counted over a predefined time interval. If the heart rate goes out of a defined range for a given length of time and the frequency of the transitions remain in the non-fibrillation range, cardiac pacing can be initiated to pace the patient's heart. When the transition frequency indicates atrial fibrillation stimulation for atrial defibrillation can be initiated.

In another example, the signal feature detector detects cardiac fibrillation and further comprises a pulse counter that counts the number of pulses for a preset time period. If the cardiac signal corresponds to the normal heart beat, the pulse counter would register a count in a predetermined normal range since the normal biological signals have transition changes at a relatively low rate. In the event of a fibrillation, the pulse count becomes dramatically different, much greater than normal, and analysis that count indicates the defibrillation event. The physiological noise also produces relatively large counts, but these counts do not add up to a sustained large number and thus can be differentiated from a fibrillation event. Unlike the traditional techniques, this method is robust being relatively immune to signal filter degradations and provides a greatly improved event detection and classification.

As another example, the heart rate determined by the signal feature detector is used in an algorithm for pacing a patient's heart. The heart rate detection is based on the number of transitions counted over a prespecified time interval. If the heart rate goes out of a given range for a predefined time and the frequency of the transitions remain in the non-fibrillation range, cardiac pacing can be initiated to pace the patient's heart.

In another application, when a discrete transition signal has been detected, it can be advantageously used to determine slope and slope duration analysis or any other methods of characterizing the QRS complex of an electrocardiogram (ECG) signal.

Moreover, instead of the ECG signal, the present inventive concept may be used with other physiological signals. These may include blood pressure, vasomotor tone, electromyography (EMG), electrodermography, electroneuography, electro-oculography (EOG), electroretinography (ERG), electronystagmography (ENG), video-oculography (VOG), infrared oculography (IROG), auditory evoked potentials (AEP), visual-evoked potentials (VEP), all kinds of Doppler signals, etc.

Application to Speech Signal Detection:

For speech signal detection, the signal transition detector further comprises a training set of pulses corresponding to a person's speech segments using a known piece of text. Preferably the known piece of text includes the pronunciation signals corresponding to speech segments commonly encountered in practice. The pulse segments from a person's speech are matched to known segments and corresponding features are extracted and used in the speech recognition. If the present signal corresponds to the normal mode of speech, the speech feature detector would not be modified. In the event of variations in the speech, the segments can be dynamically modified by stretching or compressing of the speech segments such that most likely segment would find the match. The environmental noise signal will also have relatively large counts, but these counts would not add up to a sustained large number and thus can be differentiated from a normal speech. Unlike the traditional techniques, this method is robust and immune to signal filter degradations and provides a greatly improved event detection and classification.

As another example, the signal transition detector can be used to determine the speech tempo, which is used in an algorithm for modifying a response. The speech tempo detection is based on the number of transitions counted over a predefined time interval. If the speech tempo goes out of range for a predetermined time and the frequency of the transitions remain in the normal speech range, an operation such as automated stoppage of speech recognition can be initiated and the user can be alerted to change tempo of the recording.

Moreover, instead of the speech other audio signals may be processed by this inventive concept. These may include acoustic waveforms from various musical instruments, natural sounds etc.

The foregoing description was primarily directed to preferred embodiments of the invention. Even though some attention was given to various alternatives within the scope of the invention, it is anticipated that one skilled in the art will likely realize additional alternatives that are now apparent from disclosure of embodiments of the invention. Accordingly, the scope of the invention should be determined from the following claims and not limited by the above disclosure.

Claims

1. An apparatus configured to detect transitions of relatively rising and relatively falling amplitudes of an input signal Vin(t), said apparatus comprising: an input node for receiving the input signal Vin(t);a comparator having a first input, a second input, and an output for providing a two state output signal Vout(t), wherein state changes in the output signal Vout(t) correspond to the relatively rising amplitude of the input signal Vin(t) and the relatively falling amplitude of the input signal Vin(t);a signal shifter configured to provide a shifted signal Vin(t+Δt) to the second input of the comparator; anda hysteresis circuit configured to provide hysteretic deadband appended input signal Vin+ΔV to the first input of the comparator, wherein the hysteretic deadband ΔV is proportional to a ratio of a first value of a first resistor connected between the input node and the first input to the comparator and a second value of a second resistor connected between the first input to the comparator and the output of the comparator.

2. The apparatus cited in claim 1 wherein the input signal Vin(t) is frequency band limited.

3. The apparatus cited in claim 2 wherein the input signal is taken from a group containing: an electrical signal, a mechanical signal, an acoustic signal, and an ultrasonic signal.

4. The apparatus cited in claim 3 wherein the electrical signal is an electrocardiogram signal with a frequency range of 10 Hz to 300 Hz.

5. The apparatus cited in claim 3 wherein the mechanical signal is a vibration signal.

6. The apparatus cited in claim 3 wherein the acoustic signal is a human voice signal with a frequency range of 20 Hz to 4000 Hz.

7. The apparatus cited in claim 1 wherein the ratio is proportional to an amplitude of an anticipated noise signal.

8. The apparatus cited in claim 1 wherein the shifted signal provided by the signal shifter is one of a time shifted signal and a phase shifted signal.

9. The apparatus cited in claim 8 wherein the time shifted signal is a wideband composite signal covering more than 2 octaves.

10. The apparatus cited in claim 8 wherein the phase shifted signal is a narrow band signal covering less than 1 octave.

11. A computer implemented method to detect transitions between relatively rising and falling amplitudes of an input signal Vin(t), the computer implemented method comprising: providing a comparator function having a first input, a second input, and an output for providing a two state output signal Vout(t) wherein state changes in the output signal Vout(t) correspond to the relatively rising amplitude of the input signal Vin(t) and the relatively falling amplitude of the input signal Vin(t);providing a delay function to apply a shifted signal Vin(t+Δt) to the second input of the comparator function; andproviding a hysteresis function to append a hysteretic deadband to input signal Vin+ΔV to the first input of the comparator function, wherein the hysteretic deadband ΔV is programmably selected to be proportional to an amplitude of an anticipated noise signal.

12. The computer implemented method cited in claim 11 wherein the input signal Vin(t) is frequency band limited.

13. The computer implemented method cited in claim 12 wherein the input signal is from a group containing: an electrical signal, a mechanical signal, an acoustic signal, and an ultrasonic signal.

14. The computer implemented method cited in claim 13 wherein the input signal is an electrocardiogram signal with a frequency range of 10 Hz to 300 Hz.

15. The computer implemented method cited in claim 13 wherein the input signal is a vibration signal.

16. The computer implemented method cited in claim 13 wherein the input signal is a human voice signal with a frequency range of 20 Hz to 4000 Hz.

17. The computer implemented method cited in claim 11 wherein the shifted signal provided by the delay function is one of a time shift and a phase shift.

18. The computer implemented method cited in claim 17 wherein the shifted signal is a wideband composite signal covering more than 4 octaves.

19. The computer implemented method cited in claim 17 wherein the shifted signal is a narrowband signal covering fewer than 2 octaves.

20. An apparatus configured to detect transitions of relatively rising and relatively falling amplitudes of an input signal Vin(t), the apparatus comprising: an input node for receiving the input signal Vin(t);a comparator having a first input, a second input, and an output for providing a two state output signal Vout(t) wherein state changes in the output signal Vout(t) correspond to the relatively rising amplitude of the input signal Vin(t) and the relatively falling amplitude of the input signal Vin(t);a variable shift circuit configured to provide a shifted signal Vin(t+Δt) to the second input of the comparator; anda variable hysteresis circuit configured to provide variable hysteretic deadband appended input signal Vin+ΔV to the first input of the comparator wherein the hysteretic deadband ΔV is proportional to a resistor ratio of a first value of a programmably selected first resistor connected between the input node and the first input to the comparator and a second value of a programmably selected second resistor connected between the first input to the comparator and the output of the comparator.

21. The apparatus cited in claim 20 wherein the variable shift circuit is a constant amplitude, variable phase shifter circuit.

22. The apparatus cited in claim 20 wherein the programmably selected first resistor and the programmably selected second resistor each are a digital to analog converter.

23. The apparatus cited in claim 23 wherein the digital to analog converter\is controlled by a central processing unit.