The invention relates to an analog-to-digital-converter comprising a sigma-delta modulator for analog to digital converting analog input signals, said sigma-delta modulator including a feedback loop with a forward path and a feedback path, wherein the forward path comprises a summing node with a first input receiving the analog input signals, noise-shaping filtering means coupled to the output of said summing node and a quantizer coupled to the output of the noise-shaping filtering means and wherein the feedback path is connected to supply output signals of the quantizer to a second input of the summing node. Such analog-to digital converters are well known in the art and they are e.g. used in receivers receiving a plurality of communication channels, in which a mixer is provided for frequency converting at least part of the communication channels and in which the analog-to-digital converter serves to convert the output signals of the mixer into a digital signal. A receiver of this kind is e.g. known from the article “A 10.7-MHz IF-to-Baseband ΣΔ A/D Conversion System for AM/FM Radio Receivers” of E. J. van der Zwan et al in IEEE Journal of Solid State Circuits, Vol. 35, No 12, December 2000.
The above referenced known receiver comprises between the mixer output and the input of the sigma delta modulator a low-pass or band-pass filter for passing the desired communication channel and for suppressing the undesired neighboring channel(s). A great disadvantage of this kind of receivers is that severe requirements are to be set to the channel filter. The filter should add a minimum amount of noise and signal distortion and it should be of sufficiently high order to suppress the neighboring interferers. In order to avoid these disadvantages of the channel filter prior to the analog to digital conversion, a more popular approach is to place the channel filtering function in the digital domain after the analog to digital converter. In this concept use is made of the fact that digital filtering can nowadays be performed more economically and accurately than analog filtering. However, one disadvantage thereof is that the sample rate of the analog to digital conversion should be high enough to avoid aliazing of the interferers into the desired channel. A second disadvantage is that the dynamic range of the analog to digital converter has to be very large (e.g. 100 dB), inter alias because the interferers in the output of the mixer may have levels that are far greater than the level of the desired channel. The consequence is that in the analog to digital converter and in the digital circuitry thereafter the sample rate and/or the number of bits per sample have to be chosen very large. The power consumption of the analog-to-digital-converter and the digital circuitry thereafter will therefore be large. Moreover non-linear distortion in the analog-to-digital-converter may easily occur. In order to make the disadvantages of the prior art receiver more acceptable, the abovementioned document also proposes to have part of the channel filtering before the analog-to-digital-converter and the other part of the channel filtering behind the analog-to-digital-converter.
It is one object of the present invention to substantially mitigate the fore mentioned problems and the analog-to-digital converter according to the invention is therefore characterized in that both the forward path and the feedback path have filtering means that are arranged to additionally constitute a filtering signal transfer function. More particularly it is an object of the invention to provide a receiver comprising means for receiving a plurality of communication channels, a mixer for frequency-converting at least part of said communication channels and an analog-to-digital-converter as described above for analog to digital converting output signals of the mixer, wherein the signal transfer function of the sigma delta modulator has a pass band that substantially corresponds with the frequency band of the desired channel while the interferer channels beyond that pass band are substantially attenuated. A major objective of the invention is that the channel selection filtering can be much simpler implemented within the loop of the ΣΔ-modulator then when this filtering would be done in front of this loop. The channel filtering has to prevent that large interferers in the neighborhood of the desired channel over-load the τΔ modulator and this may be implemented far easier and with lower noise factor within the feedback loop where the signals are substantially reduced with respect to the signals in front of the feedback loop. The usually rather small signal to noise ratio that is required for the digital post-processing can now easily be obtained by a low order single-bit analog ΣΔ converter with low over sampling also because the digital decimation filter that usually follows the ΣΔ-modulator further suppresses remnants of the neighbor-channels. Moreover an advantage of a single bit ΣΔ converter is that for the quantizer a simple one-level comparator can be used and the digital to analog converter in the feedback path between the comparator and the input-summing node can then often be simplified.
It is quite possible in an arrangement according to the invention to combine the noise shaping function and the channel filtering function in a single filter arrangement. An example thereof will be given in
Another embodiment of a receiver according to the invention which also has the possibility to independently design the channel filtering and the noise shaping is characterized by a second summing node with first and second inputs and an output, by a first filter with transfer function F1(s) connected between the output of the first mentioned summing node and the first input of the second summing node, a second filter with transfer function F2(s) connected between the output of the quantizer and the second input of the second summing node and a third filter with transfer function F3(s) between the output of the second summing node and the input of the quantizer, wherein the transfer function F1(s)/(F1(s)+F2(s)) provides the filtering signal transfer function of the analog-to-digital converter. When in this implementation the sum F1(s)+F2(s) of the transfer functions of the first and second filters is equal to 1, these two filters, which are then complements of each other, perform together the channel filtering and the third filter does the noise shaping.
As is already observed earlier, one of the objects of the present invention is to reduce the dynamic range of the signals generated by the analog to digital converter and consequently to reduce the complexity of the digital circuitry that has to process these signals. A further reduction of the dynamic range can be obtained by a properly designed automatic gain control and the receiver of the present invention may therefore be further characterized in that the feedback loop of the sigma-delta modulator comprises one or more gain controlled stages. The dynamic range may also be reduced by an AGC-stage in front of the ΣΔ-modulator but it may be advantageous to carry out the automatic gain control within the feedback loop of the ΣΔ-modulator because the stage is then to a lesser extent subject to large interferer signals so that the linearity requirements are less severe.
The analog-to-digital converter with in-loop signal transfer filtering according to the present invention cannot only be used for passing signals within the frequency band of interest and rejecting the signals outside this frequency band, but also for filtering within this frequency band of interest. A first example thereof is in a so called “low IF” receiver where image channels tend to leak into the wanted channel. In that case the mixer preceding the analog-to-digital converter has to deliver polyphase (complex) signals and the ΣΔ modulator has to be implemented to handle polyphase (complex) signals. All the filters, the quantizer and the DA-converter have to be implemented to handle polyphase signals. The second filter, which is complementary to the first filter again serves to preserve the loop stability of the ΣΔ modulator. The benefit of the image reject filtering within the loop of the ΣΔ modulator is that its implementation can be easier with lower power consumption and lesser chip area. It may be noted that the polyphase filters can realize both the bandpass filtering to reject neighboring channels and the image-reject filtering.
Another example of filtering within the frequency band of interest is in a receiver for FM-modulated signals which is characterized in that, for the purpose of FM-demodulation of the signal, one of the first and second filters is a differentiator and the other of the first and second filters is an integrator within the frequency band of the input signal. In that case the differentiator-integrator combination converts the FM-modulated signal into an AM modulated digital signal which can then easily be demodulated in the digital processing after the analog-to-digital converter. Again the benefit of the filtering inside the loop of the EA modulator is an easier implementation with lower power consumption and lesser chip area.
It may further be observed that the invention may be implemented with a time-continuous analog ΣΔ-modulator or with a time-discrete analog ΣΔ-modulator (a switched capacitance implementation). In the latter case an anti-aliazing low pass filter that suppresses all frequency components above half the sampling frequency, has to be placed prior to the ΣΔ-modulator.
The invention will be described with reference to the accompanying figures. Herein shows:
The receiver of
The input signal X(s) to the ΣΔ-modulator is applied to a first summing node C1 and the output signal thereof is applied to a first integrator I1 with transfer function 1/sτ1. The output signal of the first integrator is applied to a second summing node C2 whose output is coupled to a second integrator I2 with transfer function 1/sτ2. The output signals of the second integrator are fed to a clocked quantizer Q that converts the analog signals to a series of digital words with the sample rate of the clock-frequency. The quantizer Q may generate multi-bit words but conveniently the quantizer outputs single-bit words (bit-stream) in which case the quantizer may have the form of a one-level comparator. The output Y(z) of the quantizer is converted into analog pulses Y(s) in a digital to analog converter D and the analog pulses so obtained are applied through coefficient multipliers M1 and M2 with coefficients d1 and d2 to the summing nodes C1 and C2 respectively. In the arrangement of
The digital output bit-stream of the ΣΔ-modulator SD is fed to a decimation filter F for converting the bit-stream to multi-bit words of reduced sample rate. The output of the filter F may be processed in further digital circuitry (not shown). Moreover this output is applied to an automatic gain control stage B that controls the magnitude of the coefficients b, d1 and τ1 in respectively the units M3, M1 and I1 of the ΣΔ-modulator.
In operation the input signal X(s) is low pass filtered by the low pass filter constituted by the two integrators I1 and I2 and the feedback of the analog pulses Y(s) through the multipliers M1 and M2. The usual function of a EA-modulator is to digitize the signal and to shift the quantization noise associated therewith to the higher frequency range (noise-shaping) between the frequency band of interest and half the sample (clock) frequency of the quantizer. Additionally the low pass filter of
The coefficient multiplier M3 has substantially no effect on the channel filtering function of the ΣΔ-modulator but provides additional suppression of the quantization noise by implementing a local resonance close to the pass band of the desired signals.
A further substantial reduction of the dynamic range of the signals to be processed is obtained by automatic gain control. As already noted in the preamble to this patent application, this gain control can be performed inside the feedback loop of the ΣΔ-modulator as well as in front of the analog-to-digital converter. In the arrangement of
When G(s) is the transfer function of the noise-shaping low pass filter G and when the combination of quantizer Q and digital to analog converter D is simulated by a linear amplifier with amplification A and a source of quantization noise ε, then the output signal Y(s) in the ΣΔ-modulator of
With L(s).H(s)=1 this becomes:
From the first term of the right hand side of this equation it follows that, when the amplification A is sufficiently high, the signal transfer is substantially only dependent from the channel filter L (and its counterpart H) and from the second term it follows that the noise-shaping is only dependent from the noise-shaping filter G. Therefore the arrangement of
the filter H′ is an equally simple 1st order high pass RC-filter with transfer
The arrangement of
In a further conversion step a single high pass section in F3 replaces the two high pass sections of F1 and F2. This results in:
Therefore the filter F1 is merely an interconnection, the filter F2 is a differentiator and the filter F3 is the original low pass filter G in series with a low pass filter section L. In all three cases the quotient F1(s)/(F1(s)+F2(S)), that determines the channel filtering, is equal to 1/(sτ+1) and the product (F1(s)+F2(S))*F3(S) that determines the noise shaping, equals G(s). It may be observed that the multiplication factor τ of the differentiator determines the cut off frequency of the channel filter.
In the arrangements of
The function of the filters H and F2 may be shifted behind the digital-to-analog converter D and then benefit from a digital implementation. This is shown in
In
The embodiments of the present invention described herein are intended to be taken in an illustrative and not a limiting sense. Various modifications may be made to these embodiments by those skilled in the art without departing from the scope of the present invention as defined in the appended claims.
It may be noted that the invention relates to homodyne receivers in which the desired channel is frequency-converted to baseband (zero-IF) as well as to heterodyne receivers with frequency-conversion of the desired channel to a suitable intermediate frequency band.
It may be observed that the embodiments discussed may be used in receivers for wireless communication, however it will be clear to those skilled in the art that the invention may be applied advantageously in other receivers, for instance receivers as used in TV systems for receiving terrestrial satellite broadcasted TV signals, or TV signals broadcasted via cable networks.
Number | Date | Country | Kind |
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03101928.4 | Jun 2003 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB04/51003 | 6/24/2004 | WO | 12/22/2005 |