Claims
- 1. An improved optical reader for reading decodable indicia, comprising:
a sensor that senses an excitation carrying information representing an encoded symbol and that provides an analog signal responsive to said excitation at an output terminal; an analog-to-digital converter configured to receive said analog signal from said sensor output terminal at an analog data input terminal, and to provide optimized digital data in an N-bit representation, where N is a positive integer, said N-bit range of said analog-to-digital converter substantially spanning a dynamic range of said excitation as sensed by said sensor; and a microprocessor that manipulates said optimized digital data to recover said encoded symbol, thereby providing accurate decoding of said digital data under a range of illumination conditions.
- 2. The improved optical reader of claim 1, further comprising a display that displays said symbol.
- 3. The improved optical reader of claim 1, wherein said range of illumination includes approximately 70,000 Lux to substantially zero Lux.
- 4. The improved optical reader of claim 1, wherein said sensor comprises a CCD sensor having a plurality of pixels.
- 5. The improved optical reader of claim 1, wherein said sensor comprises a selected one of a tv camera, a digital camera, and a video camera.
- 6. The improved optical reader of claim 1, wherein said dynamic range of said excitation is measured temporally.
- 7. The improved optical reader of claim 1, wherein said dynamic range of said excitation is measured spatially.
- 8. A least-significant-bit-optimized analog-to-digital converter circuit, comprising:
an analog-to-digital converter having a first reference voltage input terminal, a second reference voltage input terminal, an analog data input terminal, and a digital data output terminal providing data in an N-bit representation, where N is a positive integer; a first reference voltage source that provides a first reference voltage to said first reference voltage input terminal; a second reference voltage source that provides a second reference voltage to said second reference voltage input terminal; a detector that detects an excitation and that provides an analog signal responsive to said excitation to said analog data input terminal; and a microprocessor-based controller that controls said first reference voltage and said second reference voltage; whereby said microprocessor-based controller adjusts at least one of said first and said second reference voltages to cause said N-bit range of said analog-to-digital converter to substantially span a dynamic range of said excitation as detected by said detector, thereby optimizing a value of a least-significant bit of said analog-to-digital converter with respect to said excitation.
- 9. The analog-to-digital converter circuit of claim 8, wherein a difference between said first and said second reference voltages is a rational number times a characteristic voltage, a denominator of said rational number being a full scale value of an M-bit representation of the number of bits of a first D/A converter and a second D/A converter.
- 10. The analog-to-digital converter circuit of claim 8, wherein said analog-to-digital converter further comprises a clock signal input terminal for receipt of a clock signal that determines an N-bit data rate under control of said microprocessor-based controller.
- 11. The analog-to-digital converter circuit of claim 8, wherein said detector comprises a CCD sensor having a plurality of pixels.
- 12. The analog-to-digital converter circuit of claim 8, wherein said dynamic range of said excitation is measured temporally.
- 13. The analog-to-digital converter circuit of claim 8, wherein said dynamic range of said excitation is measured spatially.
- 14. The analog-to-digital converter circuit of claim 8, further comprising a microprocessor that receives an N-bit digital output datum from said analog-to-digital converter.
- 15. The analog-to-digital converter circuit of claim 14, wherein said microprocessor that receives digital output data manipulates said digital output data to interpret an encoded symbol.
- 16. The analog-to-digital converter circuit of claim 8, wherein said microprocessor-based controller, said first reference voltage source, and said second reference voltage source are integrated in a single integrated circuit.
- 17. An optical reader comprising said least-significant-bit-optimized analog-to-digital converter circuit of claim 8.
- 18. An analog-to-digital converter circuit having an auto-ranging capability, comprising:
an analog-to-digital converter having a first reference voltage input terminal, a second reference voltage input terminal, an analog data input terminal, and a digital data output terminal providing data in an N-bit representation, where N is a positive integer; a first reference voltage source that provides a first reference voltage to said first reference voltage input terminal; a second reference voltage source that provides a second reference voltage to said second reference voltage input terminal; a detector that detects an excitation having a dynamic range and that provides an analog signal responsive to said excitation to said analog data input terminal; and a microprocessor-based controller that controls said first reference voltage and said second reference voltage; whereby said microprocessor-based controller adjusts at least one of said first and said second reference voltages to cause said N-bit range of said analog-to-digital converter to substantially span said dynamic range of said excitation as detected by said detector, thereby automatically setting a range of said analog-to-digital converter with respect to said excitation.
- 19. The analog-to-digital converter circuit of claim 18, wherein a difference between said first and said second reference voltages is a rational number times a characteristic voltage, a denominator of said rational number being a full scale value of an M-bit representation of the number of bits of a first D/A converter and a second D/A converter.
- 20. The analog-to-digital converter circuit of claim 18, wherein said analog-to-digital converter further comprises a clock signal input terminal for receipt of a clock signal that determines an N-bit data rate under control of said microprocessor-based controller.
- 21. The analog-to-digital converter circuit of claim 18, wherein said detector comprises a CCD sensor having a plurality of pixels.
- 22. A method of improving an accuracy and a precision of an optical reader, the method comprising the steps of:
providing at an analog output terminal of a sensor of said reader an output signal having dynamic range responsive to an excitation, said excitation carrying information representing an encoded symbol; converting said analog output signal to an optimized digital data in an N-bit representation, where N is a positive integer, said N-bit representation configured to substantially spanning said dynamic range; and decoding said optimized digital data to recover an encoded symbol, irrespective of said dynamic range of said excitation.
- 23. The method of claim 22, further comprising the step of displaying said symbol.
- 24. A method of optimizing a least-significant-bit response of an analog-to-digital converter, the method comprising the steps of:
providing with a detector an analog electrical signal responsive to an excitation signal, said excitation signal having a dynamic range; applying said analog electrical signal to an analog data input terminal of an analog-to-digital converter; applying to said analog-to-digital converter a first reference voltage at a first reference voltage input terminal and a second reference voltage at a second reference voltage input terminal, and receiving from said analog-to-digital converter digital data responsive to said analog electrical signal and to a voltage difference between said first and said second reference voltages, said digital data having an N-bit representation, where N is a positive integer; and adjusting at least one of said first and said second reference voltages to cause said N-bit range of said digital data to substantially span said dynamic range of said excitation signal, thereby optimizing a value of a least-significant bit of said analog-to-digital converter with respect to said excitation signal.
- 25. The method of claim 24, wherein said voltage difference between said first and said second reference voltages is a characteristic voltage multiplied by a rational number, a denominator of said rational number being a full scale value of an M-bit representation of the number of bits of a first D/A converter and a second D/A converter.
- 26. The method of claim 24, wherein the step of applying first and second reference voltages is performed using a microprocessor-based controller.
- 27. The method of claim 24, wherein the step of adjusting at least one of said first and second reference voltages is performed using a microprocessor-based controller.
- 28. A method of automatically setting a range of an analog-to-digital converter, the method comprising the steps of:
providing with a detector an analog electrical signal responsive to an excitation signal, said excitation signal having a dynamic range; applying said analog electrical signal to an analog data input terminal of an analog-to-digital converter; applying to said analog-to-digital converter a first reference voltage at a first reference voltage input terminal and a second reference voltage at a second reference voltage input terminal, and receiving from said analog-to-digital converter digital data responsive to said analog electrical signal and to a voltage difference between said first and said second reference voltages, said digital data having an N-bit representation, where N is a positive integer; and adjusting at least one of said first and said second reference voltages to cause said N-bit range of said digital data to substantially span said dynamic range of said excitation signal, thereby automatically setting said range of said analog-to-digital converter with respect to said excitation signal.
- 29. The method of claim 28, wherein said voltage difference between said first and said second reference voltages is a characteristic voltage multiplied by a rational number, a denominator of said rational number being a full scale value of an M-bit representation of the number of bits of a first D/A converter and a second D/A converter.
- 30. The method of claim 28, wherein the step of applying first and second reference voltages is performed using a microprocessor-based controller.
- 31. The method of claim 28, wherein the step of adjusting at least one of said first and second reference voltages is performed using a microprocessor-based controller.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is related to the applications enumerated below, all of which are being filed with the United States Patent and Trademark Office contemporaneously herewith on Jan. 9, 2003 by Express Mail, and all of which are subject to assignment to the same assignee of this application, the disclosure of each of which is incorporated herein by reference in its entirety: Attorney Docket Number 283-354.01, entitled “Housing for an Optical Reader;” Attorney Docket Number 283-361.02, entitled “Optical Reader System Comprising Digital Conversion Circuit;” Attorney Docket Number 283-374.01, entitled “Decoder Board for an Optical Reader Utilizing a Plurality of Imaging Modules;” Attorney Docket Number 283-374.02, entitled “Manufacturing Methods for a Decoder Board for an Optical Reader Utilizing a Plurality of Imaging Formats;” and Attorney Docket Number 283-377, entitled “Optical Reader Having Position Responsive Decode Launch Circuit.”