The present disclosure relates to determining angle of arrivals (AoA) between a destination electronic device observing a communication signal and a source electronic device providing the communication signal, and including, compensating for erroneous phase shifts in samples of the communication signal resulting from timing differences between receiving antennas of the destination electronic devices.
The Bluetooth® Low Energy (BLE) communication standard outlines a low-power wireless personal area network technology for connecting various electronic devices to one another. The BLE communication standard is described in a version of a Bluetooth® communication standard, for example, Bluetooth® 4.x and/or Bluetooth® 5.x. This lowpower wireless personal area network technology is useful for transferring small amount of data at lower speeds in home automation devices, fitness devices, medical devices, and/or personal health devices to provide some examples. The BLE communication standard describes low power, resource constrained electronic devices, referred to as peripheral devices and broadcaster devices, which communicate with much more powerful electronic devices, referred to as central devices and observer devices.
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
The market demand for Bluetooth® location services is increasing rapidly, with industry forecasts predicting over 400 million Bluetooth® location service electronic devices to be shipped by 2022. The introduction of Bluetooth® Low Energy (BLE) has allowed for the creation of powerful, low-cost real-time locating systems, indoor positioning systems, item finding systems, point of interest (Pol) information systems, and more. The ability of the BLE to locate electronic devices has led to the development of Bluetooth® proximity systems and Bluetooth® positioning systems. Bluetooth® positioning systems use BLE to determine physical location of electronic devices and involve more sophisticated infrastructure than Bluetooth® proximity systems. Real-time locating systems (RTLS) and indoor positioning systems (IPS) are two of the most popular types of Bluetooth® positioning systems.
The BLE standard outlines an optional direction-finding capability which can be used to determine the relative direction from a Bluetooth® destination device receiving a Bluetooth® signal to a Bluetooth® source device providing the Bluetooth® signal. The optional direction-finding capability feature utilizes an angle of arrival (AoA) to determine the relative direction of the Bluetooth® signal. The Bluetooth® source device transmits a special direction-finding signal using a single antenna which is observed by the Bluetooth® destination device over multiple receiving antennas. As to be described in further detail below, timing differences between the receiving antennas can introduce erroneous phase shifts into the samples of the special direction-finding signal which can degrade the accuracy of the AoA. The exemplary methods and apparatuses to be described in further detail below can determine the timing differences between the receiving antennas and thereafter compensate for the timing differences between the receiving antennas to thereby improve the accuracy of the AoA.
Exemplary Bluetooth® Low Energy (BLE) Communication Environment
In the exemplary embodiment illustrated in
In the exemplary embodiment illustrated in
As illustrated in
In some embodiments, the data packets can represent direction finding enabled data packets having known direction-finding signals which can be utilized by the one or more electronic devices 104.1 through 104.k to determine directions of the one or more electronic devices 104.1 through 104.k to the one or more electronic beacons 102.1 through 102.k. As to be described in further detail below, the one or more electronic devices 104.1 through 104.k can utilize these direction-finding signals to determine their directions to the one or more electronic beacons 102.1 through 102.k. In some embodiments, the one or more electronic devices 104.1 through 104.k can include multiple receiving antennas to sequentially sample these direction-finding signals. However, timing differences between the receiving antennas can introduce erroneous phase shifts into the samples of these direction-finding signals which can degrade the accuracy of their determined directions to the one or more electronic beacons 102.1 through 102.k. As to be described in further detail below, the one or more electronic devices 104.1 through 104.k can determine the timing differences between the receiving antennas and thereafter compensate for the timing differences between the receiving antennas to thereby improve the accuracy of their determined directions to the one or more electronic beacons 102.1 through 102.k.
Exemplary Communication Receiver within the Exemplary Bluetooth® Low Energy (BLE) Communication Environment
As illustrated in
In the exemplary embodiment illustrated in
The processing circuitry 208 can thereafter perform a statistical analysis of the absolute samples of the reference period 254 to determine the erroneous phase shifts θe(0) through θe(M−1) at the instances in time t1 through tM of the receiving antennas 204.1 through 204.M. In some embodiments, the erroneous phase shifts θe(0) through θe(M−1) can be mathematically expressed, in terms of phase, as:
where θe(t) represents an erroneous phase shift at a switching period time 1, N represents total number of the absolute samples of the reference period 254, x(n) represents the absolute samples of the reference period 254, and H represents the well-known Hermitian matrix operation.
In some embodiments, the erroneous phase shifts θe(0) through θe(M−1) can depend on time differences, also referred to as switching slot times, between the receiving antennas 204.1 through 204.M. For example, the switching slot times between the receiving antennas 204.1 through 204.M can be 0, 2, 4, 6, . . . microseconds for two (2) microsecond switching slots or 0, 4, 8, 12, . . . microseconds for a four (4) microsecond switching slots as outlined in the BLE communication standard. In some embodiments, for example, with Gaussian frequency-shift keying (GFSK) modulation with a modulation index of 0.5 as outlined in the BLE communication standard, each four (4) microsecond phase rotates by three hundred sixty (360) degrees for a one (1) Megabit per second transmission rate. In these embodiments, the erroneous phase shifts at 2 microseconds, 6 microseconds, 10 microseconds, etc. are equivalent and the erroneous phase shifts at 4 microseconds, 8 microseconds, 12 microseconds, etc. are equivalent. In these embodiments, the erroneous phase shifts θe(0) through θe(M−1) can be simplified by determining the erroneous phase shifts at 0 microseconds, at 2 microseconds, and at 4 microseconds. In some embodiments the erroneous phase shifts at 0 microseconds, at 2 microseconds, and at 4 microseconds can be mathematically expressed as:
where x(n) represents the absolute samples of the reference period 254.
Moreover, the communication receiver 202 can sample the direction-finding signal 252 over the switching/sampling periods 256.1 through 256.M as observed by the receiving antennas 204.1 through 204.M at the switching slot times, for example, once every two microseconds, to generate relative samples of the switching/sampling periods 256.1 through 256.M. The term “relative” indicates that the samples of the direction-finding signal 252 sampled over the switching/sampling periods 256.1 through 256.M include the erroneous phase shifts θe(0) through θe(M−1) resulting from the timing differences between the receiving antennas 204.1 through 204.M and phase differences resulting from spatial separations between the receiving antennas 204.1 through 204.M. As to be described in further detail below, the switching/sampling periods 256.1 through 256.M include a sequence of M switching periods to sequentially select among the receiving antennas 204.1 through 204.M interdigitated with M sampling periods to sample the direction-finding signal 252 as observed by the selected receiving antenna. In some embodiments, the duration of each of the M switching periods, also referred to as the switching slot times as described above, can be 0, 2, 4, 6, . . . microseconds for one (1) microsecond switching slots or 0, 4, 8, 12, . . . microseconds for a two (2) microsecond switching slots as outlined in the BLE communication standard. In the exemplary embodiment illustrated in
X(t)=[x1(t1)x2(t2) . . . xM(tN)] (5)
where xi(tj) represents an ith sample from among the relative samples of the switching/sampling periods 256.1 through 256.M that was observed by a receiving antenna i from among the receiving antennas 204.1 through 204.M at an instance in time ti from among in time t1 through tM. In some embodiments, the communication receiver 202 can be alternatively, or additionally, develop a covariance matrix Rxx, also referred to as an auto-covariance matrix, from the relative samples of the switching/sampling periods 256.1 through 256.M. One such exemplary covariance matrix can be mathematically expressed as:
Rxx=E[X(t)XH(t)], (6)
where X(t) represents the mathematical matrix X(t) of the relative samples of the switching/sampling periods 256.1 through 256.M.
As described above, the timing differences between the receiving antennas 204.1 through 204.M can introduce the erroneous phase shifts θe(0) through θe(M−1) into the relative samples of the switching/sampling periods 256.1 through 256.M. In these embodiments, the covariance matrix Rxx with these erroneous phase shifts can be mathematically expressed as:
Rxx=|Rxx|ej(θ
where θant(d) represents the AoA of the data packet 250 which is a function of a separation distance d between the receiving antennas 204.1 through 204.M and θe (t) represents the erroneous phase shift at a time t from among the instances in time t1 through tM. In the exemplary embodiment illustrated in
{circumflex over (R)}xx=Rxxe−jθ
where {circumflex over (R)}xx represents a phase corrected covariance matrix Rxx which has been compensated for the erroneous phase shift.
After compensating for the erroneous phase shifts θe(0) through θe(M−1), the processing circuitry 208 can determine the AoA of the data packet 250. In some embodiments, the processing circuitry 208 determines a spatial power spectrum of the data packet 250 from the covariance matrix {circumflex over (R)}xx. The spatial power spectrum represents an indication of the power, for example, energy per unit of time, of the data packet 250 over multiple angles, for example, various angles between zero (0) and three hundred sixty (360) degrees. In some embodiments, the processing circuitry 208 can determine the spatial power spectrum of the data packet 250 using a well-known spatial power spectrum estimation algorithm, such as the Bartlett, Minimum Variance Distortionless Response (MVDR), and Multiple Signal Classification (MUSIC) to provide some examples. After calculating the spatial power spectrum, the processing circuitry 208 selects an angle from among the multiple angles having the greatest power, for example, energy per unit of time, from among the spatial power spectrum as the AoA of the data packet 250. In some embodiments, the processing circuitry 208 can combine the AoA of the data packet 250 with a well-known distance estimation technique to determine the location of the source electronic device transmitting the data packet 250.
Exemplary Method for Determining Angles of Arrival (AoAs)
At operation 302, the exemplary operational control flow 300 receives samples of a communication signal, such as the data packet 250 as described above in
At operation 304, the exemplary operational control flow 300 determines a covariance matrix of the samples from operation 302 in a substantially similar manner as described above in
Rxx=E[X(t)XH(t)], (9)
where X(t) represents the mathematical matrix X(t) of the relative samples of the communication signal from operation 302.
At operation 306, the exemplary operational control flow 300 compensates for erroneous phase shifts in the covariance matrix from operation 304. In some embodiments, the exemplary operational control flow 300 can receive the erroneous phase shifts at the instances in time t1 through tM, such as the erroneous phase shifts θe(0) through θe(M−1) as described above in
where θe(t) represents an erroneous phase shift at a time t, N represents total number of absolute samples of the communication signal from operation 302, and x(n) represents the absolute samples of the communication signal from operation 302. As described above, the absolute samples of the communication signal from operation 302 represent samples of the communication signal that was observed by a reference receiving antenna from among the receiving antennas from operation 302. As described above, the term “absolute” indicates that these samples of the communication signal from operation 302 include erroneous phase shifts resulting from the timing differences between the receiving antennas. In some embodiments, the erroneous phase shifts at the instances in time t1 through tM can be removed from the covariance matrix Rxx through conjugate multiplication as follows:
{circumflex over (R)}xx=Rxxe−jθ
where {circumflex over (R)}xx represents the covariance matrix Rxx which has been compensated for the erroneous phase shift.
At operation 308, the exemplary operational control flow 300 determines the AoA of the communication signal from operation 302 from the phase compensated covariance matrix {circumflex over (R)}xx from operation 306 in a substantially similar manner as described above in
Exemplary Direction-Finding Enabled Data Packet
In the exemplary embodiment illustrated in
In the exemplary embodiment illustrated in
Exemplary Electronic Processing System within the Exemplary Bluetooth® Low Energy (BLE) Communication Environment
In the exemplary embodiment illustrated in
The processing device 502 represents one or more processors such as a microprocessor, a central processing unit, or the like. More particularly, the processing device may be complex instruction set computing (CISC) microprocessor, reduced instruction set computing (RISC) microprocessor, very long instruction word (VLIW) microprocessor, or a processor implementing other instruction sets, or processors implementing a combination of instruction sets. The processing device 502 may also be one or more special-purpose processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), network processor, or the like. The processing device 502 may be configured to execute instructions 526 for performing the operations and steps described herein.
The electronic processing system 500 may further include a network interface device 508 to communicate over the network 540. The electronic processing system 500 also may include a video display unit 520 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device 512 (e.g., a keyboard), a cursor control device 514 (e.g., a mouse), a graphics processing unit 522, a signal generation device 516 (e.g., a speaker), graphics processing unit 522, video processing unit 528, and audio processing unit 542.
The data storage device 518 may include a processor-readable storage medium 524 (also known as a non-transitory computer-readable medium) on which is stored one or more sets of instructions 526 or software embodying any one or more of the methodologies or functions described herein. The instructions 526 may also reside, completely or at least partially, within the main memory 504 and/or within the processing device 502 during execution thereof by the electronic processing system 500, the main memory 504 and the processing device 502 also constituting processor-readable storage media.
In some implementations, the instructions 526 include instructions to implement functionality corresponding to the present disclosure. While the processor-readable storage medium 524 is shown in an example implementation to be a single medium, the term “processor-readable storage medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of instructions. The term “processor-readable storage medium” shall also be taken to include any medium that is capable of storing or encoding a set of instructions for execution by the processor and that cause the processor and the processing device 502 to perform any one or more of the methodologies of the present disclosure. The term “processor-readable storage medium” shall accordingly be taken to include, but not be limited to, solid-state memories, optical media, and magnetic media.
Some portions of the preceding detailed descriptions have been presented in relation to algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the ways used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm may be a sequence of operations leading to a desired result. The operations are those requiring physical manipulations of physical quantities. Such quantities may take the form of electrical or magnetic signals capable of being stored, combined, compared, and otherwise manipulated. Such signals may be referred to as bits, values, elements, symbols, characters, terms, numbers, or the like.
It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the present disclosure, it is appreciated that throughout the description, certain terms refer to the action and processes of a processor, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the processor's registers and memories into other data similarly represented as physical quantities within the processor memories or registers or other such information storage devices.
The present disclosure also relates to an apparatus for performing the operations herein. This apparatus may be specially constructed for the intended purposes, or it may include a computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but not limited to, any type of disk including floppy disks, optical disks, CD-ROMs, and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), EPROMS, EEPROMs, magnetic or optical cards, or any type of media suitable for storing electronic instructions, each coupled to a processor bus.
The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various other systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct a more specialized apparatus to perform the method. In addition, the present disclosure is not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the disclosure as described herein.
The present disclosure may be provided as a computer program product, or software, that may include a processor-readable medium having stored thereon instructions, which may be used to program a processor (or other electronic devices) to perform a process according to the present disclosure. A processor-readable medium includes any mechanism for storing information in a form readable by a processor (e.g., a computer). For example, a processor-readable (e.g., computer-readable) medium includes a processor (e.g., a computer) readable storage medium such as a read only memory (“ROM”), random access memory (“RAM”), magnetic disk storage media, optical storage media, flash memory devices, etc.
In the foregoing disclosure, implementations of the disclosure have been described with reference to specific example implementations thereof. It will be evident that various modifications may be made thereto without departing from the broader spirit and scope of implementations of the disclosure as set forth in the following claims. Where the disclosure refers to some elements in the singular tense, more than one element can be depicted in the figures and like elements are labeled with like numerals. The disclosure and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.
The present application claims the benefit of U.S. Patent Appl. No. 62/882,626 filed on Aug. 5, 2019, which is incorporated herein by reference in its entirety.
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