The technical field relates to an antenna assembly and method.
Current trends in cellular communications systems integrate more and more frequency bands. The consequence is that most base station antennas are now required to be multiband. These multiband antennas are generally made of phased array elements, which are closely interleaved, creating many non-desired interactions between the radiating elements of different bands. Although these antenna assemblies support multiband communication, they each have their own shortcomings. Accordingly, it is desired to provide an improved antenna assembly.
According to a first aspect, there is provided an antenna assembly, comprising: a printed circuit board assembly having a radiating element layer and a choke structure, the choke structure having a central conductor and a shielding structure, wherein the central conductor comprises at least a portion of the radiating element layer.
The first aspect recognises that in a configuration of multiband antenna 10, as shown schematically in
In one embodiment, the shielding structure at least partially surrounds the portion of the radiating element layer. This provides a compact arrangement that is easy to assemble.
In one embodiment, the shielding structure comprises at least one conductive layer separated from the portion of the radiating element layer by a dielectric layer of the printed circuit board assembly.
In one embodiment, the shielding structure comprises at least a pair of conductive layers, each separated from the portion of the radiating element layer by a respective dielectric layer of the printed circuit board assembly.
In one embodiment, the radiating element layer is sandwiched between the pair of dielectric layers.
In one embodiment, the pair of conductive layers is formed on outward major faces of the pair of dielectric layers.
In one embodiment, the shielding structure comprises conductive vias extending through the dielectric layers between the pair of conductive layers.
In one embodiment, the vias electrically couple the conductive layers with the portion of the radiating element layer.
In one embodiment, the printed circuit board assembly comprises stacked first and second dielectric layers having adjoining major faces, the first dielectric layer having the portion of the radiating element layer formed on its adjoining major face and a first conductive layer formed on its outer major face, the second dielectric layer having a second conductive layer formed on its outer major face. This provides an antenna assembly having integrated chokes which is easy to assemble.
In one embodiment, the second dielectric layer has a further conductive layer formed on its adjoining major face and the printed circuit board assembly comprises an insulating layer positioned between the adjoining major faces. This provides an antenna assembly having integrated chokes which is easy to assemble from stacked printed circuit boards, with capacitive coupling between the boards.
In one embodiment, the portion of the radiating element layer is shaped to extend within an area defined by the conductive layers.
In one embodiment, the portion of the radiating element layer comprises a pair of bent elements which extend initially away from an elongate length of a continuous part of the portion of the radiating element and turn to extend generally parallel to the elongate length of the continuous part of the portion of the radiating element.
In one embodiment, a length of each bent element defines its effective electrical length. It will be appreciated that the effective electrical length will also be dependent on the relative permittivity of the adjacent dielectric layers.
In one embodiment, the vias electrically couple the pair of conductive layers with the portion of the radiating element layer.
In one embodiment, a plurality of the vias is positioned to provide the choke with an RF short circuit at one end of the portion of the radiating element layer.
In one embodiment, the vias are positioned to provide the choke with an RF open circuit at another end of the portion of the radiating element layer.
In one embodiment, the shielding structure defines an effective electrical length of the choke structure.
In one embodiment, the shielding structure is dimensioned to provide the effective electrical length corresponding to a quarter of a wavelength to be attenuated. For example, in order to block 3.5 GHz (0.099 m wavelength) currents: wavelength/4@3.5 GHz in a PCB structure having a permittivity of 2.55 DK gives an effective electrical length of 14.7 mm.
In one embodiment, the vias are positioned with an inter-via spacing having an effective electrical length corresponding to no more than one tenth of a wavelength to be attenuated.
In one embodiment, the vias are positioned with an inter-via spacing having an effective electrical length corresponding to no more than one twentieth of the wavelength to be attenuated.
In one embodiment, the antenna assembly comprises a plurality of the shielding structures collocated to share the portion of the radiating element layer as a common central conductor. Hence, more than one choke may be provided on the radiating element layer to provide for enhanced perturbation reduction.
In one embodiment, each shielding structure is dimensioned to provide one of identical and different effective electrical lengths. Hence, the multiple chokes may reduce perturbations at the same and/or different frequencies.
In one embodiment, the plurality of the shielding structures comprises a plurality of the pairs of conductive layers, each separated by a dielectric layer of the printed circuit board assembly. Hence, more than one choke may be stacked on each other to provide for enhanced perturbation reduction.
In one embodiment, each pair of conductive layers is dimensioned to provide one of identical and different effective electrical lengths. Hence, the multiple chokes may reduce perturbations at the same and/or different frequencies.
In one embodiment, the plurality of the shielding structures comprises a plurality of the pairs of bent elements extending from the portion of the radiating element layer.
In one embodiment, each of the plurality of the pairs of bent elements has one of identical and different effective electrical lengths. Hence, the multiple chokes may reduce perturbations at the same and/or different frequencies.
In one embodiment, the antenna assembly comprises a plurality of the choke structures.
In one embodiment, the plurality of choke structures is arranged in series along the radiating element layer.
In one embodiment, the radiating element layer comprises one of a monopole and a dipole.
In one embodiment, the antenna assembly comprises an antenna device comprising the printed circuit board assembly.
In one embodiment, the antenna assembly comprises a radio system comprising the printed circuit board assembly.
According to a second aspect, there is provided an antenna device comprising the antenna assembly of the first aspect and its embodiments.
According to a third aspect, there is provided a method, comprising: providing a printed circuit board assembly having a radiating element layer and a choke structure, the choke structure having a central conductor and a shielding structure, wherein the central conductor comprises at least a portion of the radiating element layer.
In one embodiment, the method comprises at least partially surrounding the portion of the radiating element layer with the shielding structure.
In one embodiment, the shielding structure comprises at least one conductive layer separated from the portion of the radiating element layer by a dielectric layer of the printed circuit board assembly.
In one embodiment, the shielding structure comprises at least a pair of conductive layers, each separated from the portion of the radiating element layer by a respective dielectric layer of the printed circuit board assembly.
In one embodiment, the method comprises sandwiching the radiating element layer between the pair of dielectric layers.
In one embodiment, the method comprises forming the pair of conductive layers on outward major faces of the pair of dielectric layers.
In one embodiment, the shielding structure comprises conductive vias extending through the dielectric layers between the pair of conductive layers.
In one embodiment, the method comprises electrically coupling the conductive layers with the portion of the radiating element layer with the vias.
In one embodiment, the printed circuit board assembly comprises stacked first and second dielectric layers having adjoining major faces and the method comprises forming the portion of the radiating element layer on an adjoining major face of the first dielectric layer, forming a first conductive layer on an outer major face of the first dielectric layer, and forming a second conductive layer on an outer major face of the second dielectric layer.
In one embodiment, the method comprises forming a further conductive layer on an adjoining major face of the second dielectric layer and positioning an insulating layer between the adjoining major faces.
In one embodiment, the method comprises shaping the portion of the radiating element layer to extend within an area defined by the conductive layers.
In one embodiment, the portion of the radiating element layer comprises a pair of bent elements shaped to extend initially away from an elongate length of a continuous part of the portion of the radiating element and turn to extend generally parallel to the elongate length of the continuous part of the portion of the radiating element.
In one embodiment, a length of each bent element defines its effective electrical length.
In one embodiment, the method comprises electrically coupling the pair of conductive layers with the portion of the radiating element layer using the vias.
In one embodiment, the method comprises positioning a plurality of the vias to provide the choke with an RF short circuit at one end of the portion of the radiating element layer.
In one embodiment, the method comprises positioning the vias to provide the choke with an RF open circuit at another end of the portion of the radiating element layer.
In one embodiment, the shielding structure defines an effective electrical length of the choke structure.
In one embodiment, the method comprises dimensioning the shielding structure to provide the effective electrical length corresponding to a quarter of a wavelength to be attenuated.
In one embodiment, the method comprises positioning the vias with an inter-via spacing having an effective electrical length corresponding to no more than one tenth of a wavelength to be attenuated.
In one embodiment, the method comprises positioning the vias with an inter-via spacing having an effective electrical length corresponding to no more than one twentieth of the wavelength to be attenuated.
In one embodiment, the method comprises collocating a plurality of the shielding structures to share the portion of the radiating element layer as a common central conductor.
In one embodiment, the method comprises dimensioning each shielding structure to provide one of identical and different effective electrical lengths.
In one embodiment, the plurality of the shielding structures comprises a plurality of the pairs of conductive layers, each separated by a dielectric layer of the printed circuit board assembly.
In one embodiment, the method comprises dimensioning each pair of conductive layers to provide one of identical and different effective electrical lengths.
In one embodiment, the plurality of the shielding structures comprises a plurality of the pairs of bent elements extending from the portion of the radiating element layer.
In one embodiment, each of the plurality of the pairs of bent elements has one of identical and different effective electrical lengths.
In one embodiment, the method comprises providing a plurality of the choke structures.
In one embodiment, the method comprises arranging the plurality of choke structures in series along the radiating element layer.
In one embodiment, the radiating element layer comprises one of a monopole and a dipole.
In one embodiment, the antenna assembly comprises an antenna device comprising the printed circuit board assembly.
In one embodiment, the antenna assembly comprises a radio system comprising the printed circuit board assembly.
Further particular and preferred aspects are set out in the accompanying independent and dependent claims Features of the dependent claims may be combined with features of the independent claims as appropriate, and in combinations other than those explicitly set out in the claims.
Where an apparatus feature is described as being operable to provide a function, it will be appreciated that this includes an apparatus feature which provides that function or which is adapted or configured to provide or perform that function.
Embodiments will now be described further, with reference to the accompanying drawings, in which:
Before discussing the embodiments in any more detail, first an overview will be provided. In one embodiment, there is provided an assembly or structure. The assembly may be for an antenna or a component thereof. The assembly may comprise a complete antenna device, with or without a mast and/or radio system. The assembly may comprise a printed circuit board assembly or structure. The printed circuit board structure may have a radiating element layer, strip or line. The printed circuit board structure may have a choke structure. The choke structure may have a centrally-located conductor. The choke structure may have a shielding structure. The central-located conductor may be provided by at least a portion of the radiating element layer. Hence, an embodiment provides an arrangement which utilises printed circuit board (PCB) components to produce components of an antenna assembly. In particular, printed circuit board insulating or dielectric layers are provided onto which conductive layers are formed and shaped to provide a radiating element which has a co-located radio frequency (RF) choke. The choke is incorporated together with the radiating element to reduce undesired perturbation. Typically, a shielding structure of each choke is formed in layers surrounding the radiating element. More than one choke structure may be provided on each radiating element. This provides for enhanced reduction of perturbation at a desired frequency through the provision of multiple chokes each operating at that frequency. Alternatively or additionally, this provides for enhanced perturbation at different frequencies through the provision of chokes operating at each of these different frequencies. The choke structures may be provided in series along the length of the radiating element. Each choke structure may utilise a different portion of the radiating element as its central conductor. Multiple chokes may also be provided within each choke structure. For example, a single choke structure may have different length shielding structures formed from conductors provided in the same conductive layer. Alternatively or additionally, multiple chokes can be incorporated in the same choke structure by stacking or nesting the chokes on top of each other, formed from multiple PCB layers.
PCB Choke Structure—General Arrangement
Dipole Antennas
Choke—1st Arrangement
The radiating element layer 120 has leg portions 120A and arm portions 120B which form a folded half-wave dipole. The radiating element layer 120 has a portion 120C which is contained within the choke structure 130A. The radiation element layer portion 120C has bent arms 120D which extend away initially from the portion 120C and then run parallel to the portion 120C. The conductive layers 160, 170 are dimensioned to encompass the area defined by the portion 120C and the bent arms 120D. Conductive vias 180 extend from the conductive layer 160 through the dielectric layer 140, the radiating element layer 120, the dielectric layer 150 to the conductive layer 170. The vias 180 electrically couple the conductive layer 160 with the radiating element layer 120 and the conductive layer 170.
The length L of the choke 130A is set to provide an effective electrical length equivalent to a quarter wavelength of a frequency to be blocked (based on the permittivity of the dielectric layers 140, 150). It will be appreciated that although the length L is the major length contributing to the effective electrical length, the complete length of the bent arms 120D (including the length Lx of the part of the bent arms 120D running at away from the portion 120C) contributes to the effective electrical length. The arrangement of the vias 180 at a first end 135A of the choke 130A where the bent arms 120D galvanically connect to the radiating element portion 120 provides for an effective RF short circuit at that end of the choke 130A. A second end 135B of the choke 130A provides for an effective RF open circuit.
Choke—2nd Arrangement
In another example, the radiating element 120 is formed on a first single-sided PCB to keep the cost down and two separate much smaller PCBs are added having the first and second stacked choke PCBs adhered to the first PCB at intervals along its length. The same or similar arrangement could be used as in
Combined Choke—Stacked
While
In the example shown in
The effective electrical length of each choke can be varied mainly by changing the length L (although the length Lx also provides a contribution) and/or by changing the permittivity of the dielectric layers which form the choke 130A, 130B. Hence, it is possible to provide multiple chokes 130A, 130B operating at the same frequency in order to more effectively reduce perturbations within that frequency and/or to provide chokes 130A, 130B operable at different frequencies in order to provide a reduction in perturbation across a range of frequencies by varying their length L (although the length Lx also provides a contribution) or the permittivity of the dielectric layers.
Combined Choke—Multiple Arms
An embodiment provides a technique to implement chokes in full printed circuit board (PCB) technology, which has many advantages over metal sheet or metallized plastic technologies. The coaxial line of the choke is created by a stack-up of several metallised layers and dielectric layers as shown in
In a first implementation shown in
In this first implementation, the dipole with the chokes is directly obtained from PCB manufacturing, with all the advantages inherent to this technology and associated processes (high precision, complex shapes easy to do due to printing technology). A drawback is that multilayer PCB technology is not low cost, but it may be acceptable if high-precision positioning is required, for example in the case of very high frequencies.
In a second implementation shown in
The first advantage of using PCB technology is process stability and precision compared to conventional methods to realize chokes on radiating elements, like mechanical crimping, screwing or welding or rivet assembly processes.
The length of the choke is approximately a quarter of a wavelength in the coaxial line for the high-band frequency to be trapped. As the choke is filled with the PCB dielectric, its physical length is shorter, and a higher number of chokes can be positioned along the low-band element. The result is a better efficiency for high-band filtering.
The PCB technology also allows the manufacture of very complex shapes due to a printing process. For example, a corrugated choke such as that illustrated in
The chokes using PCB technology as described can be used for the radiating arms of dipoles or monopoles, but also on the balun legs parts if required, as well as for eventual parasitic or matching elements located over the dipoles or monopoles.
A person of skill in the art would readily recognize that steps of various above-described methods can be performed by programmed computers. Herein, some embodiments are also intended to cover program storage devices, e.g., digital data storage media, which are machine or computer readable and encode machine-executable or computer-executable programs of instructions, wherein said instructions perform some or all of the steps of said above-described methods. The program storage devices may be, e.g., digital memories, magnetic storage media such as a magnetic disks and magnetic tapes, hard drives, or optically readable digital data storage media. The embodiments are also intended to cover computers programmed to perform said steps of the above-described methods.
The functions of the various elements shown in the Figures, including any functional blocks labelled as “processors” or “logic”, may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term “processor” or “controller” or “logic” should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor (DSP) hardware, network processor, application specific integrated circuit (ASIC), field programmable gate array (FPGA), read only memory (ROM) for storing software, random access memory (RAM), and non-volatile storage. Other hardware, conventional and/or custom, may also be included. Similarly, any switches shown in the Figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the implementer as more specifically understood from the context.
It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative circuitry embodying the principles of the invention. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudo code, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.
The description and drawings merely illustrate the principles of the invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples recited herein are principally intended expressly to be only for pedagogical purposes to aid the reader in understanding the principles of the invention and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.
Number | Date | Country | Kind |
---|---|---|---|
18305242 | Mar 2018 | EP | regional |
Filing Document | Filing Date | Country | Kind |
---|---|---|---|
PCT/CN2019/077222 | 3/6/2019 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2019/170112 | 9/12/2019 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
4746925 | Toriyama | May 1988 | A |
6377227 | Zhu et al. | Apr 2002 | B1 |
6987483 | Tran | Jan 2006 | B2 |
20020139993 | Aoki et al. | Oct 2002 | A1 |
20070097008 | Chen | May 2007 | A1 |
20080158083 | Apostolos | Jul 2008 | A1 |
20090002251 | Pintos et al. | Jan 2009 | A1 |
20090195459 | Chua | Aug 2009 | A1 |
20150214617 | Shang et al. | Jul 2015 | A1 |
20160301129 | Ying | Oct 2016 | A1 |
20160365645 | Bisiules | Dec 2016 | A1 |
20170294704 | Sun | Oct 2017 | A1 |
20170310009 | Isik | Oct 2017 | A1 |
Number | Date | Country |
---|---|---|
2515811 | Oct 2002 | CN |
201048157 | Apr 2008 | CN |
104067527 | Sep 2014 | CN |
203826551 | Sep 2014 | CN |
107078390 | Aug 2017 | CN |
107275804 | Oct 2017 | CN |
107743665 | Feb 2018 | CN |
2159875 | Mar 2010 | EP |
2835864 | Feb 2015 | EP |
2007-243375 | Sep 2007 | JP |
2015122700 | Jul 2015 | JP |
Entry |
---|
Fan Fan He et al., “Suppression of Second and Third Harmonies Using λ/4 Low-Impedance Substrate Integrated Waveguide Bias Line in Power Amplifier”, IEEE Microwave and Wireless Components Letters, vol. 18, No. 7, Jul. 2008, pp. 479-481. |
Written Opinion of the International Searching Authority for PCT Application No. PCT/CN2019/077222, dated May 29, 2019, 3 pages. |
Extended European Search Report for EP Application No. 18305242.2, dated Aug. 6, 2018, 11 pages. |
English Bibliography of Chinese Application No. CN201048157Y, Published on Apr. 16, 2008, Printed from Derwent Innovation on Nov. 18, 2020, 6 pages. |
English Bibliography of Japanese Application No. JP2015122700A, Published on Jul. 2, 2015, Printed from Derwent Innovation of Nov. 18, 2020, 6 pages. |
English Bibliography of Chinese Application No. CN104067527A, Published on Sep. 24, 2014, Printed from Derwent Innovation on Mar. 10, 2021, 7 pages. |
English Bibliography of Chinese Application No. CN107078390A, Published on Aug. 18, 2017, Printed from Derwent Innovation on Mar. 10, 2021, 7 pages. |
English Bibliography of Chinese Application No. CN107275804A, Published on Oct. 20, 2017, Printed from Derwent Innovation on Mar. 10, 2021, 6 pages. |
English Bibliography of Chinese Application No. CN107743665A, Published on Feb. 27, 2018, Printed from Derwent Innovation on Mar. 10, 2021, 6 pages. |
English Bibliography of Japanese Application No. JP2007243375A, Published on Sep. 20, 2007, Printed from Derwent Innovation of Mar. 10, 2021, 5 pages. |
International Search Report for PCT/CN2019/077222 dated May 29, 2019. |
Number | Date | Country | |
---|---|---|---|
20210091454 A1 | Mar 2021 | US |