Patent Application
20220209402
The present disclosure relates to an antenna manufacturing method and an antenna device.
In order to perform wireless communication in a wide angle even when radio waves are extremely weak, an array antenna device is demanded to have a high gain and a low axial ratio when performing beam scanning in a wide angle direction. The wide angle direction indicates a direction of a zenith angle ±60 degrees or more when the antenna is disposed horizontally with respect to the ground. The amplitude difference between a vertically polarized wave and a horizontally polarized wave in the wide angle direction is a factor tor causing the degradation of the axial ratio when beam scanning is performed in the wide angle direction.
For example, Patent Literature 1 discloses an antenna used as an antenna element of an array antenna. The antenna includes a first dielectric substrate, a second dielectric substrate, and a cylindrical member. The first dielectric substrate has a circular feed conductor on its front side, and a ground conductor on its back side. The second dielectric substrate has a back side facing the front side of the first dielectric substrate, and has a circular parasitic conductor formed on its front side. The cylindrical member is provided around a space defined by bonding a peripheral edge of the parasitic conductor and a peripheral edge of the feed conductor, and is made of dielectric material or conductive material.
In the antenna disclosed in Patent Literature 1, the space defined by bonding the peripheral edge of the parasitic conductor and the peripheral edge of the feed conductor by the cylindrical member is hollow, so that the equivalent dielectric constant of the dielectric substrates decreases. In addition, the amplitude difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction varies with a variation in the equivalent dielectric constant of the dielectric substrates. The antenna disclosed in Patent Literature 1 can adjust the amplitude difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction by varying the equivalent dielectric constant of the dielectric substrates by the hollow structure.
Patent Literature 1: JP 2000-138525 A
A conventional antenna represented by Patent Literature 1 is produced by performing hot pressing in a state where a plurality of dielectric substrates overlap each other. For example, hot pressing is performed in a state where the cylindrical member is provided on a substrate formed of a thermosetting dielectric material, and the first dielectric substrate and the second dielectric substrate are disposed so as to sandwich the substrate from both sides.
During hot pressing, the heated and melted dielectric material of the substrate flows through a gap between the first dielectric substrate and the second dielectric substrate, the gap is filled with this material, and it is cured in the gap. At this time, the periphery of the cylindrical member is filled with the dielectric material, but the space surrounded by the cylindrical member has no filling material and a portion corresponding to the opening of the cylindrical member is not supported by the filling material, and thus, a hollow structure is formed.
For this reason, there is a possibility that a portion of the first dielectric substrate or the second dielectric substrate corresponding to the opening of the cylindrical member is recessed and deformed by a stress generated inside the dielectric substrates by the hot pressing, and there is a problem that desired characteristics cannot be obtained with the antenna deformed as described above.
The present disclosure addresses the above problems, and an object thereof is to obtain an antenna manufacturing method and an antenna device capable of preventing deformation of an antenna.
An antenna manufacturing method according to the present disclosure is a method for manufacturing an antenna device including: a first dielectric substrate provided with a first conductor ground plane; a second dielectric substrate provided with a second conductor ground plane on a first side and a third conductor ground plane on a second side opposite to the first side; and a third dielectric substrate provided with a fourth conductor ground plane. This antenna manufacturing method includes: forming a through hole in the second dielectric substrate, the through hole penetrating from the second conductor ground plane to the third conductor ground plane; forming a patch antenna on the first conductor ground plane at a position to be faced by the through hole when the first dielectric substrate is bonded to the second dielectric substrate; and in a state in which the through hole and the patch antenna are arranged to face each other, bonding the first conductor ground plane of the first dielectric substrate and the second conductor ground plane of the second dielectric substrate by a first solder, and bonding the third conductor ground plane of the second dielectric substrate and the fourth conductor ground plane of the third dielectric substrate by a second solder.
According to the present disclosure, the first conductor ground plane provided on the first dielectric substrate and provided with the patch antenna and the second conductor ground plane provided on the first side of the second dielectric substrate having the through hole are bonded by the first solder in a state where the through hole and the patch antenna are arranged to face each other, and the third conductor ground plane provided on the second side of the second dielectric substrate and the fourth conductor ground plane provided on the third dielectric substrate are bonded by the second solder. Since the dielectric substrates are bonded using solder, a stress generated inside the dielectric substrates can be minimized as compared with bonding by hot pressing, so that deformation of the antenna can be prevented.
The dielectric substrate 1 is a first dielectric substrate having the conductor ground plane 2. The conductor ground plane 2 is a first conductor ground plane provided on the entire back side of the dielectric substrate 1, and is provided with the patch antenna 11. The patch antenna 11 is a first patch antenna formed in a circular shape, and is formed on the conductor ground plane 2 by providing a conductor removed portion 2a in the conductor ground plane 2 as illustrated in
The conductor removed portion 2a is a portion formed by removing the conductor from the conductor ground plane 2 along the outer shape of the patch antenna 11. When the patch antenna 11 has a circular shape, the conductor removed portion 2a is an annular portion formed by removing the conductor from the conductor ground plane 2 as illustrated in
The dielectric substrate 5 is a second dielectric substrate including the conductor ground plane 4 and the conductor ground plane 6. The conductor ground plane 4 is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 5, and the conductor ground plane 6 is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 5.
The dielectric substrate 5 has a through hole 5a penetrating from the conductor ground plane 4 to the conductor ground plane 6. The conductor ground plane 2 of the dielectric substrate 1 and the conductor ground plane 4 of the dielectric substrate 5 are bonded by the solder 3 in a state where the through hole 5a and the patch antenna 11 are arranged to face each other. The solder 3 is a first solder for bonding the conductor ground planes, and is, for example, cream solder.
The through hole 5a penetrates the dielectric substrate 5 from the conductor ground plane 4 to the conductor ground plane 6. Therefore, as illustrated in
The dielectric substrate 9 is a third dielectric substrate having the conductor ground plane 8. The conductor ground plane 8 is a fourth conductor ground plane provided on the entire front side of the dielectric substrate 9. The conductor ground plane 6 of the dielectric substrate 5 and the conductor ground plane 8 of the dielectric substrate 9 are bonded by the solder 7. The solder 7 is a second solder for bonding the conductor ground planes, and is, for example, cream solder. The solder 7 is not applied to the through hole 5a and a region 7a facing the opening 6a, but applied to a portion other than the region 7a in the conductor ground plane 6 or the conductor ground plane 8.
The hollow structure 10 is constituted by the patch antenna 11, the conductor removed portion 2a, the region 3a, the opening 4a, the through hole 5a, the opening 6a, the region 7a, and the conductor ground plane 8. The size of the hollow structure 10 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Next, an antenna manufacturing method according to the first embodiment will be described.
First, the through hole 5a is formed in the dielectric substrate 5 (step ST1). The through hole 5a is formed to penetrate the dielectric substrate 5 from the conductor ground plane 4 to the conductor ground plane 6. The through hole 5a can be formed by, for example, machining by a drill, a punch press machine, or a laser.
The patch antenna 11 is formed on the conductor ground plane 2 of the dielectric substrate 1 (step ST2). The patch antenna 11 is formed on the conductor ground plane 2 at a position to be faced by the through hole 5a when the dielectric substrate 1 is bonded to the dielectric substrate 5. For example, the patch antenna 11 to be formed is set on the conductor ground plane 2, and the conductor removed portion 2a is formed by removing the conductor from the conductor ground plane 2 along the outer shape of the patch antenna 11. The conductor is removed from the conductor ground plane 2 by copper foil punching such as etching.
The conductor ground plane 2 of the dielectric substrate 1 and the conductor ground plane 4 of the dielectric substrate 5 are bonded by the solder 3 in a state where the through hole 5a and the patch antenna 11 are arranged to face each other (step ST3). For example, the solder 3 is applied to a portion other than the region 3a in the conductor ground plane 2 or the conductor ground plane 4. A structure in which the solder 3 is applied between the conductor ground plane 2 and the conductor ground plane 4 is passed through a reflow furnace so that the solder 3 is melted. Thus, the conductor ground plane 2 and the conductor ground plane 4 are bonded to each other.
The conductor ground plane 6 of the dielectric substrate 5 and the conductor ground plane 8 of the dielectric substrate 9 are bonded by the solder 7 so that the hollow structure 10 is formed between the dielectric substrate 1 and the dielectric substrate 9 by the through hole 5a (step ST4). For example, the solder 7 is applied to a portion other than the region 7a in the conductor ground plane 6 or the conductor ground plane 8. A structure in which the solder 7 is applied between the conductor ground plane 6 and the conductor ground plane 8 is passed through a reflow furnace so that the solder 7 is melted. Thus, the conductor ground plane 6 and the conductor ground plane 8 are bonded to each other.
Note that the order of the processes of steps ST3 and ST4 may be reversed, or these processes may be performed simultaneously. For example, a structure in which the solder 3 is applied between the conductor ground plane 2 and the conductor ground plane 4 and the solder 7 is applied between the conductor ground plane 6 and the conductor ground plane 8 may be passed through a reflow furnace so that the solder 3 and the solder 7 are melted, whereby the conductor ground plane 2 and the conductor ground plane 4, and the conductor ground plane 6 and the conductor ground plane 8 may be simultaneously bonded.
In the antenna device according to the first embodiment, a substrate with an equivalently low dielectric constant can be achieved by providing the hollow structure 10 between the patch antenna 11 and the conductor ground plane 8. Accordingly, the antenna device according to the first embodiment has improved radiation efficiency and improved gain when beam scanning is performed in the wide angle direction, as compared with a typical patch antenna that does not have a hollow structure.
Furthermore, the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction in the antenna device according to the first embodiment can be improved by appropriately designing the size of the hollow structure 10. For example, in order to suppress a decrease in the axial ratio when the antenna device according to the first embodiment performs beam scanning in the wide angle direction, the size of the hollow structure 10 may be designed so that the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction decreases.
Although the dielectric substrate 1 in which the conductor ground plane 2 is provided on the back side has been described above, the conductor ground plane 2 may be provided on both the front side and the back side of the dielectric substrate 1. In this case, the patch antenna 11 may be provided only on the conductor ground plane 2 on the back side of the dielectric substrate 1, or may be provided only on the conductor ground plane 2 on the front side of the dielectric substrate 1. Although the configuration in which there is no via in all the layers of the dielectric substrate 1, the dielectric substrate 5, and the dielectric substrate 9 has been described above, all or any of these substrates may have a via.
As described above, in the antenna manufacturing method according to the first embodiment, the conductor ground plane 2 provided on the dielectric substrate 1 and provided with the patch antenna 11 and the conductor ground plane 4 provided on the side of the dielectric substrate 5 having the through hole 5a are bonded by the solder 3 in a state where the through hole 5a and the patch antenna 11 are arranged to face each other, and the conductor ground plane 6 provided on the back side of the dielectric substrate 5 and the conductor ground plane 8 provided on the dielectric substrate 9 are bonded by the solder 7. Therefore, in the antenna manufacturing method according to the first embodiment, a stress generated inside the dielectric substrate can be minimized as compared with bonding by hot pressing, so that deformation of the antenna can be prevented.
The dielectric substrate 21 is a first dielectric substrate having the conductor ground plane 22. The conductor ground plane 22 is a first conductor ground plane provided on the entire back side of the dielectric substrate 21, and is provided with the patch antenna 32. The patch antenna 32 is a first patch antenna formed in a circular shape, and is formed on the conductor ground plane 22 by providing a conductor removed portion 22a in the conductor ground plane 22 as illustrated in
The conductor removed portion 22a is a portion formed by removing the conductor from the conductor ground plane 22 along the outer shape of the patch antenna 32. When the patch antenna 32 has a circular shape, the conductor removed portion 22a is an annular portion formed by removing the conductor from the conductor ground plane 22 as illustrated in
The dielectric substrate 26 is a second dielectric substrate including the conductor ground plane 25 and the conductor ground plane 27. The conductor ground plane 25 is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 26, and the conductor ground plane 27 is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 26. The dielectric substrate 26 has a through hole 26a penetrating from the conductor ground plane 25 to the conductor ground plane 27.
The dielectric substrate 26 in which the through hole 26a is formed is subjected to conductor plating processing. By the conductor plating processing, conductor plating 24a is provided on an upper layer of the conductor ground plane 25, conductor plating 26b is provided on the side wall of the through hole 26a, and conductor plating 24c is provided on an upper layer of the conductor ground plane 27 as illustrated in
The conductor ground plane 22 of the dielectric substrate 21 and the conductor ground plane 25 of the dielectric substrate 26 are bonded by the solder 23 via the conductor plating 24a in a state where the through hole 26a and the patch antenna 32 are arranged to face each other. For example, the dielectric substrate 21 and the dielectric substrate 26 are bonded with the patch antenna 32 facing the through hole 26a as illustrated in
The through hole 26a penetrates the dielectric substrate 26 from the conductor ground plane 25 to the conductor ground plane 27. Therefore, as illustrated in
The dielectric substrate 30 is a third dielectric substrate having the conductor ground plane 29. The conductor ground plane 29 is a fourth conductor ground plane provided on the entire side of the dielectric substrate 30. The conductor ground plane 27 of the dielectric substrate 26 and the conductor ground plane 29 of the dielectric substrate 30 are bonded by the solder 28 via the conductor plating 24c. The through hole 26a penetrates the dielectric substrate 26 from the conductor ground plane 25 to the conductor ground plane 27. Therefore, as illustrated in
The solder 28 is a second solder for bonding the conductor ground planes. The solder 28 is not applied to a region 28a facing the through hole 26a and the opening 27a, but applied to a portion other than the region 28a in the conductor ground plane 27 or the conductor ground plane 29.
The hollow structure 31 is constituted by the patch antenna 32, the conductor removed portion 22a, the region 23a, the opening 24b, the opening 25a, the through hole 26a, the opening 27a, the opening 24d, the region 28a, and the conductor ground plane 29. The size of the hollow structure 31 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Next, an antenna manufacturing method according to the second embodiment will be described.
The dielectric substrate 26 in which the through hole 26a is formed is subjected to conductor plating processing (step ST2a). As the conductor plating processing, a sputtering method or electrolytic plating can be used, for example. By performing the conductor plating processing on the dielectric substrate 26, the conductor plating 24a is provided on the conductor ground plane 25, the conductor plating 26b is provided on the side wall of the through hole 26a, and the conductor plating 24c is provided on the conductor ground plane 27.
Next, the patch antenna 32 is formed on the conductor ground plane 22 of the dielectric substrate 21 (step ST3a). The patch antenna 32 is formed on the conductor ground plane 22 at a position to be faced by the through hole 26a when the dielectric substrate 21 is bonded to the dielectric substrate 26. For example, the patch antenna 32 to be formed is set on the conductor ground plane 22, and the conductor removed portion 22a is formed by removing the conductor from the conductor ground plane 22 along the outer shape of the patch antenna 32. The conductor is removed from the conductor ground plane 22 by copper foil punching such as etching.
The conductor ground plane 22 of the dielectric substrate 21 and the conductor ground plane 25 of the dielectric substrate 26 are bonded by the solder 23 via the conductor plating 24a in a state where the through hole 26a and the patch antenna 32 are arranged to face each other (step ST4a). For example, the solder 23 is applied to a portion other than the region 23a in the conductor ground plane 22. A structure in which the solder 23 is applied between the conductor ground plane 22 and the conductor ground plane 25 is passed through a reflow furnace so that the solder 23 is melted. Thus, the conductor ground plane 22 and the conductor ground plane 25 are bonded to each other.
The conductor ground plane 27 of the dielectric substrate 26 and the conductor ground plane 29 of the dielectric substrate 30 are bonded by the solder 28 via the conductor plating 24c so that the hollow structure 31 is formed between the dielectric substrate 21 and the dielectric substrate 30 by the through hole 26a (step ST5a). For example, the solder 28 is applied to a portion other than the region 28a in the conductor ground plane 27. A structure in which the solder 28 is applied between the conductor ground plane 27 and the conductor ground plane 29 is passed through a reflow furnace so that the solder 28 is melted. Thus, the conductor ground plane 27 and the conductor ground plane 29 are bonded to each other.
Note that the order of the processes of steps ST4a and ST5a may be reversed, or these processes may be performed simultaneously. For example, a structure in which the solder 23 is applied between the conductor ground plane 22 and the conductor ground plane 25 and the solder 28 is applied between the conductor ground plane 27 and the conductor ground plane 29 may be passed through a reflow furnace so that the solder 23 and the solder 28 are melted, whereby the conductor ground plane 22 and the conductor ground plane 25, and the conductor ground plane 27 and the conductor ground plane 29 may be simultaneously bonded.
In the antenna device according to the second embodiment, a substrate with an equivalently low dielectric constant can be achieved by providing the hollow structure 31 between the patch antenna 32 and the conductor ground plane 29. In addition, since the conductor plating 26b is provided on the side wall of the hollow structure 31, it is possible to suppress a side wave inside the substrate that causes a decrease in gain when beam scanning is performed in the wide angle direction.
Furthermore, the gain difference between a vertically polarized wave and a horizontally polarized wave in the wide angle direction in the antenna device according to the second embodiment can be improved by appropriately designing the size of the hollow structure 31. For example, in order to suppress a decrease in the axial ratio when the antenna device according to the second embodiment performs beam scanning in the wide angle direction, the size of the hollow structure 31 may be designed so that the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction decreases.
Although the dielectric substrate 21 in which the conductor ground plane 22 is provided on the back side has been described above, the conductor ground plane 22 may be provided on both the front side and the back side of the dielectric substrate 21. In this case, the patch antenna 32 may be provided only on the conductor ground plane 22 on the back side of the dielectric substrate 21, or may be provided only on the conductor ground plane 22 on the front side of the dielectric substrate 21. Although the configuration in which there is no via in all the layers of the dielectric substrate 21, the dielectric substrate 26, and the dielectric substrate 30 has been described above, all or any of these substrates may have a via.
As described above, in the antenna manufacturing method according to the second embodiment, the conductor plating processing is performed on the side wall of the through hole 26a. Due to the conductor plating 26b provided on the side wall of the hollow structure 31, it is possible to suppress a surface wave inside the substrate that causes a decrease in gain when beam scanning is performed in the wide angle direction. Furthermore, the antenna device according to the second embodiment has improved radiation efficiency and improved gain when beam scanning is performed in the wide angle direction, as compared with a typical patch antenna that does not have a hollow structure.
The dielectric substrate 41 is a first dielectric substrate having the conductor ground plane 42. The conductor ground plane 42 is a first conductor ground plane provided on the entire back side of the dielectric substrate 41, and is provided with the patch antenna 49. The patch antenna 49 is a first patch antenna formed in a circular shape, and is formed in the conductor ground plane 42 by providing a conductor removed portion 42a in the conductor ground plane 42 as illustrated in
The conductor removed portion 42a is a portion formed by removing the conductor from the conductor ground plane 42 along the outer shape of the patch antenna 49. When the patch antenna 49 has a circular shape, the conductor removed portion 42a is an annular portion formed by removing the conductor from the conductor ground plane 42 as illustrated in
The conductor plate 44 is a first conductor plate having a through hole 44a. The conductor ground plane 42 of the dielectric substrate 41 and the conductor plate 44 are bonded by the solder 43 in a state where the through hole 44a and the patch antenna 49 are arranged to face each other. For example, the dielectric substrate 41 and the conductor plate 44 are bonded with the patch antenna 49 facing the through hole 44a as illustrated in
The solder 43 is a first solder for bonding the conductor ground plane and the conductor plate. The solder 43 is not applied to a region 43a facing the patch antenna 49 and the conductor removed portion 42a, but applied to a portion other than the region 43a in the conductor ground plane 42 or the conductor plate 44.
The dielectric substrate 47 is a second dielectric substrate having the conductor ground plane 46. The conductor ground plane 46 is a second conductor ground plane provided on the entire side of the dielectric substrate 47. The conductor ground plane 46 of the dielectric substrate 47 and the conductor plate 44 are bonded by the solder 45. The solder 45 is a second solder for bonding the conductor plate and the conductor ground plane. The solder 45 is not applied to a region 45a facing the through hole 44a, but applied to a portion other than the region 45a in the conductor plate 44 or the conductor ground plane 46.
As illustrated in
Next, an antenna manufacturing method according to the third embodiment will be described.
The through hole 44a is formed in the conductor plate 44 (step ST1b). The through hole 44a can be formed by, for example, machining by a drill, a punch press machine, or a laser.
The patch antenna 49 is formed on the conductor ground plane 42 of the dielectric substrate 41 (step ST2b). The patch antenna 49 is formed on the conductor ground plane 42 at a position to be faced by the through hole 44a when the dielectric substrate 41 is bonded to the conductor plate 44. For example, the patch antenna 49 to be formed is set on the conductor ground plane 42, and the conductor removed portion 42a is formed by removing the conductor from the conductor ground plane 42 along the outer shape of the patch antenna 49. The conductor is removed from the conductor ground plane 42 by copper foil punching such as etching.
The conductor ground plane 42 of the dielectric substrate 41 and the conductor plate 44 are bonded by the solder 43 in a state where the through hole 44a and the patch antenna 49 are arranged to face each other (step ST3b). For example, the solder 43 is applied to a portion other than the region 43a in the conductor ground plane 42. A structure in which the solder 43 is applied between the conductor ground plane 42 and the conductor plate 44 is passed through a reflow furnace so that the solder 43 is melted. Thus, the conductor ground plane 42 and the conductor plate 44 are bonded to each other.
The conductor plate 44 and the conductor ground plane 46 of the dielectric substrate 47 are bonded by the solder 45 so that the hollow structure 48 is formed between the dielectric substrate 41 and the dielectric substrate 47 by the through hole 44a (step ST4b). For example, the solder 45 is applied to a portion other than the region 45a in the conductor plate 44 or the conductor ground plane 46. A structure in which the solder 45 is applied between the conductor plate 44 and the conductor ground plane 46 is passed through a reflow furnace so that the solder 45 is melted. Thus, the conductor plate 44 and the conductor ground plane 46 are bonded to each other.
Note that the order of the processes of steps ST3b and ST4b may be reversed, or these processes may be performed simultaneously. For example, a structure in which the solder 43 is applied between the conductor ground plane 42 and the conductor plate 44 and the solder 45 is applied between the conductor plate 44 and the conductor ground plane 46 may be passed through a reflow furnace so that the solder 43 and the solder 45 are melted, whereby the conductor ground plane 42 and the conductor plate 44, and the conductor plate 44 and the conductor ground plane 46 may be simultaneously bonded.
In the antenna device according to the third embodiment, a substrate with an equivalently low dielectric constant can be achieved by providing the hollow structure 48 between the patch antenna 49 and the conductor ground plane 46. As a result, the antenna device according to the third embodiment has improved radiation efficiency and improved gain when beam scanning is performed in the wide angle direction, as compared with a typical patch antenna that does not have a hollow structure.
Furthermore, the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction in the antenna device according to the third embodiment can be improved by appropriately designing the size of the hollow structure 48. For example, in order to suppress a decrease in the axial ratio when the antenna device according to the third embodiment performs beam scanning in the wide angle direction, the size of the hollow structure 48 may be designed so that the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction decreases.
Although the dielectric substrate 41 in which the conductor ground plane 42 is provided on the back side has been described above, the conductor ground plane 42 may be provided on both the front side and the back side of the dielectric substrate 41. In this case, the patch antenna 49 may be provided only on the conductor ground plane 42 on the back side of the dielectric substrate 41, or may be provided only on the conductor ground plane 42 on the front side of the dielectric substrate 41. Although the configuration in which there is no via in all the layers of the dielectric substrate 41 and the dielectric substrate 47 has been described above, both or either of these substrates may have a via.
As described above, in the antenna manufacturing method according to the third embodiment, the conductor ground plane 42 of the dielectric substrate 41 and the conductor plate 44 are bonded by the solder 43 in a state where the through hole 44a and the patch antenna 49 are arranged to face each other, and the conductor plate 44 and the conductor ground plane 46 of the dielectric substrate 47 are bonded by the solder 45. With this configuration, the same effects as those of the first embodiment can be obtained. In addition, due to the side wall of the hollow structure 48 being a conductor side, it is possible to suppress a surface wave inside the substrate that causes a decrease in gain when beam scanning is performed in the wide angle direction. This improves the radiation efficiency, and improves a gain when beam scanning is performed in the wide angle direction, as compared to a typical patch antenna that does not have a hollow structure.
The dielectric substrate 201 is a first dielectric substrate having the conductor ground plane 202. The conductor ground plane 202 is a first conductor ground plane provided on the entire back side of the dielectric substrate 201, and is provided with the patch antenna 212. The patch antenna 212 is a first patch antenna formed in a circular shape. As illustrated in
The conductor removed portion 202a is a portion formed by removing the conductor from the conductor ground plane 202 along the outer shape of the patch antenna 212. When the patch antenna 212 has a circular shape, the conductor removed portion 202a is an annular portion formed by removing the conductor from the conductor ground plane 202 as illustrated in
The dielectric substrate 205 is a second dielectric substrate including the conductor ground plane 204 and the conductor ground plane 206. The conductor ground plane 204 is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 205, and the conductor ground plane 206 is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 205. The dielectric substrate 205 has a through hole 205a penetrating from the conductor ground plane 204 to the conductor ground plane 206.
The conductor ground plane 202 of the dielectric substrate 201 and the conductor ground plane 204 of the dielectric substrate 205 are bonded by the solder 203 in a state where the through hole 205a and the patch antenna 212 are arranged to face each other. For example, the dielectric substrate 201 and the dielectric substrate 205 are bonded with the patch antenna 212 facing the through hole 205a as illustrated in
The through hole 205a penetrates the dielectric substrate 205 from the conductor ground plane 204 to the conductor ground plane 206. Therefore, as illustrated in
The dielectric substrate 209 is a third dielectric substrate having the conductor ground plane 208. The conductor ground plane 208 is a fourth conductor ground plane provided on the entire side of the dielectric substrate 209. The conductor ground plane 206 of the dielectric substrate 205 and the conductor ground plane 208 of the dielectric substrate 209 are bonded by the solder 207.
In the fourth embodiment, bonding using the solder 203 and the solder 207 is performed on lands 210. As illustrated in
The positions of the lands 210 in the conductor ground plane 202 and in the conductor ground plane 204 face each other. The lands 210 can be disposed at any position in a region other than the opening 204a in the conductor ground plane 204, and an amount of the solder 203 applied to the lands 210 is also freely set. Similarly, the positions of the lands 210 in the conductor ground plane 206 and in the conductor ground plane 208 face each other. The lands 210 can be disposed at any position in a region other than the opening 206a in the conductor ground plane 206, and an amount of the solder 207 applied to the lands 210 is also freely set.
The hollow structure 211 is constituted by the patch antenna 212, the conductor removed portion 202a, the opening 204a, the through hole 205a, the opening 206a, and the conductor ground plane 208. The size of the hollow structure 211 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Next, an antenna manufacturing method according to the fourth embodiment will be described.
The antenna manufacturing method according to the fourth embodiment is basically the same as the series of processing illustrated in
In addition, in step ST4, the conductor ground plane 206 of the dielectric substrate 205 and the conductor ground plane 208 of the dielectric substrate 209 are bonded by the solder 207 on the lands 210 so that the hollow structure 211 is formed between the dielectric substrate 201 and the dielectric substrate 209 by the through hole 205a. A structure including the conductor ground plane 206 and the conductor ground plane 208 bonded by the solder 207 applied to the lands 210 is passed through a reflow furnace to melt the solder 207, whereby the conductor ground plane 206 and the conductor ground plane 208 are bonded.
Note that the order of the processes of steps ST3 and ST4 described above may be reversed, or these processes may be performed simultaneously. For example, a structure in which the solder 203 is applied to the lands 210 between the conductor ground plane 202 and the conductor ground plane 204 and the solder 207 is applied to the lands 210 between the conductor ground plane 206 and the conductor ground plane 208 may be passed through a reflow furnace so that the solder 203 and the solder 207 are melted, whereby the conductor ground plane 202 and the conductor ground plane 204, and the conductor ground plane 206 and the conductor ground plane 208 may be simultaneously bonded.
The case where the bonding using solder in the antenna manufacturing method according to the first embodiment is performed on the lands 210 has been described above. However, the bonding using solder in the antenna manufacturing method according to the second embodiment and the third embodiment may be performed on the lands 210.
In addition, although the dielectric substrate 201 in which the conductor ground plane 202 is provided on the back side has been described above, the conductor ground plane 202 may be provided on both the front side and the back side of the dielectric substrate 201. In this case, the patch antenna 212 may be provided only on the conductor ground plane 202 on the back side of the dielectric substrate 201, or may be provided only on the conductor ground plane 202 on the front side of the dielectric substrate 201. Although the configuration in which there is no via in all the layers of the dielectric substrate 201, the dielectric substrate 205, and the dielectric substrate 209 has been described above, all or any of these substrates may have a via.
As described above, in the antenna manufacturing method according to the fourth embodiment, the bonding using the solder 203 and the solder 207 is performed on the lands 210. Thus, bonding positions using the solder can be accurately determined. Furthermore, due to the hollow structure 211 being provided, the antenna device according to the fourth embodiment has improved radiation efficiency and improved gain when beam scanning is performed in the wide angle direction, as compared with a typical patch antenna that does not have a hollow structure.
The dielectric substrate 101 is a first dielectric substrate having the conductor ground plane 102. The conductor ground plane 102 is a first conductor ground plane provided on the entire back side of the dielectric substrate 101, and is provided with the patch antenna 109. The patch antenna 109 is a first patch antenna formed in a circular shape, and is formed on the conductor ground plane 102 by providing a conductor removed portion 102a in the conductor ground plane 102 as illustrated in
The conductor removed portion 102a is a portion formed by removing the conductor from the conductor ground plane 102 along the outer shape of the patch antenna 109. When the patch antenna 109 has a circular shape, the conductor removed portion 102a is an annular portion formed by removing the conductor from the conductor ground plane 102 as illustrated in
The dielectric substrate 104 is a second dielectric substrate provided with a plurality of through holes 104a having an opening area smaller than the area of the patch antenna 109. The dielectric substrate 107 is a third dielectric substrate having the conductor ground plane 106 formed on the side. The conductor ground plane 106 is a second conductor ground plane provided on the entire side of the dielectric substrate 107. It is possible to reduce the equivalent dielectric constant from the patch antenna 109 to the conductor ground plane 106 by increasing the number of the through holes 104a.
The prepreg 103 and the prepreg 105 are dielectric adhesives. The prepreg 103 is provided between the conductor ground plane 102 and the front side of the dielectric substrate 104, and the prepreg 105 is provided between the back side of the dielectric substrate 104 and the conductor ground plane 106. As illustrated in
The prepreg 103 bonds the conductor ground plane 102 and the side of dielectric substrate 104 by hot pressing, and the prepreg 105 bonds the back side of the dielectric substrate 104 and the conductor ground plane 106 by hot pressing. In the antenna manufacturing method according to the fifth embodiment, the dielectric substrates are bonded by hot pressing. Therefore, a thermoplastic resin film or a thermosetting resin film may be used instead of the prepreg 103 and the prepreg 105.
The hollow structure 108 is constituted by the patch antenna 109, the conductor removed portion 102a, the opening 103a, the plurality of through holes 104a, the opening 105a, and the conductor ground plane 106. Since the opening area of each of the plurality of through holes 104a is smaller than the area of the patch antenna 109, the deformation of the dielectric substrate 101 and the dielectric substrate 107 toward the hollow structure 108 is restricted by the portion other than the through holes 104a in the dielectric substrate 104. Thus, even if stress is generated inside the dielectric substrates by hot pressing, deformation of the dielectric substrates toward the hollow structure 108 is suppressed. The number of the through holes 104a is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Next, an antenna manufacturing method according to the fifth embodiment will be described.
The patch antenna 109 is formed on the conductor ground plane 102 of the dielectric substrate 101 (step ST2c). The patch antenna 109 is formed on the conductor ground plane 102 at a position to be faced by the through holes 104a when the dielectric substrate 101 is bonded to the dielectric substrate 104. For example, the patch antenna 109 to be formed is set on the conductor ground plane 102, and the conductor removed portion 102a is formed by removing the conductor from the conductor ground plane 102 along the outer shape of the patch antenna 109. The conductor is removed from the conductor ground plane 102 by copper foil punching such as etching.
In a state where the positions of the plurality of through holes 104a and the patch antenna 109 face each other, the prepreg 103 is disposed between the conductor ground plane 102 of the dielectric substrate 101 and the front side of the dielectric substrate 104, and the prepreg 105 is disposed between the back side of the dielectric substrate 104 and the conductor ground plane 106 of the dielectric substrate 107. Then, the dielectric substrates are bonded by hot pressing (step ST3c). The prepreg 103 softened by heating is pressed to bond the conductor ground plane 102 and the front side of the dielectric substrate 104, and the prepreg 105 softened by heating is pressed to bond the back side of the dielectric substrate 104 and the conductor ground plane 106.
In the antenna device according to the fifth embodiment, a substrate with an equivalently low dielectric constant can be achieved by providing the hollow structure 108 between the patch antenna 109 and the conductor ground plane 106. As a result, the antenna device according to the fifth embodiment has improved radiation efficiency and improved gain when beam scanning is performed in the wide angle direction, as compared with a typical patch antenna that does not have a hollow structure.
Furthermore, the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction in the antenna device according to the fifth embodiment can be improved by appropriately designing the size of the hollow structure 108. For example, in order to suppress a decrease in the axial ratio when the antenna device according to the fifth embodiment performs beam scanning in the wide angle direction, the size of the hollow structure 108 may be designed so that the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction decreases.
Although the dielectric substrate 101 in which the conductor ground plane 102 is provided on the back side has been described above, the conductor ground plane 102 may be provided on both the front side and the back side of the dielectric substrate 101. In this case, the patch antenna 109 may be provided only on the conductor ground plane 102 on the back side of the dielectric substrate 101, or may be provided only on the conductor ground plane 102 on the front side of the dielectric substrate 101. Although the configuration in which there is no via in all the layers of the dielectric substrate 101, the dielectric substrate 104, and the dielectric substrate 107 has been described above, all or any of these substrates may have a via.
As described above, in the antenna manufacturing method according to the fifth embodiment, the dielectric substrate 101, the dielectric substrate 104, and the dielectric substrate 107 are bonded by hot pressing in a state where the positions of the plurality of through holes 104a and the patch antenna 109 face each other. Since the opening area of each of the plurality of through holes 104a is smaller than the area of the patch antenna 109, the deformation of the dielectric substrate 101 and the dielectric substrate 107 toward the hollow structure 108 is restricted by the portion other than the through holes 104a in the dielectric substrate 104. Furthermore, the equivalent dielectric constant from the patch antenna 109 to the conductor ground plane 106 can be reduced by increasing the number of through holes 104a. Therefore, compared with a typical patch antenna without the hollow structure 108, the radiation efficiency is improved, and the gain when beam scanning is performed in the wide angle direction is improved.
The dielectric substrate 221 is a first dielectric substrate having the conductor ground plane 222. The conductor ground plane 222 is a first conductor ground plane provided on the entire back side of the dielectric substrate 221, and is provided with a patch antenna 229. The patch antenna 229 is a first patch antenna formed in a circular shape, and is formed on the conductor ground plane 222 by providing a conductor removed portion 222a in the conductor ground plane 222 as illustrated in
The conductor removed portion 222a is a portion formed by removing the conductor from the conductor ground plane 222 along the outer shape of the patch antenna 229. When the patch antenna 229 has a circular shape, the conductor removed portion 222a is an annular portion formed by removing the conductor from the conductor ground plane 222 as illustrated in
The dielectric substrate 224 is a second dielectric substrate provided with a through hole 224a having an opening area smaller than the area of the patch antenna 229. The dielectric substrate 227 is a third dielectric substrate having the conductor ground plane 226 formed on the side. The conductor ground plane 226 is a second conductor ground plane provided on the entire side of the dielectric substrate 227. The through hole 224a is a hole having a groove shape along the outer shape of the patch antenna 229 when the patch antenna 229 is projected from the conductor ground plane 222 onto the dielectric substrate 224. In the dielectric substrate 224, a portion inside the through hole 224a is bonded to the dielectric substrate 224 by a support portion 224b. It is possible to reduce the equivalent dielectric constant from the patch antenna 229 to the conductor ground plane 226 by appropriately designing the size of the through hole 224a.
The prepreg 223 and the prepreg 225 are dielectric adhesives. The prepreg 223 is provided between the conductor ground plane 222 and the front side of the dielectric substrate 224, and the prepreg 225 is provided between the back side of the dielectric substrate 224 and the conductor ground plane 226. As illustrated in
The prepreg 223 bonds the conductor ground plane 222 and the side of the dielectric substrate 224 by hot pressing, and the prepreg 225 bonds the back side of the dielectric substrate 224 and the conductor ground plane 226 by hot pressing. In the antenna manufacturing method according to the sixth embodiment, the dielectric substrates are bonded by hot pressing. Therefore, a thermoplastic resin film or a thermosetting resin film may be used instead of the prepreg 223 and the prepreg 225.
The hollow structure 228 is constituted by the patch antenna 229, the conductor removed portion 222a, the opening 223a, the through hole 224a, the opening 225a, and the conductor ground plane 226. The opening area of the through hole 224a is smaller than the area of the patch antenna 229. Thus, even if stress is generated inside the dielectric substrates by hot pressing, deformation of the dielectric substrates toward the hollow structure 228 is suppressed. The size of the through hole 224a is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
The antenna manufacturing method according to the sixth embodiment is basically the same as the series of processing described with reference to
In the antenna device according to the sixth embodiment, a substrate with an equivalently low dielectric constant can be achieved by providing the hollow structure 228 between the patch antenna 229 and the conductor ground plane 226. As a result, the antenna device according to the sixth embodiment has improved radiation efficiency and improved gain when beam scanning is performed in the wide angle direction, as compared with a typical patch antenna that does not have a hollow structure.
Furthermore, the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction in the antenna device according to the sixth embodiment can be improved by appropriately designing the size of the hollow structure 228. For example, in order to suppress a decrease in the axial ratio when the antenna device according to the sixth embodiment performs beam scanning in the wide angle direction, the size of the hollow structure 228 may be designed so that the gain difference between the vertically polarized wave and the horizontally polarized wave in the wide angle direction decreases.
Although the dielectric substrate 221 in which the conductor ground plane 222 is provided on the back side has been described above, the conductor ground plane 222 may be provided on both the front side and the back side of the dielectric substrate 221. In this case, the patch antenna 229 may be provided only on the conductor ground plane 222 on the back side of the dielectric substrate 221, or may be provided only on the conductor ground plane 222 on the front side of the dielectric substrate 221. Although the configuration in which there is no via in all the layers of the dielectric substrate 221, the dielectric substrate 224, and the dielectric substrate 227 has been described above, all or any of these substrates may have a via.
As described above, in the antenna device according to the sixth embodiment, the dielectric substrate 221, the dielectric substrate 224, and the dielectric substrate 227 are bonded in a state where the positions of the groove-shaped through hole 224a along the outer shape of the patch antenna 229 projected on the dielectric substrate 224 and the patch antenna 229 face each other. Since the opening area of the through hole 224a is smaller than the area of the patch antenna 229, the deformation of the dielectric substrate 221 and the dielectric substrate 227 toward the hollow structure 108 is restricted by the portion other than the through hole 224a in the dielectric substrate 224. Furthermore, the equivalent dielectric constant from the patch antenna 229 to the conductor ground plane 226 can be reduced depending on the size of the through hole 224a. Therefore, compared with a typical patch antenna without the hollow structure 228, the radiation efficiency is improved, and the gain when beam scanning is performed in the wide angle direction is improved.
The dielectric substrate 50 is a first dielectric substrate having the conductor ground plane 51. The conductor ground plane 51 is a first conductor ground plane provided on the entire back side of the dielectric substrate 50, and is provided with the first patch antenna 63. The first patch antenna 63 is formed in a circular shape. As illustrated in
The conductor removed portion 51a is a portion formed by removing the conductor from the conductor ground plane 51 along the outer shape of the first patch antenna 63. When the first patch antenna 63 has a circular shape, the conductor removed portion 51a is an annular portion obtained by removing the conductor from the conductor ground plane 51 as illustrated in
The dielectric substrate 55 is a second dielectric substrate including the conductor ground plane 54 and the conductor ground plane 56. The conductor ground plane 54 is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 55, and the conductor ground plane 56 is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 55. The dielectric substrate 55 has a through hole 55a penetrating from the conductor ground plane 54 to the conductor ground plane 56.
The dielectric substrate 55 in which the through hole 55a is formed is subjected to conductor plating processing. For example, as shown in
The conductor ground plane 51 of the dielectric substrate 50 and the conductor ground plane 54 of the dielectric substrate 55 are bonded by the solder 52 via the conductor plating 53a in a state where the through hole 55a and the first patch antenna 63 face each other. For example, the dielectric substrate 50 and the dielectric substrate 55 are bonded with the first patch antenna 63 facing the through hole 55a as illustrated in
The through hole 55a penetrates the dielectric substrate 55 from the conductor ground plane 54 to the conductor ground plane 56. Therefore, an opening 53b having the same opening shape as the through hole 55a is formed in the conductor plating 53a, an opening 53d having the same opening shape as the through hole 55a is formed in the conductor plating 53c, an opening 54a having the same opening shape as the through hole 55a is formed in the conductor ground plane 54, and an opening 56a having the same opening shape as the through hole 55a is formed in the conductor ground plane 56, as illustrated in
The solder 52 is not applied to a region 52a facing the first patch antenna 63 and the conductor removed portion 51a, but applied to a portion other than the region 52a in the conductor ground plane 51 or the conductor plating 53a.
The dielectric substrate 59 is a third dielectric substrate including the conductor ground plane 58 and the conductor ground plane 60. The conductor ground plane 58 is a fourth conductor ground plane provided on the entire front side (first side) of the dielectric substrate 59, and is provided with the second patch antenna 64. The conductor ground plane 60 is a fifth conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 59.
The second patch antenna 64 has a circular shape with a diameter smaller than that of the first patch antenna 63. As illustrated in
The conductor removed portion 58a is a portion formed by removing the conductor from the conductor ground plane 58 along the outer shape of the second patch antenna 64. When the second patch antenna 64 has a circular shape, the conductor removed portion 58a is an annular portion formed by removing the conductor from the conductor ground plane 58 as illustrated in
The conductor ground plane 58 of the dielectric substrate 59 and the conductor ground plane 56 of the dielectric substrate 55 are bonded by the solder 57 via the conductor plating 53c in a state where the through hole 55a and the second patch antenna 64 are arranged to face each other. For example, the dielectric substrate 55 and the dielectric substrate 59 are bonded with the second patch antenna 64 facing the through hole 55a as illustrated in
In the dielectric substrate 59, a via 61a and a via 61b are formed, and a first feeding pin 62a and a second feeding pin 62b are formed. The via 61a and the via 61b electrically connect the conductor ground plane 60 and the conductor ground plane 58. The conductor ground plane 58 is bonded to the conductor ground plane 56 by the solder 57, the conductor ground plane 56 is electrically bonded to the conductor ground plane 54 by the conductor plating 55b, and the conductor ground plane 54 is bonded to the conductor ground plane 51 by the solder 52. Therefore, due to the via 61a and the via 61b being provided, the potential from the conductor ground plane 60 to the conductor ground plane 51 is the same. The vias 61a and 61b are provided so as to surround the second patch antenna 64.
The first feeding pin 62a and the second feeding pin 62b have a feeding structure for feeding power to the second patch antenna 64. For example, a first polarized wave is fed to the first feeding pin 62a, and a second polarized wave orthogonal to the first polarized wave is fed to the second feeding pin 62b. The second patch antenna 64 operates as an antenna by being fed with power from the first feeding pin 62a and the second feeding pin 62b. Although the pin feeding method has been described, a feeding structure using slot coupling or spatial coupling of microstrip lines may be used as the structure for feeding power to the second patch antenna 64.
The hollow structure 65 is constituted by the first patch antenna 63, the conductor removed portion 51a, the region 52a, the opening 53b, the opening 54a, the through hole 55a, the opening 56a, the opening 56a, the opening 53d, the region 57a, and the second patch antenna 64. The size of the hollow structure 65 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Although the dielectric substrate 50 in which the conductor ground plane 51 is provided on the back side has been described above, the conductor ground plane 51 may be provided on both the front side and the back side of the dielectric substrate 50. In this case, the first patch antenna 63 may be provided only on the conductor ground plane 51 on the back side of the dielectric substrate 50, or may be provided only on the conductor ground plane 51 on the front side of the dielectric substrate 50. In addition, the configuration in which there is no via in the dielectric substrate 50 and the dielectric substrate 55 has been described, both or either of these substrates may have a via.
As described above, the antenna device according to the seventh embodiment includes the first feeding pin 62a and the second feeding pin 62b which are provided on the dielectric substrate 59, and the second patch antenna 64 which is provided on the dielectric substrate 59 and fed with power from the first feeding pin 62a and the second feeding pin 62b. Since the hollow structure 65 is provided immediately below the parasitic first patch antenna 63, cross polarization can be suppressed. In addition, circularly polarized waves can be radiated by feeding power having phases different by 90 degrees to the first feeding pin 62a and the second feeding pin 62b.
The dielectric substrate 71 is a first dielectric substrate having the conductor ground plane 72. The conductor ground plane 72 is a first conductor ground plane provided on the entire back side of the dielectric substrate 71, and is provided with the first patch antenna 80. The first patch antenna 80 is formed in a circular shape, and is provided on the conductor ground plane 72 by providing a conductor removed portion 72a in the conductor ground plane 72 as illustrated in
The conductor removed portion 72a is a portion formed by removing the conductor from the conductor ground plane 72 along the outer shape of the first patch antenna 80. When the first patch antenna 80 has a circular shape, the conductor removed portion 72a is an annular portion formed by removing the conductor from the conductor ground plane 72 as illustrated in
The conductor plate 74 is a first conductor plate having a through hole 74a. The conductor ground plane 72 of the dielectric substrate 71 and the conductor plate 74 are bonded by the solder 73 in a state where the through hole 74a and the first patch antenna 80 are arranged to face each other. For example, the dielectric substrate 71 and the conductor plate 74 are bonded with the first patch antenna 80 facing the through hole 74a as illustrated in
The solder 73 is a first solder for bonding the conductor ground plane and the conductor plate. The solder 73 is not applied to a region 73a facing the first patch antenna 80 and the conductor removed portion 72a, but applied to a portion other than the region 73a in the conductor ground plane 72 or the conductor plate 74.
The dielectric substrate 77 is a second dielectric substrate including the conductor ground plane 76 and the conductor ground plane 78. The conductor ground plane 76 is a second conductor ground plane provided on the entire front side of the dielectric substrate 77, and the conductor ground plane 78 is a third conductor ground plane provided on the entire back side of the dielectric substrate 77. The conductor ground plane 76 of the dielectric substrate 77 and the conductor plate 74 are bonded by the solder 75. The solder 75 is a second solder for bonding the conductor plate and the conductor ground plane. The solder 75 is not applied to a region 75a facing the through hole 74a, but applied to a portion other than the region 75a in the conductor ground plane 76.
The second patch antenna 82 is a circular patch antenna having a diameter smaller than that of the first patch antenna 80. As illustrated in
The conductor removed portion 76a is a portion formed by removing the conductor from the conductor ground plane 76 along the outer shape of the second patch antenna 82. When the second patch antenna 82 has a circular shape, the conductor removed portion 76a is an annular portion formed by removing the conductor from the conductor ground plane 76 as illustrated in
The conductor ground plane 72 of the dielectric substrate 71 and the conductor plate 74 are bonded by the solder 73 in a state where the through hole 74a and the first patch antenna 80 are arranged to face each other. For example, the dielectric substrate 71 and the conductor plate 74 are bonded with the first patch antenna 80 facing the through hole 74a as illustrated in
In the dielectric substrate 77, a via 79a and a via 79b are formed, and a first feeding pin 81a and a second feeding pin 81b are formed. The via 79a and the via 79b electrically connect the conductor ground plane 76 and the conductor ground plane 78. The conductor ground plane 76 is bonded to the conductor plate 74 by the solder 75, and the conductor plate 74 is bonded to the conductor ground plane 72 by the solder 73. Since the via 79a and the via 79b are provided, the potential from the conductor ground plane 78 to the conductor ground plane 72 is the same. The vias 79a and 79b are provided so as to surround the second patch antenna 82.
The first feeding pin 81a and the second feeding pin 81b have a feeding structure for feeding power to the second patch antenna 82. For example, a first polarized wave is fed to the first feeding pin 81a, and a second polarized wave orthogonal to the first polarized wave is fed to the second feeding pin 81b. The second patch antenna 82 operates as an antenna by being fed with power from the first feeding pin 81a and the second feeding pin 81b. Although the pin feeding method has been described, a feeding structure using slot coupling or spatial coupling of microstrip lines may be used as the structure for feeding power to the second patch antenna 82.
The hollow structure 84 is constituted by the first patch antenna 80, the conductor removed portion 72a, the region 73a, the through hole 74a, the region 75a, and the second patch antenna 82. The size of the hollow structure 84 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Although the dielectric substrate 71 in which the conductor ground plane 72 is provided on the back side has been described above, the conductor ground plane 72 may be provided on both the front side and the back side of the dielectric substrate 71. In this case, the first patch antenna 80 may be provided only on the conductor ground plane 72 on the back side of the dielectric substrate 71, or may be provided only on the conductor ground plane 72 on the front side of the dielectric substrate 71. Although a configuration in which the dielectric substrate 71 does not have a via, the dielectric substrate 71 may have a via.
As described above, the antenna device according to the eighth embodiment includes the first feeding pin 81a and the second feeding pin 81b which are provided on the dielectric substrate 77, and the second patch antenna 82 which is provided on the dielectric substrate 77 and fed with power from the first feeding pin 81a and the second feeding pin 81b. Since the hollow structure 84 is provided immediately below the parasitic first patch antenna 80, cross polarization can be suppressed. In addition, circularly polarized waves can be radiated by feeding power having phases different by 90 degrees to the first feeding pin 81a and the second feeding pin 81b.
The dielectric substrate 121 is a first dielectric substrate having the conductor ground plane 122. The conductor ground plane 122 is a first conductor ground plane provided on the entire back side of the dielectric substrate 121, and is provided with a plurality of first patch antennas 133. Each of the plurality of first patch antennas 133 is formed in a circular shape, and is formed in the conductor ground plane 122 by providing a conductor removed portion 122a in the conductor ground plane 122 as illustrated in
The conductor removed portion 122a is a portion formed by removing the conductor from the conductor ground plane 122 along the outer shape of the first patch antenna 133. When the first patch antenna 133 has a circular shape, the conductor removed portion 122a is an annular portion formed by removing the conductor from the conductor ground plane 122 as illustrated in
For example, the plurality of first patch antennas 133 is arranged in a rectangular array as illustrated in
The dielectric substrate 125 is a second dielectric substrate including the conductor ground plane 124 and the conductor ground plane 126. The conductor ground plane 124 is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 125, and the conductor ground plane 126 is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 125.
The dielectric substrate 125 has a plurality of through holes 125a penetrating from the conductor ground plane 124 to the conductor ground plane 126. In the dielectric substrate 125, each of the plurality of through holes 125a is formed at positions facing the first patch antennas 133. That is, they are arranged in, for example, a rectangular array as illustrated in
The conductor ground plane 122 of the dielectric substrate 121 and the conductor ground plane 124 of the dielectric substrate 125 are bonded by the solder 123 in a state where the positions of the plurality of through holes 125a and the plurality of first patch antennas 133 face each other. For example, the dielectric substrate 121 and the dielectric substrate 125 are bonded with each of the first patch antennas 133 facing the corresponding one of the through holes 125a as illustrated in
The through holes 125a penetrate the dielectric substrate 125 from the conductor ground plane 124 to the conductor ground plane 126. Therefore, as illustrated in
The dielectric substrate 129 is a third dielectric substrate including the conductor ground plane 128 and the conductor ground plane 130. The conductor ground plane 128 is a fourth conductor ground plane provided on the entire side (first side) of the dielectric substrate 129, and is provided with a plurality of second patch antennas 131. The conductor ground plane 130 is a fifth conductor ground plane provided on the entire side (back side, second side) opposite to the side of the dielectric substrate 129.
Each of the second patch antennas 131 is a circular patch antenna having a diameter smaller than that of the first patch antenna 133. As illustrated in
When the second patch antenna 131 has a circular shape, the conductor removed portion 128a is an annular portion formed by removing the conductor from the conductor ground plane 128 as illustrated in
The conductor ground plane 128 of the dielectric substrate 129 and the conductor ground plane 126 of the dielectric substrate 125 are bonded by the solder 127 in a state where the positions of the plurality of through holes 125a and the plurality of second patch antennas 131 face each other. The solder 127 is a second solder for bonding the conductor ground planes. The solder 127 is not applied to regions 127a facing the through holes 125a, but applied to a portion other than the regions 127a in the conductor ground plane 128 or the conductor ground plane 126.
A plurality of vias 134 and a plurality of feeding pins 135 are formed in the dielectric substrate 129. The plurality of vias 134 electrically connects the conductor ground plane 130 and the conductor ground plane 128. Since the conductor ground plane 128 is bonded to the conductor ground plane 126 by the solder 127, the potential from the conductor ground plane 130 to the conductor ground plane 126 is the same due to the plurality of vias 134 being provided. The plurality of vias 134 is arranged so as to surround each of the plurality of second patch antennas 131.
Each of the plurality of feeding pins 135 has a feeding structure that feeds power to the corresponding one of the plurality of second patch antennas 131. For example, a set of two feeding pins 135 is provided for one second patch antenna 131. A first polarized wave is fed to one of the feeding pins 135, and a second polarized wave orthogonal to the first polarized wave is fed to the other feeding pin 135. The second patch antenna 131 operates as an antenna by being fed with power from the feeding pins 135. Although the pin feeding method has been described, a feeding structure using slot coupling or spatial coupling of microstrip lines may be used as the structure for feeding power to the second patch antennas 131.
Each of the plurality of hollow structures 132 is constituted by the first patch antenna 133, the conductor removed portion 122a, the region 123a, the opening 124b, the through hole 125a, the opening 126a, the region 127a, and the second patch antenna 131. The size of each hollow structure 132 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Although the dielectric substrate 121 in which the conductor ground plane 122 is provided on the back side has been described above, the conductor ground plane 122 may be provided on both the front side and the back side of the dielectric substrate 121. In this case, the first patch antennas 133 may be provided only on the conductor ground plane 122 on the back side of the dielectric substrate 121, or may be provided only on the conductor ground plane 122 on the front side of the dielectric substrate 121. Although the configuration in which there is no via in the dielectric substrate 121 and the dielectric substrate 125 has been described above, both or either of these substrates may have a via.
Next, a modification of the antenna device according to the ninth embodiment will be described.
The dielectric substrate 139 is a first dielectric substrate having the conductor ground plane 136a and the conductor ground plane 136b. The conductor ground plane 136a is a zeroth conductor ground plane provided on the entire front side (first side) of the dielectric substrate 139, and is provided with a plurality of first patch antennas 137. The conductor ground plane 136b is a first conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 139. The conductor ground plane 136b has openings formed by removing the conductor from portions facing through holes 142c of the dielectric substrate 142.
Each of the plurality of first patch antennas 137 is, for example, formed in a circular shape. The first patch antennas 137 may be arranged in a triangular array, a rectangular array, or a circular array, or may be arranged one-dimensionally instead of being arranged two-dimensionally. Vias 138 are provided in the dielectric substrate 139 to electrically connect the conductor ground plane 136a and the conductor ground plane 136b.
The dielectric substrate 142 is a second dielectric substrate having the conductor ground plane 142a and the conductor ground plane 142b. The conductor ground plane 142a is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 142, and the conductor ground plane 142b is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 142.
The dielectric substrate 142 has a plurality of through holes 142c penetrating from the conductor ground plane 142a to the conductor ground plane 142b. In the dielectric substrate 142, each of the plurality of through holes 142c is formed at positions facing the first patch antennas 137. That is, they are arranged in, for example, a rectangular array. Vias 141 are provided in the dielectric substrate 142 to electrically connect the conductor ground plane 142a and the conductor ground plane 142b.
The conductor ground plane 136b of the dielectric substrate 139 and the conductor ground plane 142a of the dielectric substrate 142 are bonded by the solder 140a in a state where the positions of the plurality of through holes 142c and the plurality of first patch antennas 137 face each other. The solder 140a is a first solder for bonding the conductor ground planes.
The dielectric substrate 144 is a third dielectric substrate including the conductor ground plane 145a and the conductor ground plane 145b. The conductor ground plane 145a is a fourth conductor ground plane provided on the entire front side of the dielectric substrate 144, and is provided with a plurality of second patch antennas 146. The conductor ground plane 145b is a fifth conductor ground plane provided on the entire back side of the dielectric substrate 144. Each of the second patch antennas 146 is a circular patch antenna having a diameter smaller than that of the first patch antenna 137.
A plurality of vias 143 and a plurality of feeding pins 147 are formed in the dielectric substrate 144. The plurality of vias 143 electrically connects the conductor ground plane 145a and the conductor ground plane 145b. The conductor ground plane 145a is bonded to the conductor ground plane 142b by the solder 140b, the conductor ground plane 142b is bonded to the conductor ground plane 142a by the vias 141, the conductor ground plane 142a is bonded to the conductor ground plane 136b by the solder 140a, and the conductor ground plane 136b is bonded to the conductor ground plane 136a by the vias 138. As a result, the potential from the conductor ground plane 145b to the conductor ground plane 136a is the same. Note that each of the vias 143 is arranged so as to surround the corresponding one of the second patch antennas 146.
Each of the plurality of feeding pins 147 has a feeding structure that feeds power to the corresponding one of the plurality of second patch antennas 146. For example, a set of two feeding pins 147 is provided for one second patch antenna 146. A first polarized wave is fed to one of the feeding pins 147, and a second polarized wave orthogonal to the first polarized wave is fed to the other feeding pin 147. The second patch antennas 146 operate as an antenna by being fed with power from the feeding pins 147. Although the pin feeding method has been described, a feeding structure using slot coupling or spatial coupling of microstrip lines may be used as the structure for feeding power to the second patch antennas 146.
The size of each of the plurality of hollow structures 132a is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
The dielectric substrate 139A is a first dielectric substrate having the conductor ground plane 136b. The conductor ground plane 136b is a first conductor ground plane provided on the entire back side of the dielectric substrate 139A, and is provided with a plurality of first patch antennas 137. Each of the plurality of first patch antennas 137 is, for example, formed in a circular shape. The first patch antennas 137 may be arranged in a triangular array, a rectangular array, or a circular array, or may be arranged one-dimensionally instead of being arranged two-dimensionally.
The dielectric substrate 142 is a second dielectric substrate including the conductor ground plane 142a and the conductor ground plane 142b. The conductor ground plane 142a is a second conductor ground plane provided on the entire front side of the dielectric substrate 142, and the conductor ground plane 142b is a third conductor ground plane provided on the entire back side of the dielectric substrate 142. The dielectric substrate 142 has a plurality of through holes 142c penetrating from the conductor ground plane 142a to the conductor ground plane 142b. The dielectric substrate 142 in which the plurality of through holes 142c is formed is subjected to conductor plating processing. By the conductor plating processing, the conductor plating 148a is provided on an upper layer of the conductor ground plane 142a, conductor plating 142d is provided on the side walls of the through holes 142c, and the conductor plating 148b is provided on an upper layer of the conductor ground plane 142b.
The conductor ground plane 136b of the dielectric substrate 139A and the conductor ground plane 142a of the dielectric substrate 142 are bonded by the solder 140a via the conductor plating 148a in a state where the positions of the plurality of through holes 142c and the plurality of first patch antennas 137 face each other. The solder 140a is a first solder for bonding the conductor ground planes.
The dielectric substrate 144 is a third dielectric substrate including the conductor ground plane 145a and the conductor ground plane 145b. The conductor ground plane 145a is a fourth conductor ground plane provided on the entire front side of the dielectric substrate 144, and is provided with a plurality of second patch antennas 146. The conductor ground plane 145b is a fifth conductor ground plane provided on the entire back side of the dielectric substrate 144. Each of the second patch antennas 146 is a circular patch antenna having a diameter smaller than that of the first patch antenna 137.
The conductor ground plane 145a of the dielectric substrate 144 and the conductor ground plane 142b of the dielectric substrate 142 are bonded by the solder 140b via the conductor plating 148b in a state where the positions of the plurality of through holes 142c and the plurality of second patch antennas 146 face each other. The solder 140b is a second solder for bonding the conductor ground planes.
A plurality of vias 143 and a plurality of feeding pins 147 are formed in the dielectric substrate 144. The plurality of vias 143 electrically connects the conductor ground plane 145a and the conductor ground plane 145b. The conductor ground plane 145a is bonded to the conductor ground plane 142b by the conductor plating 148b and the solder 140b, the conductor ground plane 142b is bonded to the conductor ground plane 142a by the conductor plating 142d, and the conductor ground plane 142a is bonded to the conductor ground plane 136b by the conductor plating 148a and the solder 140a. As a result, the potential from the conductor ground plane 145b to the conductor ground plane 136b is the same. Note that each of the vias 143 is arranged so as to surround the corresponding one of the second patch antennas 146. The function of the feeding pins 147 is the same as that of the feeding pins 147 in
The size of each of the hollow structures 132a is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
The dielectric substrate 173 is a first dielectric substrate having the conductor ground plane 170a and the conductor ground plane 170b. The conductor ground plane 170a is a zeroth conductor ground plane provided on the entire front side (first side) of the dielectric substrate 173, and is provided with a plurality of first patch antennas 171. The conductor ground plane 170b is a first conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 173. The conductor ground plane 170b has openings formed by removing the conductor from portions facing through holes 176a of the dielectric substrate 176.
The dielectric substrate 176 is a second dielectric substrate including the conductor ground plane 175 and the conductor ground plane 177. The conductor ground plane 175 is a second conductor ground plane provided on the entire front side of the dielectric substrate 176, and the conductor ground plane 177 is a third conductor ground plane provided on the entire back side of the dielectric substrate 176. The dielectric substrate 176 has a plurality of through holes 176a penetrating from the conductor ground plane 175 to the conductor ground plane 177. The dielectric substrate 176 in which the plurality of through holes 176a is formed is subjected to conductor plating processing. By the conductor plating processing, the conductor plating 174a is provided on an upper layer of the conductor ground plane 175, conductor plating 182 is provided on the side walls of the through holes 176a, and the conductor plating 174b is provided on an upper layer of the conductor ground plane 177.
The conductor ground plane 170b of the dielectric substrate 173 and the conductor ground plane 175 of the dielectric substrate 176 are bonded by the solder 140a via the conductor plating 174a in a state where the positions of the plurality of through holes 176a and the plurality of first patch antennas 137 face each other. The solder 140a is a first solder for bonding the conductor ground planes.
The dielectric substrate 179 is a third dielectric substrate having the conductor ground plane 178a and the conductor ground plane 178b. The conductor ground plane 178a is a fourth conductor ground plane provided on the entire front side of the dielectric substrate 179, and is provided with a plurality of second patch antennas 181. The conductor ground plane 178b is a fifth conductor ground plane provided on the entire back side of the dielectric substrate 179. Each of the second patch antennas 181 is a circular patch antenna having a diameter smaller than that of the first patch antenna 171.
The conductor ground plane 178a of the dielectric substrate 179 and the conductor ground plane 177 of the dielectric substrate 176 are bonded by the solder 140b via the conductor plating 174b in a state where the positions of the plurality of through holes 176a and the plurality of second patch antennas 181 face each other. The solder 140b is a second solder for bonding the conductor ground planes.
A plurality of vias 180a and a plurality of feeding pins 180 are formed in the dielectric substrate 179. The plurality of vias 180a electrically connects the conductor ground plane 178a and the conductor ground plane 178b. The conductor ground plane 178a is bonded to the conductor ground plane 177 by the conductor plating 174b and the solder 140b, the conductor ground plane 177 is bonded to the conductor ground plane 175 by the conductor plating 182, the conductor ground plane 175 is bonded to the conductor ground plane 170b by the conductor plating 174a and the solder 140a, and the conductor ground plane 170b is electrically bonded to the conductor ground plane 170a by vias 172c. As a result, the potential from the conductor ground plane 178b to the conductor ground plane 170a is the same. Note that each of the vias 180a is arranged so as to surround the corresponding one of the second patch antennas 181. The function of the feeding pins 180 is the same as that of the feeding pins 147 in
The size of each of the hollow structures 132a is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
The dielectric substrate 190 is a first dielectric substrate having the conductor ground plane 191. The conductor ground plane 191 is a first conductor ground plane provided on the entire back side of the dielectric substrate 190, and is provided with a plurality of first patch antennas 192. Each of the plurality of first patch antennas 192 is, for example, formed in a circular shape. The first patch antennas 192 may be arranged in a triangular array, a rectangular array, or a circular array, or may be arranged one-dimensionally instead of being arranged two-dimensionally.
The conductor plate 194 is a first conductor plate having a plurality of through holes 194a. The conductor ground plane 191 of the dielectric substrate 190 and the conductor plate 194 are bonded by the solder 193a in a state where the positions of the plurality of through holes 194a and the plurality of first patch antennas 192 face each other. The solder 193a is a first solder for bonding the conductor ground plane and the conductor plate.
The dielectric substrate 195 is a third dielectric substrate including the conductor ground plane 196a and the conductor ground plane 196b. The conductor ground plane 196a is a fourth conductor ground plane provided on the entire side of the dielectric substrate 195, and is provided with a plurality of second patch antennas 198. The conductor ground plane 196b is a fifth conductor ground plane provided on the entire back side of the dielectric substrate 195. Each of the second patch antennas 198 is a circular patch antenna having a diameter smaller than that of the first patch antenna 192.
The conductor ground plane 196a of the dielectric substrate 195 and the conductor plate 194 are bonded by the solder 193b in a state where the positions of the plurality of through holes 194a and the plurality of second patch antennas 198 face each other. The solder 193b is a second solder for bonding the conductor ground plane and the conductor plate.
A plurality of vias 197a and a plurality of feeding pins 197 are formed in the dielectric substrate 195. The plurality of vias 197a electrically connects the conductor ground plane 196a and the conductor ground plane 196b. The conductor ground plane 196a is bonded to the conductor plate 194 by the solder 193b, and the conductor plate 194 is bonded to the conductor ground plane 191 by the solder 193a. As a result, the potential from the conductor ground plane 196b to the conductor ground plane 191 is the same. Note that each of the vias 197a is arranged so as to surround the corresponding one of the second patch antennas 198. The function of the feeding pins 197 is the same as that of the feeding pins 147 in
The size of each of the hollow structures 199 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
The antenna device according to the ninth embodiment only needs to have a structure including two or more hollow structures each including a through hole and a patch antenna, and may have a plurality of structures of the antenna device according to any one of the first to eighth embodiments.
As described above, the antenna device according to the ninth embodiment includes two or more hollow structures each including a through hole and a patch antenna, and thus, can be used as an array antenna device. In addition, since the second patch antenna fed with power from the feeding pins is provided in each of the plurality of hollow structures, it is possible to perform beam scanning in a desired direction by adjusting the feeding phase of the antenna having each hollow structure using a phase shifter.
The dielectric substrate 151 is a first dielectric substrate having the conductor ground plane 152. The conductor ground plane 152 is a first conductor ground plane provided on the entire back side of the dielectric substrate 151, and is provided with a plurality of first patch antennas 161. Each of the plurality of first patch antennas 161 is formed in a circular shape, and is formed on the conductor ground plane 122 by providing a conductor removed portion 152a in the conductor ground plane 152 as illustrated in
Each conductor removed portion 152a is a portion formed by removing is removed from the conductor ground plane 152 along the outer shape of the first patch antenna 161. When each of the first patch antennas 161 has a circular shape, the conductor removed portion 152a is an annular portion formed by removing the conductor from the conductor ground plane 152 as illustrated in
For example, the plurality of first patch antennas 161 is arranged in a rectangular array as illustrated in
The dielectric substrate 155 is a second dielectric substrate including the conductor ground plane 154 and the conductor ground plane 156. The conductor ground plane 154 is a second conductor ground plane provided on the entire front side (first side) of the dielectric substrate 155, and the conductor ground plane 156 is a third conductor ground plane provided on the entire side (back side, second side) opposite to the front side of the dielectric substrate 155.
The dielectric substrate 155 has a plurality of through holes 155a penetrating from the conductor ground plane 154 to the conductor ground plane 156. In the dielectric substrate 155, each of the plurality of through holes 155a is formed at positions facing the first patch antennas 161. That is, they are arranged in, for example, a rectangular array as illustrated in
The conductor ground plane 152 of the dielectric substrate 151 and the conductor ground plane 154 of the dielectric substrate 155 are bonded by the solder 153 in a state where the positions of the plurality of through holes 155a and the plurality of first patch antennas 161 face each other. The solder 153 is a first solder for bonding the conductor ground planes, and is, for example, cream solder. In addition, the conductor ground plane 152 and the conductor ground plane 154 are bonded by the solder 153 at positions equidistant from the centers of the adjacent first patch antennas 161 as illustrated in
The through holes 155a penetrate the dielectric substrate 155 from the conductor ground plane 154 to the conductor ground plane 156. Therefore, as illustrated in
The dielectric substrate 159 is a third dielectric substrate including the conductor ground plane 158 and the conductor ground plane 160. The conductor ground plane 158 is a fourth conductor ground plane provided on the entire side (first side) of the dielectric substrate 159, and is provided with a plurality of second patch antennas 162. The conductor ground plane 160 is a fifth conductor ground plane provided on the entire side (back side, second side) opposite to the side of the dielectric substrate 159.
Each of the second patch antennas 162 is a circular patch antenna having a diameter smaller than that of the first patch antenna 161. As illustrated in
When the second patch antenna 162 has a circular shape, the conductor removed portion 158a is an annular portion formed by removing the conductor from the conductor ground plane 158. Note that the second patch antennas 162 are not limited to one having a circular shape, and it may have, for example, a polygonal shape such as a triangular shape or a quadrangular shape. Each of the plurality of second patch antennas 162 is formed at positions facing the through holes 155a in the conductor ground plane 158, and thus, they are arranged in, for example, a rectangular array as illustrated in
The conductor ground plane 158 of the dielectric substrate 159 and the conductor ground plane 156 of the dielectric substrate 155 are bonded by the solder 157 in a state where the positions of the plurality of through holes 155a and the plurality of second patch antennas 162 face each other. The solder 157 is a second solder for bonding the conductor ground planes, and is, for example, cream solder. In addition, the conductor ground plane 158 and the conductor ground plane 156 are bonded by the solder 157 at positions equidistant from the centers of the adjacent second patch antennas 162 as illustrated in
A plurality of vias 163 and a plurality of feeding pins 164 are formed in the dielectric substrate 159. The plurality of vias 163 electrically connects the conductor ground plane 160 and the conductor ground plane 158. Since the conductor ground plane 158 is bonded to the conductor ground plane 156 by the solder 157, the potential from the conductor ground plane 160 to the conductor ground plane 156 is the same due to the plurality of vias 163 being provided. Each of the vias 163 is arranged so as to surround the corresponding one of the second patch antennas 162.
Each of the plurality of feeding pins 164 has a feeding structure that feeds power to the corresponding one of the plurality of second patch antennas 162. For example, a set of two feeding pins 164 is provided for one second patch antenna 162. A first polarized wave is fed to one of the feeding pins 164, and a second polarized wave orthogonal to the first polarized wave is fed to the other feeding pin 164. The second patch antennas 162 operate as an antenna by being fed with power from the feeding pins 164. Although the pin feeding method has been described, a feeding structure using slot coupling or spatial coupling of microstrip lines may be used as the structure for feeding power to the second patch antennas 162.
Each of the plurality of hollow structures 165 is constituted by the first patch antenna 161, the conductor removed portion 152a, the opening 154b, the through hole 155a, the opening 156a, and the second patch antenna 162. The size of each hollow structure 165 is set so that a gain difference between a vertically polarized wave and a horizontally polarized wave decreases when the antenna device illustrated in
Although the dielectric substrate 151 in which the conductor ground plane 152 is provided on the back side has been described above, the conductor ground plane 152 may be provided on both the front side and the back side of the dielectric substrate 151. In this case, the first patch antennas 161 may be provided only on the conductor ground plane 152 on the back side of the dielectric substrate 151, or may be provided only on the conductor ground plane 152 on the front side of the dielectric substrate 151. Although the configuration in which there is no via in the dielectric substrate 151 and the dielectric substrate 155 has been described above, both or either of these substrates may have a via.
As described above, the antenna device according to the tenth embodiment includes two or more hollow structures 165 each including the through hole 155a, the first patch antenna 161, and the second patch antenna 162. In this configuration, they are bonded by the solder 153 at positions equidistant from the centers of the adjacent first patch antennas 161, and they are bonded by the solder 157 at positions equidistant from the centers of the adjacent second patch antennas 162. In the antenna device according to tenth embodiment, the conductor ground planes are bonded by the solder applied at positions equidistant from the centers of the adjacent patch antennas, whereby leakage of the solder to the hollow structures 165 can be prevented. Furthermore, the equivalent dielectric constant from the first patch antennas 161 to the second patch antennas 162 can be reduced depending on the size of the through holes 155a. Therefore, compared with a typical patch antenna without the hollow structure 165, the radiation efficiency is improved, and the gain when beam scanning is performed in the wide angle direction is improved. In addition, since the second patch antenna 162 fed with power from the feeding pins 164 is provided in each of the plurality of hollow structures 165, it is possible to perform beam scanning in a desired direction by adjusting the feeding phase of the antenna having each hollow structure 165 using a phase shifter.
For example, when the relative dielectric constant of the dielectric substrate 301 is about 3, the interval between the front side of the dielectric substrate 1 and the back side of the dielectric substrate 301 is equal to or more than 0.2 times of the wavelength λ0 of the design frequency of the antenna device at a position in the radiation direction of the patch antenna and parallel to the front side of the dielectric substrate 1 as illustrated in
As described above, the antenna device according to the eleventh embodiment includes the dielectric substrate 301 provided in parallel with the side of the dielectric substrate 1 with a fixed interval therefrom in the radiation direction of the patch antenna 11. As a result, the antenna device according to the eleventh embodiment can reduce a mismatch loss when beam scanning is performed in the wide angle direction, and can further suppress a decrease in gain when beam scanning is performed in the wide angle direction.
The eleventh embodiment describes the configuration in which the dielectric substrate 301 is provided to the antenna device illustrated in
The dielectric substrates 311-1, 311-2, . . . , and 311-N are a plurality of dielectric substrates provided in parallel with the side of the dielectric substrate 1 and spaced at regular intervals in the radiation direction of the patch antenna 11. Further, each of the dielectric substrates 311-1, 311-2, . . . , and 311-N includes, for example, one or more layers and one or more kinds of dielectric layers or dielectric substrates. In addition, each of the dielectric substrates 311-1, 311-2, . . . , and 311-N is larger than the dielectric substrate 1 as illustrated in
For example, when the relative dielectric constant of each of the dielectric substrates 311-1, 311-2, . . . , and 311-N is about 3, the dielectric substrate 1 and the dielectric substrate 311-1, and the dielectric substrates 311-1, 311-2, . . . , and 311-N are spaced at intervals 0.2 times or more the wavelength λ0 of the design frequency of the antenna device at positions in the radiation direction of the patch antenna 11 and parallel to the front side of the dielectric substrate 1.
As described above, the antenna device according to the twelfth embodiment includes a plurality of dielectric substrates 311-1, 311-2, . . . , and 311-N provided in parallel with the side of the dielectric substrate 1 and spaced at regular intervals in the radiation direction of the patch antenna 11. As a result, the antenna device according to the twelfth embodiment can reduce a mismatch loss when beam scanning is performed in the wide angle direction, and can further suppress a decrease in gain when beam scanning is performed in the wide angle direction, as in the eleventh embodiment.
The twelfth embodiment describes the configuration in which the plurality of dielectric substrates 311-1, 311-2, . . . , and 311-N is provided to the antenna device illustrated in
The plurality of copper foil patterns 322 is a plurality of conductor patterns periodically formed on a substrate side (side, first side). Various shapes are conceivable as the shape of the copper foil patterns 322 depending on the application of the antenna device or the like. For example, an annular pattern with a part being opened (split ring shape) as illustrated in
As described above, in the antenna device according to the thirteenth embodiment, the dielectric substrate 321 has the plurality of copper foil patterns 322 periodically formed on the substrate side. Due to the configuration in which the plurality of copper foil patterns 322 is provided on the dielectric substrate 321 provided in parallel with the side of the dielectric substrate 1 with a fixed interval therefrom in the radiation direction of the patch antenna 11, it is also possible to reduce a mismatch loss when beam scanning is performed in the wide angle direction, and to suppress a decrease in gain when beam scanning is performed in the wide angle direction, as in the eleventh embodiment.
The thirteenth embodiment describes the configuration in which the dielectric substrate 321 is provided to the antenna device illustrated in
Further, the plurality of copper foil patterns 322 may be provided on each of the plurality of dielectric substrates 311-1, 311-2, . . . , and 311-N described in the twelfth embodiment. With this configuration, effects similar to the effects of the twelfth embodiment can be obtained.
The dielectric substrate 331 includes, for example, one or more layers and one or more kinds of dielectric layers or dielectric substrates. For example, when the relative dielectric constant of the dielectric substrate 331 is about 3, the interval between the front side of the dielectric substrate 1 and the back side of the dielectric substrate 331 is equal to or more than 0.2 times of the wavelength λ0 of the design frequency of the antenna device at a position in the radiation direction of the patch antenna 11 and parallel to the front side of the dielectric substrate 1. In the example illustrated in
The radome 332 is provided to cover the entire antenna device, and has, for example, a cylindrical shape as illustrated in
As described above, the antenna device according to the fourteenth embodiment includes the radome 332. By providing the radome 332, the antenna device can be protected from a natural environment, for example, wind and rain.
The fourteenth embodiment describes the configuration in which the dielectric substrate 331 and the radome 332 are provided to the antenna device illustrated in
The present disclosure is not limited to the above embodiments, and two or more of the above embodiments can be freely combined, or any components in the embodiments can be modified or omitted, within the scope of the present disclosure.
The antenna manufacturing method according to the present disclosure can be used, for example, for manufacturing an array antenna device.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2019/024949 | 6/24/2019 | WO | 00 |
