Electronic devices, such as laptops, cellular phones, and tablets include antennas for wireless communication. Such antennas may be mounted in an enclosure or housing of the electronic device. The antennas enable communication between electronic devices and wireless networks and satellite navigation systems.
The following detailed description references the drawings, wherein:
Electronic devices have an enclosure or housing in which electronic components, such as a processor, a memory, a power source, a cooling fan, an I/O port, an antenna, etc., are present. The enclosure of an electronic device also houses a radio transceiver circuitry which may include multiple signal processors for processing various communication signals over different radio frequency channels. One or more signal processors may be coupled to an in-built antenna for transceiving the signals. The signal processors can generate communication signals for transmission and can also process and decode received communication signals. The signal processors may be main signal processors which are capable of both generating signals for transmission and decoding received signals; or auxiliary signal processors which are capable of decoding received signals.
In the radio transceiver circuitry, generally, an Input/Output (I/O) port of a low band Wireless Wide Area Network (WWAN) main signal processor, an I/O port of a mid band WWAN main signal processor, and an I/O port of a high band WWAN main signal processor are multiplexed together to a single port to which a first antenna is connected. This multiplexing is usually done by using two diplexers. The first antenna transceives WWAN signals over the low-band, mid-band, and high-band. Further, an I/O port of a WWAN auxiliary signal processor and an I/O port of a Global Positioning System (GPS) signal processor are multiplexed together to a single port to which a second antenna is connected. The I/O port of the WWAN auxiliary signal processor and the I/O port of the GPS signal processor is multiplexed using another diplexer. The second antenna receives WWAN signals and GPS signals.
The diplexers in the radio transceiver circuitry increases insertion loss and thereby reduces signal strength and affects signal quality. Also, the electronic devices having the radio transceiver circuitry are generally compact in nature. The diplexers in the radio transceiver circuitry may utilize more space thereby adversely affecting the compactness of the electronic devices.
The present subject matter relates to configuration and arrangement of antennas in an electronic device. According to the present subject matter, a separate antenna is coupled to a high band Wireless Wide Area Network (WWAN) main signal processor; and a single antenna is coupled to a Global Positioning System (GPS) signal processor and a Wireless Local Area Network (WLAN) signal processor.
In an example implementation, a first antenna is coupled to the high band WWAN main signal processor. The first antenna is to transceive high band WWAN signals. A second antenna is coupled to the GPS signal processor and a WLAN signal processor. The second antenna is to transceive GPS signals and WLAN signals
Thus, with the proposed subject matter, high band WWAN signals are transceived through a separate antenna, which is not otherwise the case in a RF transceiver circuitry. Hence, the I/O port of the high band WWAN main signal processor is not multiplexed with the I/O ports of the mid-band and low-band WWAN main signal processors, thereby reducing the number of diplexers in the radio transceiver circuitry by one. Due to elimination of the diplexer from the radio transceiver circuitry, insertion loss may be reduced, thereby improving signal strength.
Further, in the proposed subject matter, a single antenna is coupled to the GPS signal processor and the WLAN signal processor. To this end, the I/O port of the GPS signal processor is multiplexed with the I/O port of the WLAN signal processor, instead of being multiplexed with the I/O port of the WWAN auxiliary signal processor as in other systems. The insertion loss at a diplexer multiplexing the I/O port of the GPS signal processor with the I/O port of the WLAN signal processor is less as compared to the insertion loss at the diplexer multiplexing the I/O port of the GPS signal processor with the I/O port of the WWAN auxiliary signal processor. This is because, when GPS signals and WWAN signals pass through a diplexer, greater power is consumed by the diplexer to multiplex/demultiplex the GPS and WWAN signals, since the difference in operating frequencies of the GPS and WWAN signals is small, i.e., in the order of 100-200 Mega Hertz (MHz). Whereas, when GPS signals and WLAN signals pass through a diplexer, lesser power is consumed by the diplexer to multiplex/demultiplex the GPS and WLAN signals as the difference in operating frequencies of the GPS and WLAN signals is comparatively larger, i.e., in the order of 900 MHz to 1 Giga Hertz (GHz). Hence, with the antenna configuration of the present subject matter insertion loss is further reduced which provides improved signal strength and better signal quality.
The following detailed description refers to the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the following description to refer to the same or similar parts. While several examples are described in the description, modifications, adaptations, and other implementations are possible. Accordingly, the following detailed description does not limit the disclosed examples. Instead, the proper scope of the disclosed examples may be defined by the appended claims.
In an example implementation, the enclosure 100 includes a first antenna 102 and a second antenna 104, housed within the enclosure 100. In an example implementation, the first and second antennas 102 and 104 may be a slot antenna, a loop antenna, a planar inverted-F antenna, a cavity antenna, and a hybrid slot antenna.
The enclosure 100 further includes a high band Wireless Wide Area Network (WWAN) main signal processor 106, a Wireless Local Area Network (WLAN) signal processor 108, and a Global Positioning System (GPS) signal processor 110. In an example implementation, the high band WWAN main signal processor 106, the WLAN signal processor 108, and the GPS signal processor 110 may be included in a radio frequency (RF) front-end circuitry of an electronic device, such as a tablet, a laptop, a smartphone, or the like, associated with the enclosure 100. The RF front-end circuitry refers to the circuitry between an antenna and a signal processor and includes the signal processor. In an example implementation, the signal processor may include an RF filter, an RF amplifier, a mixer, an oscillator, a modulator/demodulator, a low-noise converter, etc.
The high band WWAN main signal processor 106 can generate high band WWAN signals for transmission and can decode received high band WWAN signals. In an example implementation, the high band WWAN signals operate in a frequency range of 2.3 GHz to 2.69 GHz. The WLAN signal processor 108 can generate WLAN signals for transmission and decode received WLAN signals. In an example implementation, the WLAN signals operate in a frequency band of one of 2.4 GHz and 5 GHz. The WLAN signal processor 108 is also referred to as a first WLAN signal processor 108. In an example implementation, the first WLAN signal processor 108 may be a dual band signal processor operable over both 2.4 GHz and 5 GHz frequency bands. In another example implementation, the first WLAN signal processor 108 may be operable over a single frequency band, say 2.4 GHz or 5 GHz. The GPS signal processor 110 can decode received GPS signals. In an example implementation, the GPS signals operate in a frequency of about 1.5 GHz.
In an example implementation, as shown in
The enclosure 200 further includes a first diplexer 204. The first diplexer 204 is in the RF circuitry 202. The second antenna 104 is coupled to the first WLAN signal processor 108 and the GPS signal processor 110 through the first diplexer 204. The first diplexer 204 has a first port 206, a second port 208, and a third port 210. The first, second and third ports 206, 208, and 210 are contact points for establishing an electrical connection between the first diplexer 204 and antennas, signal processors, and other electronic components. The first diplexer 204 multiplexes the first port 206 and the second port 208 onto the third port 210.
The first port 206 of the first diplexer 204 is coupled to the GPS signal processor 110, the second port 208 of the first diplexer 204 is coupled to the first WLAN signal processor 108, and the third port 210 of the first diplexer 204 is coupled to the second antenna 104. WLAN signals and GPS signals received by the second antenna 104 may be transmitted to the first diplexer 204 through the third port 210. The first diplexer 204 can segregate received WLAN signals from the GPS signals and forward the WLAN signals to the WLAN auxiliary signal processor 108 and the GPS signals to the GPS signal processor 110. Thus, the received signals are segregated and forwarded to the respective signal processors through the first diplexer 204.
The enclosure 200 further includes a third antenna 212. The third antenna 212 is coupled to a low band WWAN main signal processor 214 and a mid-band WWAN main signal processor 216. The low band WWAN main signal processor 214 can generate low band WWAN signals for transmission and can decode received low band WWAN signals. In an example implementation, the low band WWAN signals operate in a frequency range of 690 Mega Hertz (MHz) to 960 Mega Hertz (MHz). The mid band WWAN main signal processor 216 can generate mid band WWAN signals for transmission and can decode received mid band WWAN signals. In an example implementation, the mid band WWAN signals operate in a frequency range of 1.7 GHz to 2.2 GHz. In an example implementation, the third antenna 212 may be a cuboidal cavity antenna and may have a length ‘L3’ of about 80 mm, a breadth ‘B’ of about 11 mm, and a height (not shown) of about 2.5 mm.
As shown in
The fourth port 220 of the second diplexer 218 is coupled to the low band WWAN main signal processor 214, the fifth port 222 of the second diplexer 218 is coupled to the mid band WWAN main signal processor 216, and the sixth port 224 of the second diplexer 218 is coupled to the third antenna 212. The second diplexer 218 can combine and segregate low band WWAN signals from the mid band WWAN signals. Thus, the second diplexer 218 enables signals generated by the low band WWAN main signal processor 214 and signals generated by the mid band WWAN main signal processor 216 to be multiplexed and forwarded to the third antenna 212 for transmission. Similarly, signals received by the third antenna 212 are segregated and forwarded to the respective signal processors.
The enclosure 200 further includes a fourth antenna 226. The fourth antenna 226 is coupled to a WWAN auxiliary signal processor 228 and is operable to receive WWAN signals. The WWAN auxiliary signal processor 228 is included in the RF circuitry 202 and can decode WWAN signals received at the fourth antenna 226. In an example implementation, the WWAN signals received at the fourth antenna 226 are in a frequency range of 690 MHz to 2.69 GHz. In an example implementation, the mid band WWAN signals operate in a frequency range of 1.7 GHz to 2.2 GHz. In an example implementation, the fourth antenna 226 may be a cuboidal cavity antenna and may have a length ‘L4’ of about 50 mm, a breadth ‘B’ of about 11 mm, and a height (not shown) of about 2.5 mm.
The enclosure 200 further includes a fifth antenna 230. The fifth antenna 230 is coupled to a second WLAN signal processor 232 and is operable to transceive WLAN signals. The second WLAN signal processor 232 is in the RF circuitry 202. The second WLAN signal processor 232 can generate WLAN signals for being transmitted through the fifth antenna 230 and can decode WLAN signals received at the fifth antenna 230. In an example implementation, the WLAN signals received at the fifth antenna 230 may operate in a frequency band of one of 2.4 GHz and 5 GHz. In an example implementation, the fifth antenna 230 may be a cuboidal cavity antenna and may have a length ‘L5’ of about 50 mm, a breadth ‘B’ of about 11 mm, and a height (not shown) of about 2.5 mm.
The electronic device 300 includes a third antenna 304. In an example implementation, the third antenna 304 is operable to transceive low band Wireless Wide Area Network (WWAN) signals and mid-band WWAN signals. In an example implementation, the third antenna 304 is identical to the third antenna 212 of
The electronic device 300 includes an RF front end circuitry 306 housed in the enclosure 302. In an example implementation, the RF front end circuitry 306 may be housed within a casing of a display panel of the electronic device 300. The high band WWAN main signal processor 104, the first WLAN signal processor 108, and the GPS signal processor 110 are included within the RF front end circuitry 306. The RF front end circuitry 306 further includes a low band WWAN main signal processor 308 and a mid-band WWAN main signal processor 310. In an example implementation, the low band WWAN main signal processor 308 is identical to the low band WWAN main signal processor 214 of
The RF front end circuitry 306 further includes a first diplexer 312. The first diplexer 312 couples the first WLAN signal processor 108 and the GPS signal processor 110 to the second antenna 104. In an example implementation, the first diplexer 312 is identical to the first diplexer 204 of
The RF front end circuitry 306 further includes a second diplexer 314. The second diplexer 314 couples the low band WWAN main signal processor 308 and the mid-band WWAN main signal processor 310 to the third antenna 304. In an example implementation, the second diplexer 314 is identical to the second diplexer 218 of
In an example implementation, the RF front end circuitry 306 may further include a WWAN auxiliary signal processor (not shown in
An exploded view of the enclosure 402 is shown in
The enclosure 402 includes a third antenna 406. In an example implementation, the third antenna 406 is operable to transceive low band Wireless Wide Area Network (WWAN) signals and mid-band WWAN signals. In an example implementation, the third antenna 406 is identical to the third antenna 212 of
As shown in
The enclosure 402 further includes a first diplexer 412. The first WLAN signal processor 108 and the GPS signal processor 110 is coupled to the second antenna 104 through the first diplexer 412. In an example implementation, the first diplexer 412 is identical to the first diplexer 204 of
The enclosure 402 further includes a second diplexer 414. The low band WWAN main signal processor 408 and the mid-band WWAN main signal processor 410 is coupled to the third antenna 406 through the second diplexer 414. In an example implementation, the second diplexer 414 is identical to the second diplexer 218 of
In an example implementation, the enclosure 402 may further include a WWAN auxiliary signal processor (not shown in
The enclosure 402 further includes two proximity sensors, 416 and 418. The proximity sensor 416 is referred to as a first proximity sensor 416 and the proximity sensor 418 is referred to as a second proximity sensor 418. The proximity sensors, 416 and 418 are arranged on the front side of the electronic device 400. As can be seen from
Although implementations of enclosures of electronic devices and electronic devices having such enclosures are described in language specific to methods and/or structural features, it is to be understood that the present subject matter is not limited to the specific methods or features described. Rather, the methods and specific features are disclosed and explained as example implementations of enclosures of electronic devices and electronic devices having such enclosures.
Number | Date | Country | Kind |
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62450858 | Jan 2017 | US | national |
Filing Document | Filing Date | Country | Kind |
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PCT/US2017/057184 | 10/18/2017 | WO | 00 |