Patent Application
20240222859
Various aspects of this disclosure relate to reducing and/or blocking electromagnetic interference between entities forming short-range wireless interconnections.
Metamaterials are artificial materials that are engineered to have properties which cannot not be found in nature. Generally, metamaterials being structures that are made by combining a number of smaller structures, which may be referred to as unit cell, in a repeating pattern. Each unit cell may interact with electromagnetic waves in a particular way. Through the interactions, the resulting material may provide certain properties which cannot be found in naturally occurring materials. Such properties may include negative refraction, superconductivity, and cloaking. Through such properties, metamaterials may control the flow of electromagnetic waves. For example, some metamaterials are designed to absorb electromagnetic waves, while others are designed to reflect them.
Metamaterials may be employed in a wide range of potential applications, in particular in technology areas including telecommunications and medicine. Metamaterials have been used to develop antennas with enhanced performance in long-range wireless communication. It may be desirable to employ metamaterials in short-range wireless communication to reduce electromagnetic interference. Particular applications may include wireless chip-to-chip communication or connectors.
In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the disclosure. In the following description, various aspects of the disclosure are described with reference to the following drawings, in which:
Artificial materials may be designed and used in consideration with specific properties, such that certain properties may be manipulated to provide or mimic the properties that are not found in naturally occurring materials. Such artificial materials may include engineered materials and/or metamaterials. In its broader representation, engineered materials can be any type of material that is intentionally designed and fabricated for a specific purpose. On the other hand, metamaterials are specifically designed to interact with electromagnetic waves, such as radio waves, microwaves, and light, in unusual ways. Metamaterials may usually include metallic or dielectric structures that are smaller than the wavelength of target electromagnetic waves, and they can be engineered to have negative refractive index, superconductivity, or other unusual properties.
In accordance with various aspects provided in this disclosure, interference reducing and/or blocking methods are provided via use of metamaterials. A metamaterial may form a surface that does not allow electric fields incident to the normal direction of the surface from a side to pass to the other side, at least partially. The surface may have an effective negative permeability, and accordingly may also be referred to as a “metasurface”. Such formed surface(s) may create an invisible vertical wall (e.g. when metamaterial, such as AMC structure lies in the horizontal plane, i.e. ground plane and metallic plate lie in the horizontal plane) without the physical form. The formed invisible vertical wall may reflect the incident electric fields, or may absorb by providing a “cloak” effect.
Some aspects provided herein may relate to the use of metamaterials in applications which require electromagnetic interference/radio frequency interference (EMI/RFI) shielding and/or improve isolation between electromagnetic radiators, which can be exemplified via use of a connector for data communication within this disclosure. Some aspects provided herein may relate to the use of metamaterials in wireless chip-to-chip communication. In some aspects, at least some of chips in exemplified structures may include radio frequency integrated circuits (RFICs). Through aspects provided herein, RFICs may be shielded against EMI/RFI.
Chip-to-chip communication relates to exchange of data between two or more integrated circuits or chips. Traditionally, chip-to-chip communication involved use of wired interconnects between chips, but with recent developments in respective technology areas, multiple chips in a device may communicate with each other via wireless chip-to-chip interconnects. Short-range wireless communication technologies, such as Wi-Fi, Bluetooth, Zigbee, NFC, may be used for communication. In various aspects, capacitive coupling may be used to convey data. In order to transmit signals using capacitive coupling, chips must be designed with the necessary capacitive coupling elements, such as metal pads, plates, or vias. When an electrical signal is applied to one of the chips, the electrical charges on the capacitive coupling elements will be accelerated, and the electrical signal is detected at the other chip through the electrical capacitive electromagnetic coupling between the two devices. Capacitive coupling may include several advantages over other methods of wireless chip-to-chip communication, such as the ability to support efficient broad operational bandwidth (e.g. more than 40% fractional bandwidth) and the ability to transmit high data throughputs (e.g. more than 150 Gbps for D-band case).
To meet the computational demands for today's application, chips or modules or chipsets that include and integrate multiple disaggregated resources are used. One way to increase the performance or power of a processor is to increase the computational elements or transistors on the processor. However, as the size of transistors has shrunk, the transistor doubling frequency noted in Moore's Law industry has decelerated, thereby limiting the usefulness of this strategy. One alternative to boost performance has been the use of aggregated heterogeneous chiplets.
Some aspects provided herein may include use of chiplets, some of which are in general applicable for chips or integrated circuits. As used herein, the term “chiplet” includes an integrated circuit block of a multichip module (MCM) or of MCM devices. A chiplet can be considered as a sub-processing unit or a disaggregated functional resource with a specialized function that is designed to integrate with other chiplets of a same multichip device or module. A chiplet may be fabricated on its own individual semiconductor die with physical dimensions that are often smaller than other chips or processors. The MCM unit provides interconnections of the chiplets so as to form complete electronic function(s).
In aspects of the disclosure, where appropriate, the term “die” may refer block of semiconductor material on which a component, e.g., a chip or chiplet is fabricated. In appropriate cases the term “die” may be used to refer to the integrated circuit fabricated from the semiconductor material (e.g., a chip, chiplet, etc.).
An MCM or MCM can be an electronic assembly that may be a single package including multiple components or modules or circuitries. In examples herein, an MCM can be a plurality of chiplets arranged in a single package including die-to-die interconnect schemes for connecting the chiplets. In such cases, the chiplets of an MCM can be integrated and mounted onto a unifying substrate, so that in use it can be treated as if it were a larger IC. The unifying substrate may be the package carrier or package carrier substrate. The chiplets (and possibly other components) of the MCM may also share a common encapsulation and a common integrated heat spreader (IHS).
An MCM may in some cases include components other than chiplets. That is, an MCM may include integrated devices with their own packaging, such as, for example, central processing units (CPUs), graphics processing units (GPUs), field programmable gate arrays (FPGA), etc. These such components with their own packaging can be arranged on a common substrate or base layer within relatively close proximity to each other in the MCM.
As used herein, “racks” or “rack enclosures” may be any type of equipment for housing electronic equipment. Racks house multiple types or sets of electronic equipment with an individual set of electronic equipment being housed within a single rack unit of the rack. Rack units of a rack may be stacked closely together, e.g., vertically in some cases. In aspects of the present disclosure, a rack unit may contain or hold one or more circuit boards or simply “boards”. Each board can include a plurality of electronic devices, e.g., chips, chiplets, one or more multichip devices mounted the board. A rack may include multiple rack units that may be enclosed or contained in a common frame structure or chassis.
As used herein, “an antenna” may be any type of radio antenna for transmission or reception of electromagnetic waves in a wireless communication relationship with a respective further antenna. An antenna may be an RF antenna configured to communicate with a further RF antenna via radio waves. An antenna may be a capacitive coupler configured to communicate with a further capacitive coupler via capacitive coupling principles. An antenna may be an inductive coupler configured to communicate with a further inductive coupler via inductive coupling principles.
The device 100 may include a base layer or a substrate 120 for mounting, on which the chiplets and other components can be mounted. In some cases, the substrate 120 may be a printed circuit board (PCB), including wired connections between the components, e.g., wired connections between the chiplets and wired connections for the resources 150a-b.
The device 100 of
Another architectural approach for increasing computational power is the use of 2.5 dimensional (2.5 D) packages. One example of a 2.5D package is shown in the device 200 of
An interposer is an electrical interface routing. For example, an interposer can provide interconnections between the components (e.g., chips, chiplets, etc.), as well as the external input/outputs (I/Os) through the use of through-substrate vias or through-silicon vias (TSV). Interposers can be silicon interposers that have lateral dimensions larger than the chips or components they are interconnecting.
Further, 2.5D package devices may also include bridges. For example, silicon bridges are a small piece of silicon that can be embedded under the edges of two components and provide interconnections therebetween. This can allow for most chips or components to be attached in multiple dimensions and thus eliminate additional physical constraints on heterogeneous chip attachment within the theoretical limits. In other words, an embedded multi-die interconnect bridge (EMIB) or bridges are essentially embedded into a standard packaging substrate and are used to provide high interconnect density exactly where needed, while the rest of a standard packaging substrate can be used for the rest of the interconnects.
Another architectural approach for improving devices is the use of three-dimensional (3D) stacking of semiconductor devices or components. The components (e.g., chips or chiplets) can be arranged in 3 dimensions instead of 2 dimensions. This allows the components of a device or module to be placed in closer proximity to one another.
The module device 300 of
3D heterogonous integrated devices may be built with a Manhattan-like architecture which includes large X-Y arrays of heterogeneous chiplets (e.g., CPU, GPU, AI, memory, etc.), and each chiplet can be positioned as on a chess board, having several stacked dies.
Nevertheless, the above-mentioned technologies do not scale well for massive 3D integration because the data rate per line may only be 2 to 10 Gbps. For example, referring to the wired interconnection approach for the device 300, no chiplets or components other than the lower two chiplets 310d and 310h have a direct connection. Therefore, if the chiplet 310a needs to connect and communicate with the chiplet 310f, the data path 330 would have to be one that extends through the TSVs 340 of the chiplets 310b-310d on the first stack, through the EMIB 330, and then through the TSVs 340 of the chiplets 310g and 310h before arriving at the chiplet 310f. Therefore, communication between chiplets would often require the use of many connections. The more and more components are added, thereby requiring communication with each other, the more the traffic in the TSVs, EMIBs, interposers, etc. increases. This increase in traffic presents problems in cases where high-transport data connections are needed.
For example, to create an aggregate data transport of 1 Tbps, 100 to 500 interconnect lines would be needed. While such data transports are possible for communication between neighboring chips, it would be physically and economically unfeasible to provide such data transports for larger integrations that involve hundreds of interconnect lines between horizontal and vertical stacked chips.
Further, the cost of a silicon interposer is proportional to the area of that interposer. So, in cases needing several or many localized high-density interconnects, the costs can quickly accumulate.
In short, TSV silicon interposers are relatively expensive and do not scale well for applications that require a massive number of components e.g., chiplets. Further, wires (interconnects) that connect together chips or chiplets degrade in performance with scaling. That is, wires can dominate the performance, functionality and power consumption of ICs.
The use of wireless Chip-to-Chip interconnects is an approach for realizing high-speed transport that would meet the requirements for high-performance computing products and applications. The wireless chip-to-chip (WC2C) technology can complement wired communications. WC2C can provide additional flexibility for high-performance computing products by enabling broadcast and multipoint-to-multipoint links with significant advantages for dynamically reconfigurable data-center networks.
The chiplets 510 can be stacked and mounted on a package substrate 520. To enable wireless connection, each chiplet or component can include an antenna (e.g., an antenna or antenna structure 515) and radio circuitry, e.g., transceiver circuitry 512. In addition, module 500 can include or provide wired communication between components. Similar to the module 300 of
WC2C communication may permit dense chiplet based products and supplement existing chip to chip communications, e.g., wired interconnections. As shown in the example of
According to aspects of the present disclosure, to implement WC2C communication, an MCM such as the module 500 may implement protocols that can be divided into a control plane and a data plane.
The data plane carries the network data (e.g., in-module data) in accordance with the directives of the control plane. That is, the data plane performs the actual forwarding of the data according to the configuration or routing paths managed and set forth by the control plane.
In at least some cases, the data plane of WC2C communications may operate with frequencies in the 110-170 GHz D-band using CMOS circuits with economical power efficiency. For example, in some aspects, the antennas may have approximately 1 mm of spacing. As CMOS technology continues to evolve and improve, higher frequencies, the reduction of the size and spacing of antenna elements, and higher bandwidths can be realized.
The modules implementing WC2C communication can include control plane capabilities. That is, to augment the above-mentioned high-speed wireless data links or the data plane, control plane capabilities or functionalities can be included in the modules. Control plane functions implemented using wireless control signaling can establish the wireless data connections described herein. The control plane protocols can be used to establish wireless connections within a module or package and further to define routing paths for the data. For example, industry protocols, including Wi-Fi, I2C, USB, and/or other known protocol are possible.
Control plane messages or control signaling may be in the form of packets to inform other components where to forward data or data messages. In some aspects, the control plane messages of an MCM may be implemented by using frequencies that differ from the data or data plane messages to manage and configure network data or data being transmitted to and from the components of a multichip device. In some cases, the messages may be implemented in a package-to-package type of communication scheme. For example, as described herein, a multichip device may include components that have their own individual packaging. (This is in contrast to an MCM of chiplets which may be packaged together (e.g., the dies of the chiplets share a common package)). In such cases, the multichip device may include wireless package-to-package communications. This is the scenario of
The control plane may manage communication not only for traffic within a multichip package (also denoted as in-package communication), but also may manage the communication between modules or packages e.g., MCMs or packages. This type of communication may be considered as wireless package-to-package communications. Furthermore, the control plane may be used for facilitating board-to-board communications in
In aspects of the present disclosure, control plane circuitry can be provided in dies of an MCM and configured to provide control plane functions for a wireless communication network involving devices (e.g., MCMs), dies, and packages described herein. The control plane circuitry may operate or use, as an example sub-10 GHZ RF carrier technology to enable point-multipoint, broadcastable, full-duplex wireless control/manageability links for various scenarios, e.g., board-board, package-package, and chiplet-to-chiplet within a package, type communications. Control signaling may be in the form of packets reflecting any suitable type of control plane protocol. The control plane circuitry may be integrated in an application-specific manner in a module. Components of the control plane circuitry such as the transceiver circuitry or the antenna structure may be integrated or incorporated with any part of an MCM described herein. Further, aspects or components of the control plane circuitry such as the antenna, connections, or waveguides, may also be included or incorporated into other components holding or involving MCMs, such as boards, chassis, racks, etc.
According to aspects of the present disclosure, sub-10 GHz technology may be used for control signaling. Operation at sub-10 GHz can allow for process portability and easy adoption of the radio frequency (RF) transceiver and may use near-field couplers/antennas. The flexibility of an RF link can allow convenient placement and use within a product chassis, from rack-unit-to-rack-unit, and for 3D heterogeneously integrated semiconductor products. For example, in at least some aspect of the present disclosure, control signaling bit rates may be in the range of 0.5-2 Gbps over distances up to 20 cm, supporting both symmetric and asymmetric topologies. The distance may decrease with increasing frequency, e.g., for a frequency of up to about 100 GHZ the distance may be in the range of about 1 cm.
For the WC2C communications, both the data plane and control plane require the use of a RF circuitry.
The radio circuitry 910 may include an RF integrated circuit (IC) 920 including one or more RF transceivers (TRX) and a common RF front end (FE) 930. The RF IC 920 may receive one or more data and control signals (also denoted as signal of the control plane of the OSI model) and operate to receive a communication signal from the baseband IC and generate an RF electrical signal from the communication signal for radio transmission from the circuitry 900 or receive an RF electrical signal and generate a communication signal from the RF electrical signal for providing to the baseband IC. The RF FE 930 may convert an RF electrical signal into a format for transmission via the antenna 940 and/or convert a signal received from the antenna 940 into an RF electrical signal for the RF IC 920.
The RF FE 930 of at least
The other components 1180 may include logic components, modulation/demodulation elements, and an interface circuitry for interfacing with another component.
DFE (digital front end) components may include any suitable number and/or type of components configured to perform functions known to be associated with digital front ends. This may include digital processing circuitry, portions of processing circuitry, one or more portions of an on-board chiplet having dedicated digital front end functionality (e.g., a digital signal processor), etc. The DFE components may selectively perform specific functions based upon the operating mode of the radio circuitry 910 and, for example, may facilitate beamforming. Digital front end components may also include other components associated with data transmission such as, for instance, transmitter impairment correction such as LO correction, DC offset correction, IQ imbalance correction, and ADC skew, digital pre-distortion (DPD) calculation, correction factor (CF) calculation, and pre-emphasis (pre. emp.) calculation. To provide additional examples, the digital front end components 1180 may facilitate or perform receiver or transmitter digital gain control (DGC), up-sampling, down-sampling, zero crossing detection algorithms, phase modulation, perform beam management, digital blocker cancellation, received signal strength indicator (RSSI) measurements, DPD and calibration accelerators, test signal generation, etc.
In at least one example, the transceiver chain (of the RF IC 920) can include a receive signal path which may include mixer circuitry 1110, amplifier circuitry 1140 and filter circuitry 1130. In some aspects, the transmit signal path of the transceiver chain 920 may include filter circuitry 1130 and mixer circuitry 1110. The transceiver chain 920 may also include synthesizer circuitry 1120 for synthesizing a frequency signal for use by the mixer circuitry 1110 of the receive signal path and the transmit signal path. In some aspects, the mixer circuitry 1110 of the receive signal path may be configured to down-convert RF signals received from the RF FE 930 based on the synthesized frequency provided by synthesizer circuitry 1120.
In some aspects, the output baseband signals and the input baseband signals may be digital baseband signals. In such aspects, the radio circuitry 910 may include analog-to-digital converter (ADC) 1150 and digital-to-analog converter (DAC) circuitry 1160.
In at least one example, the transceiver chain 920 may also include a transmit signal path (Tx path) which may include circuitry to up-convert baseband signals provided by e.g., a modem and provide RF output signals to the RF FE 930 for transmission. In some aspects, the receive signal path may include mixer circuitry 1110, amplifier circuitry 1140 and filter circuitry 1130. In some aspects, the transmit signal path of the RFIC 920 may include filter circuitry 1130 and mixer circuitry 1110. The RFIC 920 may include synthesizer circuitry 1120 for synthesizing a frequency signal for use by the mixer circuitry 1110 of the receive signal path and the transmit signal path. The mixer circuitry 1110 of the receive signal path may be configured to down-convert RF signals received from the RF FE 930 based on the synthesized frequency provided by synthesizer circuitry 1120.
In various aspects, amplifier circuitry 1140 may be configured to amplify the down-converted signals and filter circuitry may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to another component for further processing. In some aspects, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement.
The mixer circuitry 1110 for a receive signal path may include passive mixers, although the scope of this disclosure is not limited in this respect. In some aspects, the mixer circuitry 1110 for a transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 1120 to generate RF output signals for the RF FE 930.
In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and upconversion, respectively. In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 may be arranged for direct downconversion and direct upconversion, respectively. In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 of the transmit signal path may be configured for super-heterodyne operation.
In some aspects, the synthesizer circuitry 1120 may be a fractional-N synthesizer or a fractional N/N+1 synthesizer, although the scope of the aspects is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 1120 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.
The synthesizer circuitry 1120 may be configured to synthesize an output frequency for use by the mixer circuitry 1110 of the radio circuitry 1120 based on a frequency input and a divider control input. In some aspects, the synthesizer circuitry 1120 may be a fractional N/N+1 synthesizer.
In some aspects, frequency input may be provided by a voltage-controlled oscillator (VCO), although that is not a requirement. In various cases, divider control input may be provided by a processing component of the RFIC 920, or may be provided by any suitable component. In some aspects, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by external component.
In some aspects, synthesizer circuitry 1120 of the RFIC 920 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some aspects, the divider may be a dual modulus divider (DMD), and the phase accumulator may be a digital phase accumulator (DPA). In some aspects, the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry out) to provide a fractional division ratio. In some aspects, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. The delay elements may be configured to break a VCO period up into No equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
In some aspects, synthesizer circuitry 1120 may be configured to generate a carrier frequency as the output frequency, while in other aspects, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some aspects, the output frequency may be a LO frequency (fLO). In some aspects, the RFIC 920 may include an IQ/polar converter.
The antenna 940, illustrated in
In other cases, the antenna 940 may be one or more antennas to be used as transmit and receive antennas. In such cases, the RF FE 930 may include, for example, a duplexer, to separate transmitted signals from received signals.
While the transceivers described herein include traditional super-heterodyning schemes or architectures, other type of transceiver or transmitter architectures and schemes may be used. In some aspects, the transceiver chain of the RFIC 920 may include components so as to implement a near zero IF scheme, a Direct Conversion scheme, or a digital transmission scheme, such as, for example, a Digital IQ transmission, a Digital Polar transmission, and the like.
In one example, the transceiver chain of the RFIC 920 may include a transmit path that includes or implements a direct digital transmitter (DDT). That is, in one simple example, a DDT may include a digital signal processor, a RF digital-to-analog converter (RFDAC), a PA, and a RF filter/antenna coupler. Referring back to
For example, a DDT may be implemented with or without an IQ-mixer. In general, a RF-DAC may be included on a RFIC to convert digital input into a RF signal. A DDT may include other digital components such as numerically controlled oscillator (NCO) and digital mixers for shifting an input signal to desired frequency. The use of a DDT can reduces the number of analog components needed in the transmitter or transmit path. For example, analog LOs, analog filters, analog mixers, and etc., may be eliminated from the RFIC when a direct digital transmitter (DDT) is employed. Further, the use of a digital transmitter or digital transmission schemes such may bring energy savings and efficiencies.
However, wireless vertical chip-to-chip interconnects may have interference challenges when multiple adjacent chips are transmitting and receiving data simultaneously. Various potential solutions including interference cancellation techniques, orthogonal polarizations/modes, and stub with impedance loading have been proposed, but these solutions may remain effective for small-size systems, e.g., 2 antennas/couplers, and they do not scale to large-size systems with many antennas/couplers in proximity. Thus, people considered blocking the interferences by surrounding vertical metallic walls.
However, such physical structures that would reduce or prevent thermal flow by reducing the size of the space provided between substrates. Given that large-scale systems often suffer from thermal challenges due to the large number of chips, the vertical metallic walls not only block electromagnetic interferences, but also adversely impact overall thermal performance (e.g., increased system pressure drop, reduced air flow rates). It may be desirable to reduce EM interference while allowing thermal flow of air or fluid cooling via employment of metamaterials. The proposed solution can immediately scale to large-size computing systems with N×M antennas (antennas or couplers).
During operation, assuming that there is an EM wave source (e.g. an antenna) at the left-hand side of the figure causing EM-waves flow from left hand side to the right-hand side, in section 1510 of the space, EM waves flow towards the section 1520 of the space. Section 1520 of the space represents the section of the space interacted by the metamaterial 1503. The metamaterial 1503 may form a surface with effective negative permeability, causing electric fields to be absorbed (or reflected back). The section 1520 is referred to as “invisible vertical wall” indicating that a formed metasurface is provided between the second substrate 1502 and the metamaterial 1503 such that formed metasurface does not allow electric fields incident from the left-hand side to be passed to the right-hand side at the section 1520. On the other hand, the thermal flow may not be interrupted/reduced, and the cooling material (e.g. air or cooling liquid) may still flow at the section 1520.
Considering that the communication between entities of neighboring substrates is in vertical direction (i.e. each antenna has a desired Tx/Rx direction vertically), a substrate (e.g. the substrate 1501) may include an antenna, and the metamaterial 1503 may be provided such that it surrounds (i.e. encircles or enclose on one or both sides) the antenna.
Various aspects provided in this disclosure may relate to the above conceptual application. In a more concrete way, such metamaterial may be provided to block transition of electric fields for a particular volume which the interference may be an issue, while allowing the flow of the cooling material is expected within the particular volume.
First chips provided on a surface of a first substrate 1601, which the surface is facing a surface of the second substrate 1602. The second substrate 1602 includes second chips provided on the surface of the second substrate 1602. At least one or two of the first chips may communicate with the at least one or two of the second chips via wireless interconnects. In this illustration, each of the first chips may communicate with a respective chip of the second chips. Each first chip and each second chip include a communication element such as an antenna or a coupler. The antennas of chips facing each other (i.e. a first chip and a second chip) may form a short-range wireless interconnection, via short-range wireless communication technologies, such as Bluetooth, Zigbee, Wi-Fi, NFC, capacitive coupling, etc.
In this illustrative example, the first substrate 1601 includes a first chip 1611 and a second chip 1612. The second substrate 1602 includes a first chip 1621 and a second chip 1622. The first chip 1611 of the first substrate 1601 may communicate with the first chip 1621 of the second substrate 1602 via a first short-range wireless interconnect. Similarly, the second chip 1612 of the first substrate 1601 may communicate with the second chip 1622 of the second substrate 1602 via a second short-range wireless interconnect.
In some examples, the multi-chip system may be a multi-chip system of a communication device. Exemplarily, the first chip 1611 and the second chip 1612 of the first substrate 1601 may include RFICs respectively. The first chip 1621 and the second chip 1622 of the second substrate 1602 may include chips configured to communicate with the RFICs respectively. Exemplarily, the first chip 1621 and the second chip 1622 of the second substrate 1602 may include baseband processors respectively to communicate with respective RFICs.
The transmitted electromagnetic waves from the antennas may excite a rectangular waveguide mode between the neighboring substrates and inside metallic enclosure. Most likely, the dominant waveguide mode would be the transverse electric (TE) mode between neighboring substrates and inside metallic enclosure due to the boundary conditions imposed by many metallic patterns on a substrate as well as four metallic surfaces of enclosure. For rectangular TE mode, electric fields are vertically oriented (Z-axis). In local areas in-between antennas, both vertically and horizontally-oriented electric fields can exist due to relatively short separation distance between them (i.e. near field region or radiating near-field region), although vertically-oriented electric fields can be still dominant. Hence, some aspects provided in this disclosure includes enabling innovative engineering material to cancel vertically-oriented electrical field interference.
Similarly, considering vector electromagnetic fields on the GMC 1751, which the vectors are illustrated above the GMC 1751 in the real field, their corresponding fictitious image fields are depicted as well below the GMC 1751. Magnetic fields parallel to GMC 1751 and electric fields perpendicular to GMC 1751 are cancelled out. Basically, GMC 1751 and GEC 1701 are in dual relationship of electric field and magnetic field.
The GMC 1751 is a material that exhibits effective negative permeability over a wide frequency range, but GMC 1751 does not exist in nature because there are no free-moving magnetic charges. Thus, metamaterials are developed that mimics the properties of a GMC, namely by exhibiting effective negative permeability by using engineered material technology. One particular example of such metamaterials is artificial magnetic conductors (AMCs). The AMC may exhibit effective negative permeability within a particular frequency range and is often implemented with array of engineered-material unit cells. Each unit cell may form a surface that exhibit effective negative permeability, which the size and orientation of the surface may be based on the dimension and placement of the unit cell.
It is to be noted that permeability, in EM context, refers to the ability of a material to support the strength of a magnetic field within it. The effective negative permeability of a material is a measure of the overall magnetic response of the material, taking into account both the intrinsic permeability of the material and any effects of external factors, such as the presence of other materials or the shape of the object. Accordingly, considering the forming of a surface with effective negative permeability, effective negative permeability refers to the overall magnetic response of the material, taking into account both intrinsic and external factors.
The further substrate 1802 may also include a first antenna 1821 and a second antenna 1822. The first antenna 1811 of the substrate 1801 may be configured to form a first short range wireless interconnect with the first antenna 1821 of the further substrate 1802. The second antenna 1812 of the substrate 1801 may be configured to form a second short range wireless interconnect with the second antenna 1822 of the further substrate 1802.
In particular within the context of wireless chip-to-chip communication, each substrate may correspond to a substrate of a board of a multi-chip system. Accordingly, each substrate may further include multiple chips (chiplets, ICs). Within this particular context, the substrate 1801 may include a first chip coupled to a first RF circuit that is coupled to the first antenna 1811, a second chip coupled to a second RF circuit that is coupled to the second antenna 1812. Similarly, the further substrate 1802 may include a first chip coupled to a first RF circuit that is coupled to the first antenna 1821, a second chip coupled to a second RF circuit that is coupled to the second antenna 1822.
Accordingly, the first short range wireless interconnect provides communication between the first chip of the substrate 1801 and the first chip of the further substrate 1802. The second short range wireless interconnect provides communication between the second chip of the substrate 1801 and the second chip of the further substrate 1802. It is to be noted that the respective interconnects may also provide a board-level communication from multiple chips of one substrate to multiple chips of another substrate.
During operation, EM waves are to be emitted for the first short range wireless interconnect and further EM waves are to be emitted for the second short range wireless interconnect, which cause interference with each other. The substrate 1801 may include a structure 1815 (i.e. a metamaterial) that is configured to exhibit effective negative permeability within the space between the first antenna 1811 and the second antenna 1812. The structure may form a surface within the space between the substrate 1801 and the further substrate 1802 for an established short range wireless interconnection of the first short range wireless interconnect and the second short range wireless interconnect. The formed surface may mimic boundary conditions of a GMC by not allowing electric fields, at least partially, to pass from one side of the surface to the other side of the surface. In particular normal components of the electric fields with respect to the surface are not allowed to pass from incident side to the other side.
The structure 1815 may exemplarily be an AMC and further details for the structure are provided within this disclosure. The structure 1815 may accordingly include a unit cell array of engineered materials including a plurality of unit cells disposed as an array. Each unit cell may be modelled as forming a surface at a boundary of the unit cell extending from the plane of the unit cell perpendicularly, which the surface may exhibit effective negative permeability. In this illustration, assuming each unit cell includes a ground plane along x-y plane, and a metal plane at x-y plane, an invisible three dimensional wall is provided, defined by the formed surfaces.
In some aspects, the first antenna 1811 may be surrounded by the structure 1815 at a plane along x-y axis (“x-y plane”). In other words, the structure 1815 may encircle the first antenna 1811 at x-y plane. As the first antenna 1811 is configured to communicate with the first antenna 1821 of the further substrate 1802, the encirclement may reduce interference at x-y axis.
Naturally, orientation and size of the formed surface(s) are dependent to the properties of the structure 1815 and some examples are provided in this disclosure for an AMC structure. Exemplarily, the structure 1815 may form one or more surfaces within the space, that are depicted as “formed surface(s)” in the illustration. The formed surface(s) may be at x-y plane (i.e. boundary conditions of GMC at a surface lying at x-y plane).
Exemplarily, the antennas provided herein may be capacitive couplers. Accordingly, the first antenna 1911 and the first antenna 1921 may be configured to perform data communication through capacitive coupling. Similarly, the second antenna 1912 and the second antenna 1922 may be configured to perform data communication through capacitive coupling. The configuration of the antennas may include alignment of the respective antennas at x-y plane for forming wireless interconnects, with a distance in-between along the space between the first substrate 1901 and the second substrate 1902. The space further provides thermal cooling via cooling material between the substrates, which may be air or cooling fluid, which is depicted as thermal flow.
In this illustrative example, when the first antenna 1911 of the first substrate 1901 radiates, EM waves do not only leak to the adjacent second antenna 1912 of the first substrate 1901, but also leaks to the second antenna 1922 of the second substrate 1902. If an AMC structure is placed on both up and down PCB/package substrates, the interference from the first antenna 1911 of the first substrate 1901 to the second antenna 1912 of the first substrate 1901, and the second antenna 1922 of the second substrate 1902 can be blocked by “an invisible vertical wall” which was created from two AMC structures.
A first AMC structure 1931 is provided between the first antenna 1911 and the second antenna 1912 of the first substrate 1901. The first AMC structure 1931 may form AMC surface(s) within the space. A second AMC structure 1932 is provided between the first antenna 1921 and the second antenna 1922 of the second substrate 1902. The second AMC structure 1932 may form further AMC surface(s) within the space. An AMC surface is designed to mimic the behavior of a GMC by reflecting electromagnetic waves in a specific frequency range. The specific frequency range includes the frequency of communication signals which the first short range wireless interconnect and/or the second short range wireless interconnect carry.
Through the formed AMC surfaces within the space, a “so called” invisible vertical wall 1930 is formed between the first AMC structure 1931 and the second AMC structure within the space which does not allow electric fields to pass from right hand side to the left-hand side in this illustration and vice versa. In other words, the formed AMC surfaces may cancel electric fields of EM waves normal to the formed AMC surfaces, at least partially (i.e. normal component incident to the formed surfaces), emitted by the first antenna 1911 of the first substrate 1901 or the first antenna 1921 of the second substrate 1902. Similarly, the formed AMC surfaces may cancel electric fields of EM waves normal to the formed AMC surfaces, at least partially (i.e. normal component incident to the formed surfaces), emitted by the second antenna 1912 of the first substrate 1901 or the second antenna 1922 of the second substrate 1901.
In a local volume of an antenna, angle between electric and magnetic fields changes with a propagation distance within the proximity of the antenna, i.e. near-field or radiating near-field region. Fields are not parallel or perpendicular to the substrates. Thus, both vertically and horizontally-oriented electric fields can exist, although vertically-oriented electric field is still dominant for capacitive coupling. In some situation, mix of good electric conductor (GEC) and AMC structure implemented with engineered material block the fields more effectively.
For these aspects, the characteristics of a GEC depends on operational frequency (i.e. frequency of communication signals carried by interconnects). For <<1 GHZ, 1×10{circumflex over ( )}6 S/m can be considered as a good electric conductivity while >1×10{circumflex over ( )}7 S/m can be considered as a good electric conductivity above 1 GHZ.
Exemplarily, the antennas provided herein may be capacitive couplers. Accordingly, the first antenna 2011 and the first antenna 2021 may be configured to perform data communication through capacitive coupling. Similarly, the second antenna 2012 and the second antenna 2022 may be configured to perform data communication through capacitive coupling. The configuration of the antennas may include alignment of the respective antennas at x-y plane for forming wireless interconnects, with a distance in-between along the space between the first substrate 2001 and the second substrate 2002. The space further provides thermal cooling via cooling material between the substrates, which may be air or cooling fluid, which is depicted as thermal flow.
A first AMC structure 2031 is provided between the first antenna 2011 and the second antenna 2012 of the first substrate 2001. The first AMC structure 2031 may form invisible vertical wall within the space. A second AMC structure 2032 is provided between the first antenna 2021 and the second antenna 2022 of the second substrate 2002. The second AMC structure 2032 may form further invisible vertical wall within the space. An AMC surface is designed to mimic the behavior of a GMC by reflecting electromagnetic waves in a specific frequency range. The specific frequency range includes the frequency of communication signals which the first short range wireless interconnect and/or the second short range wireless interconnect carry.
Typically, the height of formed invisible vertical wall (i.e. z-axis) is less than a quarter wavelength for a single AMC structure (on x-y plane). Considering AMC structures on both substrates, as exemplified in
Structures provided in this disclosure that may form a surface exhibiting effective negative permeability (e.g. AMC structures) may be provided via employment of an array of unit cells of engineered materials, which are basic repeating elements of the metamaterial. Each unit cell is typically composed of a number of metallic elements or weak resonant structure that are arranged in a specific pattern to produce the desired electromagnetic response. The unit cells are typically arranged in a periodic fashion. The unit cells may operate by resonating at specific frequencies, which may allow them to absorb or reflect electromagnetic waves. The specific resonant frequencies of the unit cells depend on their size, shape, and material properties.
Centered vias have been generally in use due to the preferred isotropic material property in x-y plane. However, when the size of the unit cell becomes 1/10 or smaller than the wavelength, the property of the small unit cell shows quasi-isotropic material property.
The unit cell further includes an offset via 2204 to maximize the miniaturization of the unit cell. The offset via 2204 connecting the metallic plate 2202 to the ground plane 2201 connects to the metallic plate 2202 at an edge of the metallic plate 2202 instead of its center. In some aspects, the offset via 2204 may connect to the metallic plate at a corner of the metallic plate 2202.
The volume of the unit cell with off-centered via can further be scaled down by factor of 1√{square root over (εr2μr2)} when magneto-dielectric material 2253 is used between the metallic plate 2252 and the ground plane 2251. Here, εr2 denotes the relative permittivity of the magneto-dielectric material 2253 and μr2 denotes the relative permeability of the magneto-dielectric material 2253. Both relative permittivity and relative permeability would be greater than 1. It is to be noted that, magneto-dielectric material loading can be applied to other known unit-cell structures of engineered material, as well.
The input impedance of the substrate (e.g. PCB or package) 2301 (Zin, 1) should be equal to input impedance of the substrate of AMC structure (Zin, 2) 2302 to avoid the reflections at the boundaries. Then, the condition to match impedance may be found as below, εr1 representing the relative permittivity of the substrate 2301 and εr2 and μr2 representing the relative permittivity and the relative permeability of the magneto-dielectric substrate of the AMC structure 2302 respectively:
For example, if relative permittivity of the substrate 2301 is 4, relative permittivity and relative permeability of the magneto-dielectric substrate of the AMC structure 2302 are 2 and 8, respectively. The expected volume scaling factor of AMC structure 2302 is 4. Equivalent miniaturization can be achieved by only using a dielectric material with relative permittivity=16, but it often ends up with narrower operational bandwidth (stop-band bandwidth) of the AMC structure 2302 due to high-Q nature of the high relative-permittivity material. In this sense, the preferred miniaturization approach would be using the substrate 2301 (PCB or package) with a lower relative permittivity to maximize scale-down factor as well as operational bandwidth of the AMC structure 2302 with magneto-dielectric substrate.
Operational bandwidth (stop-band bandwidth) of the unit cell provided in accordance with
Although many aspects provided herein with an exemplary application to wireless chip-to-chip communication technology, these aspects may also be applicable to similar structures including multiple antennas or couplers disposed on facing substrates and forming short range wireless interconnects for data communication. One particular example may include connectors, as they also require EMI/RFI shielding and/or improve isolation between electromagnetic radiators.
Traditionally, a connector (e.g. universal serial bus (USB) connector) may be a plug or a receptacle. A plug may be plugged into a receptacle on a device to establish connection via the connector by forming wired interconnections. Generally, dust can build up over time inside the plug and/or receptacle affecting the performance of the wired interconnects. In addition, wired interconnect approach may not be a water-proof configuration. It may be desirable to provide a connector at which the plug and the receptacle can exchange data over short range wireless interconnects. Exemplary AMC and similar structures provided herein may be used to block EM wave leakage which may also bring potential security breach challenge.
Data communication circuits may be wireless circuitry as provided with respect to
The plug 3101 may further include at least one AMC structure to reduce and/or block EM leakage from wireless interconnects to the outside of the space. In various aspects, one or more AMC structures may encircle each capacitive coupler of the plug 3101 at the first surface. In some aspects, one or more AMC structures may encircle the first surface of the first substrate. In some aspects, at least one AMC structure may be provided between a first coupler of the one or more capacitive couplers of the plug 3101 and a second coupler of the one or more capacitive couplers of the plug 3101 to reduce interference. The device including the receptacle 3102 may exemplarily be a computer.
The detailed description refers to the accompanying drawings that show, by way of illustration, specific details and aspects of this disclosure in which the disclosure may be practiced. Other aspects may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the disclosure. The various aspects of this disclosure are not necessarily mutually exclusive, as some aspects of this disclosure can be combined with one or more other aspects of this disclosure to form new aspects.
The word “exemplary” is used herein to mean “serving as an example, instance, or illustration”. Any aspect of the disclosure or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs.
Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures, unless otherwise noted.
The terms “at least one” and “one or more” may be understood to include a numerical quantity greater than or equal to one (e.g., one, two, three, four, [ . . . ], etc.). The term “a plurality” may be understood to include a numerical quantity greater than or equal to two (e.g., two, three, four, five, [ . . . ], etc.).
The phrase “at least one of” with regard to a group of elements may be used herein to mean at least one element from the group consisting of the elements. For example, the phrase “at least one of” with regard to a group of elements may be used herein to mean a selection of: one of the listed elements, a plurality of one of the listed elements, a plurality of individual listed elements, or a plurality of a multiple of individual listed elements.
The words “plural” and “multiple” in the description and in the claims expressly refer to a quantity greater than one. Accordingly, any phrases explicitly invoking the aforementioned words (e.g., “plural [elements]”, “multiple [elements]”) referring to a quantity of elements expressly refers to more than one of the said elements. The terms “group (of)”, “set (of)”, “collection (of)”, “series (of)”, “sequence (of)”, “grouping (of)”, etc., and the like in the description and in the claims, if any, refer to a quantity equal to or greater than one, i.e., one or more. The terms “proper subset”, “reduced subset”, and “lesser subset” refer to a subset of a set that is not equal to the set, illustratively, referring to a subset of a set that contains less elements than the set.
The term “data” as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term “data” may also be used to mean a reference to information, e.g., in form of a pointer. The term “data”, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art.
The terms “processor” or “controller” as, for example, used herein may be understood as any kind of technological entity that allows handling of data. The data may be handled according to one or more specific functions executed by the processor or controller. Further, a processor or controller as used herein may be understood as any kind of circuit, e.g., any kind of analog or digital circuit. A processor or a controller may thus be or include an analog circuit, digital circuit, mixed-signal circuit, logic circuit, processor, microprocessor, Central Processing Unit (CPU), Graphics Processing Unit (GPU), Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA), integrated circuit, Application Specific Integrated Circuit (ASIC), etc., or any combination thereof. Any other kind of implementation of the respective functions, which will be described below in further detail, may also be understood as a processor, controller, or logic circuit. It is understood that any two (or more) of the processors, controllers, or logic circuits detailed herein may be realized as a single entity with equivalent functionality or the like, and conversely that any single processor, controller, or logic circuit detailed herein may be realized as two (or more) separate entities with equivalent functionality or the like.
As used herein, “memory” is understood as a computer-readable medium in which data or information can be stored for retrieval. References to “memory” included herein may thus be understood as referring to volatile or non-volatile memory, including random access memory (RAM), read-only memory (ROM), flash memory, solid-state storage, magnetic tape, hard disk drive, optical drive, among others, or any combination thereof. Registers, shift registers, processor registers, data buffers, among others, are also embraced herein by the term memory. The term “software” refers to any type of executable instruction, including firmware.
Unless explicitly specified, the term “transmit” encompasses both direct (point-to-point) and indirect transmission (via one or more intermediary points). Similarly, the term “receive” encompasses both direct and indirect reception. Furthermore, the terms “transmit,” “receive,” “communicate,” and other similar terms encompass both physical transmission (e.g., the transmission of radio signals) and logical transmission (e.g., the transmission of digital data over a logical software-level connection). For example, a processor or controller may transmit or receive data over a software-level connection with another processor or controller in the form of radio signals, where the physical transmission and reception is handled by radio-layer components such as RF transceivers and antennas, and the logical transmission and reception over the software-level connection is performed by the processors or controllers. The term “communicate” encompasses one or both of transmitting and receiving, i.e., unidirectional or bidirectional communication in one or both of the incoming and outgoing directions. The term “calculate” encompasses both ‘direct’ calculations via a mathematical expression/formula/relationship and ‘indirect’ calculations via lookup or hash tables and other array indexing or searching operations.
The word “exemplary” is used herein to mean “serving as an example, instance, or illustration”. Any aspect or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs.
Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures, unless otherwise noted.
The phrase “at least one” and “one or more” may be understood to include a numerical quantity greater than or equal to one (e.g., one, two, three, four, [ . . . ], etc.). The phrase “at least one of” with regard to a group of elements may be used herein to mean at least one element from the group consisting of the elements. For example, the phrase “at least one of” with regard to a group of elements may be used herein to mean a selection of: one of the listed elements, a plurality of one of the listed elements, a plurality of individual listed elements, or a plurality of a multiple of individual listed elements.
The words “plural” and “multiple” in the description and in the claims expressly refer to a quantity greater than one. Accordingly, any phrases explicitly invoking the aforementioned words (e.g., “plural [elements]”, “multiple [elements]”) referring to a quantity of elements expressly refers to more than one of the said elements. For instance, the phrase “a plurality” may be understood to include a numerical quantity greater than or equal to two (e.g., two, three, four, five, [ . . . ], etc.).
The phrases “group (of)”, “set (of)”, “collection (of)”, “series (of)”, “sequence (of)”, “grouping (of)”, etc., in the description and in the claims, if any, refer to a quantity equal to or greater than one, i.e., one or more. The terms “proper subset”, “reduced subset”, and “lesser subset” refer to a subset of a set that is not equal to the set, illustratively, referring to a subset of a set that contains less elements than the set.
Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above.” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
As used herein, unless otherwise specified the use of the ordinal adjectives “first”, “second”, “third” etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.
The term “semiconductor substrate” is defined to mean any construction including semiconductor material, for example, a silicon substrate with or without an epitaxial layer, a silicon-on-insulator substrate containing a buried insulator layer, or a substrate with a silicon germanium layer. The term “integrated circuits” as used herein refers to electronic circuits having multiple individual circuit elements, such as transistors, diodes, resistors, capacitors, inductors, and other active and passive semiconductor devices.
The term “data” as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term “data” may also be used to mean a reference to information, e.g., in form of a pointer. The term “data”, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art.
As used herein, a signal that is “indicative of” a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and/or cause a responsive action in a component receiving the signal. The signal may be stored or buffered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium. Further, a “value” that is “indicative of” some quantity, state, or parameter may be physically embodied as a digital signal, an analog signal, or stored bits that encode or otherwise communicate the value.
As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase, amplitude, frequency, and so on. The signal may be referred to as the same signal even as such characteristics are adapted. In general, so long as a signal continues to encode the same information, the signal may be considered as the same signal. For example, a transmit signal may be considered as referring to the transmit signal in baseband, intermediate, and radio frequencies.
The terms “processor” or “controller” as, for example, used herein may be understood as any kind of technological entity that allows handling of data. The data may be handled according to one or more specific functions executed by the processor or controller. Further, a processor or controller as used herein may be understood as any kind of circuit, e.g., any kind of analog or digital circuit. A processor or a controller may thus be or include an analog circuit, digital circuit, mixed-signal circuit, logic circuit, processor, microprocessor, Central Processing Unit (CPU), Graphics Processing Unit (GPU), Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA), integrated circuit, Application Specific Integrated Circuit (ASIC), etc., or any combination thereof. Any other kind of implementation of the respective functions, which will be described below in further detail, may also be understood as a processor, controller, or logic circuit. It is understood that any two (or more) of the processors, controllers, or logic circuits detailed herein may be realized as a single entity with equivalent functionality or the like, and conversely that any single processor, controller, or logic circuit detailed herein may be realized as two (or more) separate entities with equivalent functionality or the like.
As utilized herein, terms “module”, “component,” “system,” “circuit,” “element,” “slice,” “circuitry,” and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution), and/or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an object, an executable program, a storage device, and/or a computer with a processing device. By way of illustration, an application running on a server and the server can also be circuitry. One or more circuits can reside within the same circuitry, and circuitry can be localized on one computer and/or distributed between two or more computers. A set of elements or a set of other circuits can be described herein, in which the term “set” can be interpreted as “one or more.”
As used herein, “memory” is understood as a computer-readable medium (e.g., a non-transitory computer-readable medium) in which data or information can be stored for retrieval. References to “memory” included herein may thus be understood as referring to volatile or non-volatile memory, including random access memory (RAM), read-only memory (ROM), flash memory, solid-state storage, magnetic tape, hard disk drive, optical drive, 3D Points, among others, or any combination thereof. Registers, shift registers, processor registers, data buffers, among others, are also embraced herein by the term memory. The term “software” refers to any type of executable instruction, including firmware.
The term “antenna” or “antenna structure”, as used herein, may include any suitable configuration, structure and/or arrangement of one or more antenna elements, components, units, assemblies and/or arrays. In some aspects, the antenna may implement transmit and receive functionalities using separate transmit and receive antenna elements. In some aspects, the antenna may implement transmit and receive functionalities using common and/or integrated transmit/receive elements. The antenna may include, for example, a phased array antenna, a single element antenna, a set of switched beam antennas, and/or the like.
It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be physically connected or coupled to the other element such that current and/or electromagnetic radiation (e.g., a signal) can flow along a conductive path formed by the elements. Intervening conductive, inductive, or capacitive elements may be present between the element and the other element when the elements are described as being coupled or connected to one another. Further, when coupled or connected to one another, one element may be capable of inducing a voltage or current flow or propagation of an electro-magnetic wave in the other element without physical contact or intervening components. Further, when a voltage, current, or signal is referred to as being “applied” to an element, the voltage, current, or signal may be conducted to the element by way of a physical connection or by way of capacitive, electro-magnetic, or inductive coupling that does not involve a physical connection.
Unless explicitly specified, the term “transmit” encompasses both direct (point-to-point) and indirect transmission (via one or more intermediary points). Similarly, the term “receive” encompasses both direct and indirect reception. Furthermore, the terms “transmit,” “receive,” “communicate,” and other similar terms encompass both physical transmission (e.g., the transmission of radio signals) and logical transmission (e.g., the transmission of digital data over a logical software-level connection). For example, a processor or controller may transmit or receive data over a software-level connection with another processor or controller in the form of radio signals, where the physical transmission and reception is handled by radio-layer components such as RF transceivers and antennas, and the logical transmission and reception over the software-level connection is performed by the processors or controllers. The term “communicate” encompasses one or both of transmitting and receiving, i.e., unidirectional or bidirectional communication in one or both of the incoming and outgoing directions. The term “calculate” encompasses both ‘direct’ calculations via a mathematical expression/formula/relationship and ‘indirect’ calculations via lookup or hash tables and other array indexing or searching operations.
The term “operatively connected” as used herein may describe a connection between two elements, such that a first element operates or functions using as input the output of a second element. According to an aspect of the disclosure, “operatively connected” may describe an electrically conductive connection. That is, two elements that are operatively connected as described herein may be electrically conductively connected such that an electric charge may travel from the first element to the second element.
In example 1, the subject matter includes an apparatus that may include: a substrate including: a first antenna configured to form a first short range wireless interconnection with a first antenna of a further substrate; a second antenna spaced apart from the first antenna, the second antenna is configured to form a second short range wireless interconnection with a second antenna of the further substrate; a metamaterial configured to form a surface with effective negative permeability the space is formed within a space between a surface of the substrate and a surface of the further substrate for an established short range wireless interconnection of the first short range wireless interconnection and the second short range wireless interconnection.
In example 2, the subject matter of example 1, can optionally include that the structure includes a unit cell array of engineered material may include a plurality of unit cells; can optionally include that each cell includes a ground plane with a surface area of a first size, a metal plane parallel to the ground plane with a surface area of a second size smaller than the first size, and the metal plane facing the surface of the second substrate and a unit cell gap may include dielectric material provided between the ground plane and the metal plane.
In example 3, the subject matter of example 2, can optionally include that at least one of the first size, the second size, or the properties of the dielectric material is based on frequency of RF communication signals carried by the first short range wireless interconnection.
In example 4, the subject matter of example 3, can optionally include that at least one of the first size, the second size, or the properties of the dielectric material is based on frequency of RF communication signals carried by the second short range wireless interconnection.
In example 5, the subject matter of any one of examples 2 to 4, can optionally include that each unit cell further includes a via connecting an edge of the metal plane with the ground plane.
In example 6, the subject matter of any one of examples 2 to 5, can optionally include that a resistive element is coupled between the metal plane of a first unit cell of the unit cell array and the metal plane of a second unit cell of the unit cell array neighboring the first unit cell.
In example 7, the subject matter of any one of examples 2 to 6, can optionally include that the unit cell gap material is magneto-dielectric material and the input impedances seen at a boundary between the unit cell array and the substrate are matched with each other.
In example 8, the subject matter of example 7, can optionally include that at least one of relative permittivity or relative permeability of the magneto-dielectric material is based on relative permittivity of the substrate.
In example 9, the subject matter of any one of examples 1 to 8, can optionally include that the formed surface includes an electromagnetic metasurface within the space between the first antenna and the second antenna, can optionally include that the electromagnetic metasurface is for a frequency band may include a frequency of RF communication signals transmitted over at least one of the first short range wireless interconnection or the second short range wireless interconnection.
In example 10, the subject matter of example 9, can optionally include that the electromagnetic metasurface reflects electric fields induced for at least one of the first short range wireless interconnection or the second short range wireless interconnection.
In example 11, the subject matter of any one of examples 1 to 10, can optionally include that the first antenna and/or the second antenna is surrounded by the structure at the surface.
In example 12, the subject matter of any one of examples 1 to 11, can optionally include that each of the first antenna and the second antenna includes an inductive coupler, a capacitive coupler, or an antenna.
In example 13, the subject matter of any one of examples 1 to 12, can optionally include that the substrate includes: a first chip may include the first antenna and a first RF circuit coupled to the first antenna; a second chip may include the second antenna and a second RF circuit coupled to the second antenna.
In example 14, the subject matter of example 13, further may include the further substrate may include the first antenna of the further substrate and the second antenna of the further substrate that is spaced apart from the first antenna of the further substrate.
In example 15, the subject matter of any one of examples 13 or 14, can optionally include that the structure is a first structure; can optionally include that the further substrate includes a second structure provided between the first antenna of the further substrate and the second antenna the further substrate.
In example 16, the subject matter of any one of examples 13 to 15, can optionally include that the further substrate structure includes a second structure may include a further unit cell array of engineered material may include a plurality of unit cells.
In example 17, the subject matter of any one of examples 13 to 15, can optionally include that the further substrate structure includes a good electric conductor having a conductivity more than 1×10{circumflex over ( )}6 S/m.
In example 18, the subject matter of any one of examples 13 to 17, further may include an intermediate structure provided within the space between the first structure and the second structure, the intermediate structure may include at least one of a third structure configured to form a surface with effective negative permeability or a further good electric conductor.
In example 19, the subject matter of any one of examples 13 to 18, can optionally include that the further substrate includes a third chip and a third RF circuit coupled to the first antenna of the second substrate, and a fourth chip and a fourth RF circuit coupled to the second antenna of the second substrate.
In example 20, the subject matter of example 19 can optionally include that the first short range wireless interconnection is to provide communication between the first chip and the third chip and the second short range wireless interconnection is to provide communication between the second chip and the fourth chip.
In example 21, the subject matter of any one of examples 1 to 12, can optionally include that the apparatus is configured to be fastened to a housing of an external device may include the further substrate, such that the first antenna of the substrate and the second antenna of the substrate facing the first antenna of the further substrate and the second antenna of the further substrate respectively.
In example 22, the subject matter of example 21, can optionally include that the first short range wireless interconnection and the second short range wireless interconnection are configured for a wireless data communication.
In example 23, the subject matter of example 21 or example 22, can optionally include that each the first antenna and the second antenna include a capacitive coupler.
In example 24, the subject matter of example 23, further may include: a coil shaped inductive coupler configured for wireless power transfer between the apparatus and a further coil shaped inductive coupler of the external device; can optionally include that sizes of the coil shaped inductive coupler and the further coil shaped inductive coupler are different.
In example 25, the subject matter of example 24, further may include: data communication circuitry; can optionally include that the coil shaped inductive coupler partially surrounds at least the data communication circuitry, the first antenna, and the second antenna.
In example 26, the subject matter of any one of examples 21 to 25, can optionally include that the substrate includes a reflector structure partially surrounding the first antenna and the second antenna.
In example 27, the subject matter of any one of examples 21 to 26, can optionally include that the substrate includes a packaging substrate and a PCB substrate; can optionally include that the first antenna and the second antenna are embedded in the packaging substrate via one of through silicon vias or through glass vias; can optionally include that the structure is provided on the PCB substrate.
In example 28, the subject matter of any one of examples 21 to 27, can optionally include that the apparatus is a universal serial bus (USB) connector apparatus.
In example 29, the subject matter of any one of examples 1 to 28, can optionally include that the apparatus further includes a metallic enclosure or a plastic enclosure enclosing at least the substrate.
In example 30, the subject matter of any one of examples 1 to 29, can optionally include that each of the substrate and the further substrate is one of a printed circuit board (PCB) substrate or a packaging substrate.
In example 31, an apparatus may include: a first substrate may include at a first surface: a first chip and a first antenna coupled to the first chip; a second chip and a second antenna coupled to the first chip, can optionally include that the second antenna is spaced apart from the first antenna; a second substrate may include a second surface facing the first surface with a space between the first surface and the second surface; a structure provided on the first surface between the first antenna and the second antenna, the structure is configured to form a surface with effective negative permeability within the space.
In example 32, the subject matter of example 31, can optionally include that the second substrate includes at the second surface: a third chip and a third antenna coupled to the third chip configured to communicate with the first chip via the third antenna and the first antenna; a fourth chip and a fourth antenna coupled to the fourth chip configured to communicate with the second chip via the fourth antenna and the second antenna, can optionally include that the fourth antenna is spaced apart from the third antenna.
In example 33, the subject matter of example 32, may further include any aspects provided in this disclosure, especially aspects in examples 1 to 29.
In example 33, a connector may include: a first substrate may include, at a first surface: a first coupler and a second coupler; a fastener configured to fasten the first substrate to a housing external to the connector, such that the first coupler and the second coupler of the first substrate faces a first external coupler and a second external coupler of a second substrate respectively, the second substrate is external to the connector and spaced apart with a space; at least one artificial magnetic conductor (AMC) structure disposed on the first surface, the AMC structure is configured to form an electromagnetic metasurface between the first substrate and the second substrate within the space.
In example 34, the subject matter of example 33, may further include any aspects provided in this disclosure, especially aspects in examples 1 to 29.
