Claims
- 1. A processing system comprising:
a central processing unit; a device peripheral bus; a plurality of peripheral modules coupled to the peripheral device bus, the peripheral modules generating status/event signals; an inter-module bus coupled to each of the modules; and an inter-module controller unit coupled to the peripheral modules, the inter-module control unit receiving at least one status/event signals from each module coupled thereto, the inter-module controller applying the status/event signals from each module to the inter-module bus, the inter-module bus applying status signals from other modules to each module.
- 2. The processing system as recited in claim 1 wherein each module includes a multiplexer, the multiplexer selecting a signal from the bus to be applied to the module.
- 3. The processing system as recited in claim 2, the inter-modular control unit including a logic “OR” gate, the logic “OR” gate having a plurality of input terminals, the same status/event signal generated by at least two instances of peripheral modules each being applied to an input terminal of the logic “OR” gate.
- 4. The processing system as recited in claim 3 wherein the output terminal of the logic “OR” gate is coupled to the input terminals of multiplexers in the modules not generating the status/event signals.
- 5. The processing system as recited in claim 3 wherein the modules are selected are interface modules receiving signals from sensors and encoder devices.
- 6. The processing system as recited in claim 5 wherein at least one of the modules is selected from the group consisting of an analog to digital converter module, an encoder interface module, an event manager module, and a capture module.
- 7. The processing system as recited in claim 6 wherein the signals applied to the modules are a series of pulses.
- 8. The processing system as recited in claim 7 wherein the inter-module control unit and the inter-module bus are used to coordinate activity between the modules.
- 9. In a data processing unit having a central processing unit, a device peripheral bus, and a plurality of modules coupled to the device peripheral bus; the modules generating status/event signals, an inter-module communication system comprising:
an inter-module bus for applying status/event signals to modules not generating the status/event signals; and an inter-module control unit receiving status/event signals from the modules, the inter-module control unit applying the status/event signals to the inter-module bus, wherein the same status/event signal generated by equivalent modules are transmitted by the inter-module bus on the same conducting path.
- 10. The inter-module communication system as recited in claim 9 wherein the inter-module control unit includes at least one logic “OR” gate, the same status/event signal generated by equivalent modules being applied to different terminals of a logic “OR” gate.
- 11. The inter-module communication system as recited in claim 10 wherein the output terminal of the logic “OR” gate is coupled to modules not generating the same status/event signal.
- 12. The inter-module communication system as recited in claim 11 wherein a plurality of status/event signals is applied to each module.
- 13. The inter-module communication system as recited in claim 12 wherein the exchange of signals among the modules provides coordination of activity among the modules.
- 14. The inter-module communication system as recited in claim 13 wherein the modules receive input signals from sensor/encoder devices that describe physical characteristics of external apparatus.
- 15. The inter-module communication system as recited in claim 14 wherein the modules wherein the input signals include trains of pulses.
- 16. A method for exchanging status/event signals among a plurality of modules, the method comprising:
in each module, generating at least one status/event signal; applying each status/event signal to a inter-module control unit; collecting the same status/event signals from equivalent modules; and distributing the status/event signals to the modules not generating the same status/event signals.
- 17. The method as recited in claim 16 further comprising selecting the status/event signal to be used by a module.
- 18. The method as recited in claim 17 wherein the collecting of the same status/event signals includes applying the same status/event signal to different terminals of a logic “OR” gate.
- 19. The method as recited in claim 18 wherein the selecting is implemented by applying the status/event signal to input terminals of a multiplexer and applying appropriate control signals to the control terminals of the multiplexer.
- 20. The method as recited in claim 19 wherein the generating of status/event signals includes generating a plurality of status/event signals in each module.
- 21. The method as recited in claim 20 further comprising the step of coordinating the activity of a plurality of modules by the distribution of status/event signals.
- 22. The method as recited in claim 21 wherein the status/event signals describe physical properties of an external apparatus.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Application No. 60/267,589 filed Feb. 9, 2001; U.S. Provisional Application No. 60/245,656 filed Nov. 2, 2000; and U.S. Provisional Application No. 60/255,253 filed Dec. 13, 2000.
[0002] U.S. patent application No. (Attorney Docket TI-32332) entitled “APPARATUS AND METHOD FOR A SIGNAL TRANSITION CAPTURE MODULE”, invented by Zhenyu Yu, filed on even date herewith, and assigned to the assignee of the present application; and U.S. patent application No. (Attorney Docket TI-32170) entitled “APPARATUS AND METHOD FOR AN ENCODER INTERFACE MODULE”, invented by Zhenyu Yu, filed on even date herewith, and assigned to the assignee of the present application are related applications.
Provisional Applications (3)
|
Number |
Date |
Country |
|
60267589 |
Feb 2001 |
US |
|
60245656 |
Nov 2000 |
US |
|
60255253 |
Dec 2000 |
US |