Patent Application
20070075780
This invention relates in general to Doherty amplifiers, and more specifically, to adaptive biasing of Doherty amplifiers.
A power amplifier should be able to linearly amplify Radio Frequency (RF) signals in an efficient manner. However, there is always some kind of tradeoff between efficiency and linearity. A type of power amplifier, called a Doherty amplifier, is more efficient than standard class AB and class B amplifiers. This advantage can be attributed to the load line of a carrier amplifier in a Doherty amplifier, which can be modulated instantaneously as the RF input level changes. In other words, Doherty amplifiers have a better tradeoff between maximum efficiency and high linearity because the amplifier's load line is continuously modified to maintain high efficiency as input drive levels change. Therefore, in order to achieve high efficiency linearity, the load line of a Doherty amplifier has to be dynamically modified with a change in the input. In other words, a Doherty amplifier should be adaptively biased.
A known method to adaptively bias a Doherty amplifier relies on changes in the gate or source bias current of the carrier amplifier as a way of measuring the RF input power to that device. Such a method is not effective in the case of metal oxide semiconductor field effect transistor (MOSFET) amplifier devices because such devices do not draw bias current at any RF drive level.
Another known method describes adaptive biasing based on changes in the input signal. However the adaptive biasing circuit is external to the chip on which the power amplifier is mounted and is too complex to be implemented on a chip. This makes the adaptive biasing slow to respond to the changes in the input signal. Moreover the adaptive biasing circuit does not perform adaptive biasing of the amplifier based on a change in an operating temperature of the amplifier.
Therefore a need exists for an adaptive bias circuit that is simple enough to be mounted on a same chip as a corresponding Doherty amplifier and that will perform adaptive biasing of the amplifier based on the input RF drive level.
The present invention is illustrated by way of example and not limitation in the accompanying figures, in which like references indicate similar elements, and in which:
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
Elements in the Figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the Figures may be exaggerated relative to other elements to help improve understanding of various embodiments of the present invention. Furthermore, the terms “first”, “second”, and the like herein, if any, are used inter alia for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. Any of the preceding terms so used may be interchanged under appropriate circumstances such that various embodiments of the invention described herein may be capable of operation in other configurations and/or orientations than those explicitly illustrated or otherwise described.
Before describing in detail the particular apparatus and method for adaptive biasing of a Doherty amplifier in accordance with the present invention, it should be observed that the present invention resides primarily in combinations of method steps and apparatus components related to apparatus and method for adaptive biasing of a Doherty amplifier. Accordingly, the apparatus components and method steps have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.
The invention describes an apparatus and method for adaptive biasing of an on-chip integrated LDMOS Doherty amplifier. The Doherty amplifier includes a carrier amplifier to amplify an in-phase signal and a peaking amplifier to amplify a quadrature phase signal. Different bias signals are provided to the carrier amplifier and the peaking amplifier by a carrier amplifier bias circuit and a peaking amplifier bias circuit respectively. The carrier amplifier bias circuit, which acts as a rectifying amplifier, is coupled to the carrier amplifier. Similarly, the peaking amplifier bias circuit, which acts as a difference amplifier, is coupled to the peaking amplifier and to the output of the carrier amplifier bias circuit. The carrier amplifier, the peaking amplifier, the carrier amplifier bias circuit and the peaking amplifier bias circuit are all integrated onto a single chip.
Based on the sampled in-phase signal 205, carrier amplifier bias circuit 208 produces a carrier amplifier bias input 207 comprising a carrier amplifier bias voltage that is applied to a gate terminal of the FET of the carrier amplifier 210 and further is applied to the peaking amplifier bias circuit 212. Based on the carrier amplifier bias voltage, peaking amplifier bias circuit 212 produces a peaking amplifier bias input 213 comprising a peaking amplifier bias voltage that is applied to a gate terminal of the FET of the peaking amplifier 214. The carrier amplifier 210, more particularly the FET of the carrier amplifier, amplifies the in-phase signal 204 based on the carrier amplifier bias input 207 to produce a first output signal 211. Similarly, the peaking amplifier 214, more particularly the FET of the peaking amplifier, amplifies the quadrature phase signal 206 based on the peaking amplifier bias input 213 to produce a second amplified signal 215. The first output signal 211 is applied as input to a combiner 216 as a first signal. The second output signal 215 is applied as input to the combiner 216 as a second signal. The combiner 216 combines the first signal 211 and the second signal 215 in phase to provide the output signal RFout.
The operation of the rectifying amplifier is as follows. The clamped FET 304 operates in a feedback environment. The external voltage Vgg 308 and the external resistor 310 set up a reference current for the clamped FET 304, which set the initial bias voltage to the radio frequency (RF) FET of the carrier amplifier 210. The clamped FET 304 rectifies the in-phase signal, sampled through resistor 302, which produces a DC (Direct Current) current through the FET 304 and thereby provides the carrier amplifier bias input 207. An increase in the magnitude of the RF input signal corresponds to an increase in the magnitude of the in-phase signal 204, resulting in an increase in the amount of rectification by the clamped FET 304 and thus increase in DC current through the FET 304. Hence an increase in the magnitude of the RF input signal corresponds to a decrease in the carrier amplifier bias voltage. Conversely, a decrease in the magnitude of the RF input signal corresponds to a decrease in the magnitude of the in-phase signal 204, resulting in a decrease in the amount of rectification by the clamped FET 304. Hence a decrease in the magnitude of the RF input signal corresponds to an increase in the carrier amplifier bias voltage.
The operation of the difference amplifier is as follows. The difference amplifier 402 is coupled to the output of the carrier amplifier bias circuit. The difference amplifier 402 subtracts the carrier amplifier bias voltage from a fixed external voltage Vgg5406 to produce the adaptive peaking amplifier bias input 213 that is applied to the gate of the FET of the peaking amplifier 214. This ensures an increasing gate bias voltage to the peaking amplifier 214 when the gate bias voltage of the carrier amplifier 210 is decreasing. An increase in the magnitude of the RF input signal corresponds to an increase in the peaking amplifier bias input. Conversely, a decrease in the magnitude of the RF input signal corresponds to a decrease in the peaking amplifier bias input.
Referring now to
At step 514, the in-phase signal is amplified by the carrier amplifier 210 on the basis of the carrier amplifier bias input. Similarly, at step 516, the quadrature phase signal is amplified by the peaking amplifier 214 on the basis of the peaking amplifier bias input.
In summarization, an apparatus and a method is provided for adaptive biasing of a Doherty amplifier that is sufficiently simple that the biasing components may be integrated onto the same chip as the Doherty amplifier. This does away with the need for external circuitry for biasing of the Doherty amplifier and further, by placing the biasing circuitry on the same chip as the Doherty amplifier, allows the FETs of the carrier and peaking amplifier bias circuits to operate under similar temperature conditions as the FETs of the carrier and peaking amplifiers. By matching the operating temperature conditions of the bias circuits with the amplifiers that they are providing a bias input to, the Doherty amplifier is capable of temperature tracking and self-biasing of both the carrier and peaking amplifiers. In addition, the Doherty amplifier displays an improved peak power capability over earlier Doherty amplifiers. The present invention also improves the efficiency-linearity tradeoff.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms “comprises,” “comprising”, “includes”, “including” or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element preceded by “comprises . . . a” does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.
In the foregoing specification, the invention and its benefits and advantages have been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention. The benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential features or elements of any or all the claims. The invention is defined solely by the appended claims including any amendments made during the pendency of this application and all equivalents of those claims as issued.
