The present disclosure relates generally to an apparatus and method for setting the digital address of a device. More specifically, the present disclosure relates to an apparatus and method for setting the address of a detection device for use on a communication network.
A common form of communication network relies on a single set of system lines extending from a controller to a number of addressable devices. For example, such networks are used in fire detection systems, carbon monoxide detection systems, or other building monitoring systems where the addressable devices may be smoke detectors, heat detectors, carbon monoxide detectors, and alarm indicators, to name a few examples. In the aforementioned network, the addressable devices may be connected to bases or mounts connected to the communication network. Each of the variety of devices may require its own digital address which distinguishes it from other devices and to which it responds when a controller connected to the communication network presents the specific address on the system lines.
Many approaches are used for establishing the individual addresses of the addressable devices. For example, the addresses may be established electronically during an initialization process of the addressable device. Alternatively, the address may be set manually by the individual who installs the device. For example, a dual-in-line package (DIP) switch may be provided on the addressable device. The electronics of the device are able to read the binary state of several switches in a DIP switch and read that state as the device address.
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the DETAILED DESCRIPTION. This summary is not intended to identify key features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In accordance with one aspect of the disclosure, an addressing device configured to be removably engaged with an addressed device is disclosed. At least one of the addressing device and the addressed device are moveable from a non-engaged position to an engaged position, wherein the addressing device further includes a constant contact configured to contact an addressed device constant contact when the addressing device and the addressed device are in the engaged position. The addressing device may further include a first switch and a first contact that is electrically connected to the constant contact, wherein the first switch is configured to move the first contact from a first position to a second position. In the first position, the first contact forms an electrical connection with a first addressed device contact when the addressing device and the addressed device are in the engaged position. In a second position the first contact forms an open electrical connection with the first addressed device contact when the addressing device and the addressed device are in the engaged position. The addressing device further includes a second switch and a second contact that is electrically connected to the constant contact, wherein the second switch is configured to move the second contact from a first position to a second position. In the first position the second contact forms an electrical connection with a second addressed device contact when the addressing device and the addressed device are in the engaged position, and wherein in the second position the second contact forms an open electrical connection with the second addressed device contact when the addressing device and the addressed device are in the engaged position.
In accordance with another aspect of the disclosure, an addressing device and an addressed device that is configured to be removably engaged with the addressed device is disclosed. The addressing device includes a constant contact configured to contact a respective addressed device constant contact when the addressing device and the addressed device are in the engaged position and a first contact that is electrically connected to the constant contact. The addressing device further includes a first switch, wherein the first switch is configured to move the first contact from a first position to a second position, wherein in a first position the first contact forms an electrical connection with a first addressed device contact when the addressing device and the addressed device are in the engaged position. When the switch is in a second position, the first contact forms an open electrical connection with the first addressed device contact when the addressing device and the addressed device are in the engaged position. The addressing device further includes a second contact that is electrically connected to the constant contact and the first contact and a second switch. The second switch is configured to move the second contact from a first position to a second position, wherein in a first position the second contact forms an electrical connection with a second addressed device contact when the addressing device and the addressed device are in the engaged position. When the switch is in the second position the second contact forms an open electrical connection with the second addressed device contact when the addressing device and the addressed device are in the engaged position.
In accordance with another aspect of the disclosure, an addressed device configured to be removably engaged with and addressed by an addressing device comprising a constant contact, a first contact, and a second contact, is disclosed. The addressed device includes an addressed device constant contact configured to provide continuity with a constant contact of the addressing device when the addressing device and the addressed device are in the engaged position, and a first addressed device contact configured to be selectively contacted by a first contact of the addressing device when the addressing device and addressed device are in the engaged position. The addressed device further includes a second addressed device contact configured to be selectively contacted by the second contact of the addressed device when the addressing device and addressed device are in the engaged position, wherein the selective engagement of the first addressing device contact and the second addressing device contact with the first addressed device contact and the second addressed device contact provides a continuity sequence which sets an address of the addressed device.
Additional advantages and features of these aspects will be set forth in part in the description that follows, and in part will become more apparent to those skilled in the art upon examination of the following or upon learning by practice of the disclosure.
The features believed to be characteristic of one or more aspects of the disclosure are set forth in the appended claims. In the description that follows, like parts are marked throughout the specification and drawings with the same numerals, respectively. The drawing figures are not necessarily drawn to scale and certain figures may be shown in exaggerated or generalized form in the interest of clarity and conciseness. The disclosure will be best understood by reference to the following detailed description of illustrative aspects of the disclosure when read in conjunction with the accompanying drawings, wherein:
The following includes definitions of selected terms employed herein. The definitions include various examples and/or forms of components that fall within the scope of a term and that may be used for implementation. The examples are not intended to be limiting. Further, it will be obvious to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as to not unnecessarily obscure aspects of the present invention.
Throughout the disclosure the term substantially may be used as a modifier for a geometric relationship between elements or for the shape of an element or component. While the term substantially is not limited to a specific variation and may cover any variation that is understood by one of ordinary skill in the art to be an acceptable variation, some examples are provided as follows. In one example, the term substantially may include a variation of less than 10% of the dimension of the object or component. In another example, the term substantially may include a variation of less than 5% of the object or component. If substantially is used to define the angular relationship of one element to another element, one non-limiting example of the term substantially may include a variation of 5 degrees or less. These examples are not intended to be limiting and may be increased or decreased based on the understanding of acceptable limits to one of ordinary skill in the art.
For purposes of the disclosure, directional terms are expressed generally with relation to a standard frame of reference shown by the axis in each respective figure when the addressing device or addressed device are installed and in an in-use orientation.
The term “addressing device” is used throughout the disclosure. In the example aspects described throughout the specification, an example of an addressing device used with a sensor or detector mount is described. However, the addressing device described herein is not limited to such a use and may be usable with any device that may be addressed or require a series of switches to be physically set either by a user or technician in the field or during a manufacturing or assembly process. Some alternative example uses of the addressing device and addressed device may include a system with features enabled or disabled by turning on or off specific DIP switches on the addressing device (and thus providing a binary sequence or continuity sequence at the addressed device) or security feature requiring a specific combination set via the series of DIP switches on the addressing device.
The term “addressed device” is used throughout the disclosure. In example aspects described throughout the specification, a sensor or detector is described that has an address set via the addressing device. However, the addressed device described herein is not limited to such a use and may be usable with any device that may be addressed or may have features enabled or disabled based on a binary sequence or continuity sequence provided by an addressing device. As mentioned above, the addressed device may be part of a system or a device with features enabled or disabled based on continuity provided between terminals of the device or a security feature requiring a specific continuity or binary sequence provided via the addressing device.
In order to provide context to the current disclosure, a broad overview of the discovered deficiencies of various systems and an example implementation of the current disclosure and the advantages provided by the disclosure are described below. Further details of example implementations of the current disclosure are described detail with reference to the figures below.
Buildings or other areas may be provided with a network of monitoring devices such as detectors/sensors that provide monitoring or provide an output for monitoring various conditions (e.g., presence of fire, carbon monoxide, excessive vibration, excessive moisture or the detection of flooding) at various locations within the building. Each of the monitoring sensors may be operatively connected via a wired and/or wireless connection to a monitoring network. Each of the monitoring devices may be physically mounted at each desired location via a base that provides a current to the monitoring device and/or provides a connection to a monitoring network. When the network of devices is installed or configured, each device on the monitoring network may be allocated a unique address code corresponding to a known location of the specific device so that a control unit or control units(s) in operative connection with the devices may selectively communicate with individual detectors at known locations on the network.
One method of providing an address corresponding to the known location of each monitoring device is to provide an addressing device, which may for example include a dual-in-line package (“DIP”) switch at the mounting base of each monitoring device. The address may be set actively by altering the position of one or more DIP switch(es) connected to active electronic circuitry in the base. Another option is to uniquely programming an electronic memory connected to such circuitry in the base of each monitoring device. Providing the addressing for monitoring device at the mounting portion or base has the advantage that the address code is not altered if the monitoring device that is mounted to a single mounting portion or base is replaced by another monitoring device. However, the aforementioned addressing device requires circuitry in the mounting base for each of the monitoring devices; which increases the cost and complexity of the system.
Another method of providing an address corresponding to the known location of each monitoring device is to provide the addressing device at the removable monitoring device instead of at the mounting base. This method has the advantage that all of the circuitry (i.e. sensor electronics and the address electronics) may be incorporated into each monitoring device thereby reducing the cost reducing the complexity of the system by not requiring circuitry in the mounting base of the monitoring device. However, the disadvantage of such a system is that when a monitoring device is removed from its base for replacement or maintenance, the new monitoring device may not be properly addressed or the monitoring device may accidentally be swapped with a another monitoring device having an incorrectly set address.
The current disclosure relates to a method and apparatus for improving the reliability, reducing the possibility of operator error, and/or reducing the cost of the monitoring devices and/or corresponding mounting bases used in a monitoring network by providing a passive addressing device usable with the base of each monitoring device. The address of the addressing device may be set via a series of DIP switches which are configured to move a respective terminal for each DIP switch from a contact position to a non-contact position and vise-versa. A monitoring device, which may hereinafter be interchangeably referred to as an addressed device, usable with the system may include a series of terminals that correspond with each terminal of the addressing device. When a monitoring device having the aforementioned series of terminals is installed onto the base with the disclosed addressing device, each terminal of the addressing device may align with a respective terminal on the monitoring device. When the monitoring device is installed onto a respective base, the position of each DIP switch of the addressing device causes each respective terminal of the addressing device to either contact or not contact a respective one of the series of terminals of the monitoring device. Thus, an address of each detection location may be set at the mounting base of each monitoring device so that when a monitoring device is connected to the base, the selective contact of the terminals of the addressing device create a continuity sequence at the monitoring device that is used to determine the address of the monitoring device. Further details of the disclosure are described below with reference to the figures below.
As shown in
As best shown in
The addressing device may further include a series of switches (e.g., 102a, 102b, and 102e). Each one of the series of switches may be rotatably supported within the housing 104 of the addressing device 100.
Turning to
The addressing device may further include a ground or constant contact terminal 108c (
The addressed device 100 and/or monitoring network to which the addressed device is connected may set the address of the addressed device based on the position of each of the series of switches (e.g., 102a, 102b, 102e) discussed above. For example, turning to
Further, If the switch 102 is in a second position, for example, due to the rotation of switch 102 in direction 13, a second portion 141b contacts the terminal 108 and presses the terminal in a downward Z direction which causes the addressing device contact portion 106 to not contact and maintain a spaced relationship from an addressed device contact 226 thus preventing electrical connection or continuity between the respective terminal of the addressed device contact 226 and the addressing device contact 108. The addressed device 100 and/or the monitoring network may detect that the addressing device contact portion 106 is not in continuity with addressed device contact 226 and thus the addressed device may be assigned a second address that is different from aforementioned first address. While an example of only a single switch is discussed in depth above, any one of or combination of the nine switches shown in
As mentioned above, the addressed device 230 may for example be a monitoring device connected to a network or monitoring network. Some examples of a monitoring device may include any one or a combination of a smoke detector, a temperature or humidity detector, a carbon monoxide detector, a vibration detector, or a flood detector. The addressed device 230 may be configured to be connected to a network via a wireless or wired connection via a base containing the addressing device 100.
In some implementations, as part of or incorporating various features described herein, one or more microcontrollers may be implemented (e.g., within addressed device 230) for carrying out various operations in accordance with aspects of the present invention (e.g., for setting the address of the device on the monitoring network). Various components of such a controller 1100 are shown in representative block diagram form in
The CPU 1102 may be implemented as one or more single core or multi-core processors, and receive signals from an interrupt controller 1120 and a clock 1104. The clock 1104 may set the operating frequency of the entire microcontroller 1100 and may include one or more crystal oscillators having predetermined frequencies. Alternatively, the clock 1104 may receive an external clock signal. The interrupt controller 1120 may also send interrupt signals to the CPU, to suspend CPU operations. The interrupt controller 1120 may transmit an interrupt signal to the CPU when an event requires immediate CPU attention.
The RAM 1108 may include one or more Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data-Rate Random Access Memory (DDR SDRAM), or other suitable volatile memory. The Read-only Memory (ROM) 1110 may include one or more Programmable Read-only Memory (PROM), Erasable Programmable Read-only Memory (EPROM), Electronically Erasable Programmable Read-only memory (EEPROM), flash memory, or other types of non-volatile memory.
The timer 1112 may keep time and/or calculate the amount of time between events occurring within the controller 1100, count the number of events, and/or generate baud rate for communication transfer. The BUS controller 1114 may prioritize BUS usage within the controller 1100. The ADC 1118 may allow the controller 1100 to send out pulses to signal other devices.
The interface 1116 may comprise an input/output device that allows the controller 1100 to exchange information with other devices. In some implementations, the interface 1116 may include one or more of a parallel port, a serial port, or other computer interfaces.
Aspects of the present disclosures, such as the addressed device 230 and/or the monitoring network of a single or plurality of addressed device(s), may be implemented using hardware, software, or a combination thereof and may be implemented in one or more computer systems or other processing systems. In an aspect of the present disclosures, features are directed toward one or more computer systems capable of carrying out the functionality described herein, such as the example computer system 500 shown in
The computer system 500 includes one or more processors, such as processor 504. The processor 504 is connected with a communication infrastructure 506 (e.g., a communications bus, cross-over bar, or network). Various software aspects are described in terms of this example computer system. After reading this description, it will become apparent to a person skilled in the relevant art(s) how to implement aspects of the disclosures using other computer systems and/or architectures.
The computer system 500 may include a display interface 502 that forwards graphics, text, and other data from the communication infrastructure 506 (or from a frame buffer not shown) for display on a display unit 530. Computer system 500 also includes a main memory 508, preferably random access memory (RAM), and may also include a secondary memory 510. The secondary memory 510 may include, for example, a hard disk drive 512, and/or a removable storage drive 514, representing a floppy disk drive, a magnetic tape drive, an optical disk drive, a universal serial bus (USB) flash drive, etc. The removable storage drive 514 reads from and/or writes to a removable storage unit 518 in a well-known manner. Removable storage unit 518 represents a floppy disk, magnetic tape, optical disk, USB flash drive etc., which is read by and written to removable storage drive 514. As will be appreciated, the removable storage unit 518 includes a computer usable storage medium having stored therein computer software and/or data. In some examples, one or more of the main memory 508, the secondary memory 510, the removable storage unit 518, and/or the removable storage unit 522 may be a non-transitory memory.
Alternative aspects of the present disclosures may include secondary memory 510 and may include other similar devices for allowing computer programs or other instructions to be loaded into computer system 500. Such devices may include, for example, a removable storage unit 522 and an interface 520. Examples of such may include a program cartridge and cartridge interface (such as that found in video game devices), a removable memory chip (such as an erasable programmable read only memory (EPROM), or programmable read only memory (PROM)) and associated socket, and other removable storage units 522 and interfaces 520, which allow software and data to be transferred from the removable storage unit 522 to computer system 500.
Computer system 500 may also include a communications interface 524. Communications interface 524 allows software and data to be transferred between computer system 500 and external devices. Examples of communications interface 524 may include a modem, a network interface (such as an Ethernet card), a communications port, a Personal Computer Memory Card International Association (PCMCIA) slot and card, etc. Software and data transferred via communications interface 524 are in the form of signals 528, which may be electronic, electromagnetic, optical or other signals capable of being received by communications interface 524. These signals 528 are provided to communications interface 524 via a communications path (e.g., channel) 526. This path 526 carries signals 528 and may be implemented using wire or cable, fiber optics, a telephone line, a cellular link, an RF link and/or other communications channels. In this document, the terms “computer program medium” and “computer usable medium” are used to refer generally to media such as a removable storage drive 518, a hard disk installed in hard disk drive 512, and signals 528. These computer program products provide software to the computer system 500. Aspects of the present disclosures are directed to such computer program products.
Computer programs (also referred to as computer control logic) are stored in main memory 508 and/or secondary memory 510. Computer programs may also be received via communications interface 524. Such computer programs, when executed, enable the computer system 500 to perform the features in accordance with aspects of the present disclosures, as discussed herein. In particular, the computer programs, when executed, enable the processor 504 to perform the features in accordance with aspects of the present disclosures. Accordingly, such computer programs represent controllers of the computer system 500.
In an aspect of the present disclosures where the method is implemented using software, the software may be stored in a computer program product and loaded into computer system 500 using removable storage drive 514, hard drive 512, or communications interface 520. The control logic (software), when executed by the processor 504, causes the processor 504 to perform the functions described herein. In another aspect of the present disclosures, the system is implemented primarily in hardware using, for example, hardware components, such as application specific integrated circuits (ASICs). Implementation of the hardware state machine so as to perform the functions described herein will be apparent to persons skilled in the relevant art(s).
The aspects discussed herein can also be described and implemented in the context of computer-readable storage medium storing computer-executable instructions. Computer-readable storage media includes computer storage media and communication media such as flash memory drives, digital versatile discs (DVDs), compact discs (CDs), floppy disks, and tape cassettes. Computer-readable storage media can include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, modules or other data.
The term “processor,” as used herein, can refer to a device that processes signals and performs general computing and arithmetic functions. Signals processed by the processor can include digital signals, data signals, computer instructions, processor instructions, messages, a bit, a bit stream, or other computing that can be received, transmitted and/or detected. A processor, for example, can include microprocessors, microcontrollers, digital signal processors (DSPs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described herein.
The term “bus,” as used herein, can refer to an interconnected architecture that is operably connected to transfer data between computer components within a singular or multiple systems. The bus can be a memory bus, a memory controller, a peripheral bus, an external bus, a crossbar switch, and/or a local bus, among others.
The term “memory,” as used herein, can include volatile memory and/or nonvolatile memory. Non-volatile memory can include, for example, ROM (read only memory), PROM (programmable read only memory), EPROM (erasable PROM) and EEPROM (electrically erasable PROM). Volatile memory can include, for example, RAM (random access memory), synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), and direct RAM bus RAM (DRRAM).
The foregoing description of various aspects and examples have been presented for purposes of illustration and description. It is not intended to be exhaustive nor to limit the disclosure to the forms described. The embodiment(s) illustrated in the figures can, in some instances, be understood to be shown to scale for illustrative purposes. Numerous modifications are possible in light of the above teachings, including a combination of the abovementioned aspects. Some of those modifications have been discussed and others will be understood by those skilled in the art. The various aspects were chosen and described in order to best illustrate the principles of the present disclosure and various aspects as are suited to the particular use contemplated. The scope of the present disclosure is, of course, not limited to the examples or aspects set forth herein, but can be employed in any number of applications and equivalent devices by those of ordinary skill in the art. Rather, it is hereby intended the scope be defined by the claims appended hereto.
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