Claims
- 1. In a system including adaptive filter unit and a decision unit for generating an error signal to be applied to said adaptive filter, apparatus for reducing the number of logic signal bits representing said error signal when said error signal is in a two's complement format, said apparatus comprising:a selection unit responsive to a sign logic signal bit of said error signal for transmitting a logic signal when said error signal has an absolute value greater than a preselected degree of significance; and transmitting conductors for transmitting said sign logic signal bit and transmitting logic signal bits having degrees of significance equal to or less than said preselected degree of significance.
- 2. The apparatus of claim 1 wherein said selection unit includes:a logic OR circuit having all non-sign error bit signals with a degree of significance greater than said preselected degree of significance applied to input terminals thereof; a logic AND gate having said all non-sign error bit signals having a degree of significance greater than said preselected degree of significance applied to input terminals thereof; and a switch having output signals from said logic OR gate and said logic AND gate applied to input terminals thereof, said switch responsive to said sign bit signal for transmitting an output signal of said logic OR gate when said sign bit signal is a logic zero and for transmitting an output signal of said logic AND gate when said sign bit signal is a logic one.
- 3. A method of reducing number of bit signals representing an error signal, said method comprising the steps of:when a sign bit signal is a logic zero, applying a logic one output signal when any of the non-sign error signal logic bits with a degree of significance greater than an a preselected value is a logic one; when a sign bit signal is a logic zero, applying a logic one output signal when all of said non-sign error signal logic bits is a logic one.
- 4. In a transceiver unit, apparatus for reducing the number of bits in a two's complement error signal generated by a decision unit and applied to an adaptive filter unit, said apparatus comprising:conducting paths for transmitting a sign bit and selected bits of lesser significance from input terminals to output terminals; and a compression unit responsive to said sign bit for generating a compressed error bit signal from error bit signals of greater significance than said selected bits of lesser significance, said composite signal being applied to an output terminal of said apparatus.
- 5. The apparatus of claim 4 wherein said composite unit includes a logic AND gate, a logic OR gate and switch.
- 6. The apparatus of claim 5 wherein said error signal bits or greater significance are applied to input terminals of said logic AND gate and input terminals of said logic OR gate.
- 7. The apparatus of claim 6 wherein said switch transmits an output signal from said logic OR gate when said sign bit is a logic zero.
Parent Case Info
This amendment claims priority under 35 USC §119(e)(1) of provisional application No. 60/062,707, filed Oct. 22, 1997.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
3891837 |
Sunstein |
Jun 1975 |
A |
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/062707 |
Oct 1997 |
US |