Patent Application
20240241755
The current technique relates to an apparatus and method for controlling access to a shared resource.
In data processing systems it can often be the case that a shared resource is accessible to a plurality of components, and in such cases it is necessary to arbitrate between the accesses to that shared resource that may be requested by those components.
As the number of components that may share access to such a shared resource increase, the chance of there being multiple components seeking to access the shared resource at the same time tends to increase, and hence it becomes ever more desirable to provide an efficient technique for arbitrating between accesses to the shared resource.
In one example arrangement, there is provided an apparatus comprising: a given initiator component to initiate transactions to access a shared resource, where the given initiator component is one of a plurality of initiator components that share access to the shared resource; shared resource management circuitry to select, from amongst the plurality of initiator components, a currently granted initiator component that is currently allowed to access the shared resource, and to identify the currently granted initiator component within a storage structure; and gating circuitry located in a communication path between the given initiator component and the shared resource to receive a given transaction initiated by the given initiator component to access the shared resource, and to determine with reference to the storage structure whether the given initiator component is the currently granted initiator component; wherein the gating circuitry is arranged, when the currently granted initiator component is the given initiator component, to allow onward propagation of the given transaction to the shared resource, and is arranged, when the currently granted initiator component is other than the given initiator component, to block onward propagation of the given transaction to the shared resource and to trigger a recovery action to seek to facilitate future handling of the given transaction.
In another example arrangement, there is provided a method of controlling access to a shared resource accessible to a plurality of initiator components, comprising: employing shared resource management circuitry to select, from amongst the plurality of initiator components, a currently granted initiator component that is currently allowed to access the shared resource, and to identify the currently granted initiator component within a storage structure; and receiving, at gating circuitry located in a communication path between a given initiator component of the plurality of initiator components and the shared resource, a given transaction initiated by the given initiator component to access the shared resource, and determining with reference to the storage structure whether the given initiator component is the currently granted initiator component; when the currently granted initiator component is the given initiator component, causing the gating circuitry to allow onward propagation of the given transaction to the shared resource; and when the currently granted initiator component is other than the given initiator component, causing the gating circuitry to block onward propagation of the given transaction to the shared resource and to trigger a recovery action to seek to facilitate future handling of the given transaction.
In a still further example arrangement, there is provided a computer-readable medium to store computer-readable code for fabrication of an apparatus comprising: a given initiator component to initiate transactions to access a shared resource, where the given initiator component is one of a plurality of initiator components that share access to the shared resource; shared resource management circuitry to select, from amongst the plurality of initiator components, a currently granted initiator component that is currently allowed to access the shared resource, and to identify the currently granted initiator component within a storage structure; and gating circuitry located in a communication path between the given initiator component and the shared resource to receive a given transaction initiated by the given initiator component to access the shared resource, and to determine with reference to the storage structure whether the given initiator component is the currently granted initiator component; wherein the gating circuitry is arranged, when the currently granted initiator component is the given initiator component, to allow onward propagation of the given transaction to the shared resource, and is arranged, when the currently granted initiator component is other than the given initiator component, to block onward propagation of the given transaction to the shared resource and to trigger a recovery action to seek to facilitate future handling of the given transaction. Such computer-readable code can be disposed in any known transitory computer-readable medium (such as wired or wireless transmission of code over a network) or non-transitory computer-readable medium such as semiconductor, magnetic disk, or optical disc.
The present technique will be described further, by way of illustration only, with reference to examples thereof as illustrated in the accompanying drawings, in which:
In accordance with the techniques described herein, an apparatus is provided that comprises a given initiator component that is arranged to initiate transactions to access a shared resource. The shared resource is able to be accessed by a plurality of initiator components, with the given initiator component being one of those initiator components. The initiator components can take a variety of different forms dependent on implementation, but in some example implementations may be separate processing elements, and in one particular implementation may comprise separate central processing units (CPUs). Further, the shared resource could take a wide variety of different forms dependent on implementation, for example a universal asynchronous receiver-transmitter (UART), a memory controller controlling access to a shared memory device, etc.
Shared resource management circuitry is provided to manage which initiator component is currently allowed to access the shared resource. In particular, the shared resource management circuitry is arranged to select, from amongst the plurality of initiator components, the initiator component that is currently to be allowed access to the shared resource (such an initiator component being referred to herein as the currently granted initiator component), and to then identify the currently granted initiator component within a storage structure. Hence, at any point in time, the storage structure can be referred to in order to identify which initiator component is the currently granted initiator component. The shared resource management circuitry can be implemented in a variety of different ways. For instance, the shared resource management circuitry may be implemented as a separate hardware element to the various initiator components, for example taking the form of a separate CPU, or alternatively could be implemented by a suitable software process running on one of the initiator components.
Further, in accordance with the technique described herein, gating circuitry is located in a communication path between the given initiator component and the shared resource so as to receive a given transaction initiated by the given initiator component seeking to access the shared resource. The gating circuitry then determines, with reference to the storage structure, whether the given initiator component is the currently granted initiator component. In one example implementation, the gating circuitry is provided by one or more hardware components separate to the initiator components.
When the gating circuitry determines that the currently granted initiator component is the given initiator component, then the gating circuitry allows onward propagation of the given transaction to the shared resource. Conversely, if the currently granted initiator component is a different initiator component, then the gating circuitry is arranged to block onward propagation of the given transaction to the shared resource, and instead is arranged to trigger a recovery action to seek to facilitate future handling of the given transaction.
Hence, in accordance with the techniques described herein, the gating circuitry provides a hardware mechanism, separate to the initiator components, for determining whether any given transaction has been issued by the currently granted initiator component. When it is determined that a given transaction has been issued by an initiator component that is not the currently granted initiator component, the gating circuitry can then block onward propagation of that transaction and trigger a suitable recovery action. This avoids the need for the individual initiator components to monitor, on an ongoing basis, whether they are currently granted access before issuing transactions, or to use a handshaking mechanism to seek to gain exclusive access to the shared resource, hence improving efficiency. Instead, the gating circuitry can determine, at the time any given transaction is received by it en route to the shared resource, whether that transaction has been issued by an initiator component that is the currently granted initiator component, such that the blocking of a transaction only occurs when there is a real access violation detected by the gating circuitry.
This can significantly improve performance of the system, compared for example with an alternative approach where an initiator component is required to check the storage structure before issuing each transaction to make sure that it is still the currently granted initiator component, or instead is required to implement a suitable handshaking mechanism to seek to acquire exclusive access to the shared resource for the period of time that it is issuing a sequence of transactions. Further, such alternative approaches can give rise to race conditions, that are alleviated through use of the present technique.
In addition, through the provision of such gating circuitry, the reallocation of the shared resource amongst the various initiator components can be managed much more simply by the shared resource management circuitry. In particular, since the provision of the gating circuitry ensures that an access permission check in respect of any given transaction is made at the time that transaction is received by the gating circuitry, then the shared resource management circuitry can change the currently granted initiator component as and when desired, and as soon as the storage structure is updated to reflect that change any transaction subsequently received by the gating circuitry will be checked against the updated storage structure contents.
There are various ways in which the gating circuitry may trigger the recovery action. However, in accordance with example implementations described herein, the gating circuitry is arranged to trigger the recovery action by asserting a signal that triggers processing to be performed in order to cause the shared resource management circuitry to select the given initiator component as the currently granted initiator component, to thereby allow the given transaction to be propagated to the shared resource. The asserted signal from the gating circuitry could take various forms. For instance, as will be discussed in more detail below, the signal could be asserted to the given initiator component to cause the given initiator component to request the shared resource management circuitry to mark the given initiator component as the currently granted initiator component within the storage structure, or instead the signal could be asserted from the gating circuitry to the shared resource management circuitry to request the shared resource management circuitry to mark the given initiator component as the currently granted initiator component within the storage structure.
In one example arrangement, the given initiator component is arranged, prior to initiating a first transaction of a sequence of transactions, to determine with reference to the storage structure whether the given initiator component is the currently granted initiator component, and to issue a grant request signal to the shared resource management circuitry when the currently granted initiator component is indicated to be other than the given initiator component. Hence, when seeking to start a sequence of transactions, the given initiator component can be arranged to send a request to the shared resource management circuitry if it is not already indicated to be the currently granted initiator component.
Then, the shared resource management circuitry may be arranged, in response to the grant request signal, to select the given initiator component as the currently granted initiator component. In one example implementation, none of the initiator components are required to obtain any form of locked access to the shared resource, and hence the shared resource management circuitry can be arranged to freely change which initiator component is marked as the currently granted initiator component, given that the gating circuitry will detect and block any transactions received by it that originate from an initiator component that is no longer indicated as the granted initiator component in the storage structure.
In one example implementation, at the time the shared resource management circuitry selects the given initiator component as the currently granted initiator component in response to a grant request signal from that given initiator component, then in addition to updating the storage structure to identify the given initiator component as the currently granted initiator component, the storage structure will also be updated to indicate that any previously granted initiator component is no longer granted access. In particular, however the storage structure is constructed, the shared resource management circuitry can be arranged to ensure that at any point in time only one initiator component is marked as the currently granted initiator component.
In one example implementation, the given initiator component is arranged, following issuance of the grant request signal, to monitor the storage structure in order to detect when the given initiator component is indicated as the currently granted initiator component.
However, in one example implementation, once the given initiator component has detected that it is now indicated as the currently granted initiator component following the issuance of the grant request signal, it is no longer required to monitor the storage structure on an ongoing basis. Instead, the given initiator component may be arranged, responsive to detecting that the currently granted initiator component is the given initiator component, to initiate the first transaction, and to then initiate each subsequent transaction in the sequence of transactions without further reference to the storage structure, unless interrupted by the gating circuitry triggering the recovery action in response to detecting that the given initiator component is no longer the currently granted initiator component. This hence significantly improves efficiency within the system, particularly within a system where there are a relatively large number of initiator components that may be sharing access to the shared resource.
As mentioned earlier, there are various ways in which the gating circuitry can be arranged to trigger the recovery action, but in one example implementation the gating circuitry does this by asserting an interrupt signal to the given initiator component to cause the given initiator component to execute a given exception handling routine. Hence, via the interrupt signal, the given initiator component is notified when one of its issued transactions has been blocked by the gating circuitry, and the execution of the given exception handling routine is used to implement the recovery action.
In one example implementation, the given initiator component is arranged, on executing the given exception handling routine, to issue a grant request signal to the shared resource management circuitry, and to then monitor the storage structure in order to detect when the given initiator component is once again indicated to be the currently granted initiator component. By such an approach, the given initiator component can then detect when it has been re-granted access to the shared resource, by virtue of the storage structure being updated to indicate the given initiator component as the currently granted initiator component. At that point, the given initiator component can then be arranged to reinitiate the given transaction.
In one example implementation, when the gating circuitry determines that the given transaction should be blocked and issues an interrupt signal back to the given initiator component, it may at that point discard the given transaction since, as mentioned above, the given initiator component will reinitiate the given transaction in due course. However, in an alternative example implementation, the gating circuitry may be arranged, when triggering the recovery action, to store the given transaction within buffer circuitry accessible to the gating circuitry. Such an approach then enables the given transaction to be forwarded on to the shared resource by the gating circuitry once the given initiator component is once again indicated to be the currently granted initiator component, without the given initiator component being required to re-initiate the given transaction.
Hence, in one example implementation, once the given initiator component has issued the grant request signal to the shared resource management circuitry upon executing the given exception handling routine, the given initiator component may then monitor the storage structure to determine when it has been re-granted access to the shared resource, and then at that point may notify the gating circuitry so that the gating circuitry can release the given transaction as buffered locally to the gating circuitry, without the given initiator component needing to re-initiate the given transaction.
As a yet further alternative approach, for example within an initiator component that can support multiple contexts, then it may be possible to allow the initiator component to switch from the original context that was using the shared resource in order to perform other useful work of another context whilst waiting for the shared resource management circuitry to re-grant access to the shared resource. For instance, the gating circuitry could be arranged to monitor the storage structure to determine when the given initiator component has once again been marked as the currently granted initiator component, and to notify the given initiator component when that is detected. Hence, in such an approach, on receipt of the interrupt, the given initiator component could switch context in order to execute the given exception handling routine, and then rather than merely returning to the original context that was using the shared resource in order to wait until it is re-granted access to the shared resource, the given initiator component could instead perform processing in one or more other contexts until notified by the gating circuitry that the given initiator component has been once again indicated as the currently granted initiator component, at which point the given initiator component could return to the original context that was using the shared resource, and continue performing the required processing operations in that context.
In some instances, it may be the case that the transactions initiated by the given initiator component conform to a transaction protocol that requires a response to be provided to the given initiator component for each transaction initiated by the given initiator component. In such cases, the gating circuitry can be arranged to ensure that the transaction protocol is complied with, including in situations where it is determined that the given transaction should be blocked. In particular, in one example implementation, the gating circuitry may be arranged, when blocking onward propagation of the given transaction to the shared resource, to provide a dummy response to the given initiator component in order to provide compliance with the transaction protocol. The form of this dummy response can be varied dependent on implementation. For example, assuming the given transaction is a write transaction for which a write response is expected in order to comply with the transaction protocol, then a write response could be issued by the gating circuitry if desired. As noted earlier, when blocking the given transaction in accordance with the above described technique, an interrupt signal is also asserted to the given initiator component from the gating circuitry, and on processing that interrupt the given initiator component can be arranged to ignore or discard the dummy response, and as a result any suitable form of dummy response could be used merely to ensure that the transaction protocol is conformed to.
The interrupt signal asserted by the gating circuitry can take a variety of forms. In one particular example implementation, the given initiator component may be provided with interrupt handling circuitry that is configured to handle interrupts of multiple interrupt types. In such an implementation, the gating circuitry may for example be arranged to assert the interrupt signal so as to identify an interrupt type of higher priority than at least one other interrupt type amongst the multiple interrupt types. By using a higher priority interrupt, this can reduce the latency between the time the interrupt signal is asserted, and the time the interrupt is handled by the given initiator component by executing the given exception handling routine. It can hence potentially reduce the amount of processing that needs to be replayed following the given initiator component being re-granted access to the shared resource. As a particular example, in implementations that support standard interrupt requests and fast interrupt requests, the interrupt request from the gating circuitry may take the form of a fast interrupt request (FIQ).
As an alternative to the above described approach where the gating circuitry issues an interrupt signal to the given initiator component when the given transaction is blocked, the gating circuitry could instead be arranged to trigger the recovery action by communicating directly with the shared resource management circuitry (for example by asserting a request signal to it) in order to seek to cause the given initiator component to be re-marked as the currently granted initiator component. In some implementations, this could enable the fact that the given transaction has been blocked to effectively be handled transparently to the given initiator component, since the given transaction may then be able to be released to the shared resource once the given initiator component is re-marked as the currently granted initiator component. In systems where the given initiator component expects a response signal in respect of each transaction, then the response signal could at that point be issued back to the given initiator component.
Such an approach could for example be adopted in a system where the gating circuitry has access to a local buffer in which to temporarily store transactions that are blocked. For instance, the gating circuitry may be arranged, when triggering the recovery action, to store the given transaction within buffer circuitry accessible to the gating circuitry. Then, following sending of the request signal to the shared resource management circuitry, the gating circuitry may be arranged to monitor the storage structure in order to detect when the given initiator component is once again indicated to be the currently granted initiator component, and upon such detection to output the given transaction from the buffer circuitry for onward propagation to the shared resource.
The request signal sent by the gating circuitry to the shared resource management circuitry could take a variety of forms. For example, the request signal could take the form of an interrupt signal, for instance in implementations where the shared resource management circuitry is a dedicated processor, but could alternatively take other forms. For instance the shared resource management circuitry could be implemented as a finite state machine (FSM) that receives request signals and arbitrates between them in hardware.
In a modified version of the above implementation, in situations where the given initiator component is able to support multiple contexts, the gating circuitry could be arranged, on blocking the transaction, to notify the given initiator component that there is expected to be some delay in the handling of the given transaction, to thereby allow the given initiator component to switch context and perform some other useful processing in the interim. Once the gating circuitry detects that the given initiator component has been re-marked as the currently granted initiator component, it can then release the given transaction, and notify the given initiator component so that the given initiator component can switch back to the original context.
In one example implementation, a separate instance of the gating circuitry is provided for each initiator component in the plurality of initiator components, such that a given instance of the gating circuitry has an associated initiator component amongst the plurality of initiator components and is arranged to control whether to block or allow onward propagation of a transaction issued by the associated initiator component in dependence on whether the associated initiator component is identified in the storage structure as the currently granted initiator component. Such an approach can provide a design that is readily scalable, and hence could be applied to systems with larger and larger numbers of initiator components that share access to a shared resource.
However, it is not a requirement to provide a separate instance of the gating circuitry for each initiator component. In accordance with an alternative example implementation, the gating circuitry may be arranged to receive transactions issued by the plurality of initiator components and, for a given received transaction, to determine the initiator component that initiated the given received transaction and to block or allow onward propagation of the given received transaction in dependence on whether the initiator component that initiated the given received transaction is identified in the storage structure as the currently granted initiator component. Hence, in accordance with such an implementation the functionality of the gating circuitry may be centralised, with for example a single instance of the gating circuitry monitoring the transactions issued by any of the plurality of initiator components. A variety of different techniques could be used to identify the source of any particular transaction. For example, many transaction protocols may incorporate a transaction identifier within header information of the transaction, and that transaction identifier information could be analysed by the gating circuitry to determine which initiator component issued a received transaction, and hence enable the gating circuitry to determine whether that initiator component is the currently granted initiator component identified within the storage structure.
In one example implementation, the shared resource management circuitry is arranged to control the storage structure to ensure that, at any point in time, only one initiator component is indicated as the currently granted initiator component. As mentioned earlier, the technique described herein provides the shared resource management circuitry with a great degree of flexibility as to when the currently granted initiator component can be changed. In particular, since the gating circuitry will monitor each transaction it receives, block any transaction that it receives that is not associated with the currently granted initiator component as indicated in the storage structure, and trigger an appropriate recovery action for any blocked transaction, then in one example implementation there is no particular restriction on the point in time at which the shared resource management circuitry can change the initiator component that is to be granted access to the shared resource.
In particular, there is no need to wait for a currently granted initiator component to reach a certain stage in its processing before the removal of the grant for that initiator component, and the granting of access to another initiator component. Hence, in response to a request for access by an initiator component that is not the currently granted initiator component, the shared resource management circuitry can merely remove the grant from any currently granted initiator component, grant access to the initiator component that is requesting access, and update the storage structure accordingly. By ensuring that during that process only one initiator component is ever indicated as being granted access to the shared resource at any point in time, this provides a simple update mechanism for the shared resource management circuitry, and simplifies the checking procedures implemented by the gating circuitry.
The storage structure can take a variety of forms. In one example implementation, the storage structure is a single storage element identifying the currently granted initiator component. Hence, in accordance with such an approach, a global storage structure may be provided, whose stored value identifies which initiator component is the currently granted initiator component. The value stored within such a storage structure can take a variety of forms. Merely by way of example, the storage structure could take the form of a one hot register, holding an N-bit value, where N is the number of initiator components that may issue transactions to the shared resource and hence each bit in the N-bit value can be associated with one of the initiator components. At any point in time only a single bit in the N-bit value will be set (the set state could in one example implementation be a logic 1 value, whilst in another implementation the set state could be a logic 0 value) to identify the corresponding initiator component as the currently granted initiator component.
However, in an alternative implementation, the storage structure could instead be implemented by a plurality of storage elements, where each storage element is associated with one of the initiator components in the plurality of initiator components and is arranged to identify whether the associated initiator component is the currently granted initiator component. Such an approach may be particularly beneficial when employed in combination with the earlier discussed example implementation where a separate instance of the gating circuitry is provided for each initiator component, providing a sub-system design that is readily scalable as the number of initiator components is increased. In particular, a separate sub-system can be provided for each initiator component, that sub-system including the initiator component, the associated instance of the gating circuitry, and the associated storage element for that initiator component. The shared resource management circuitry can then be arranged to ensure that, at any point in time, only one of the storage elements is in the set state to identify the associated initiator component as being the currently granted initiator component.
The types of transactions monitored by the gating circuitry may vary dependent on implementation. In one example implementation, the gating circuitry is arranged to receive and monitor at least write transactions issued by the given initiator component. In some implementations, the gating circuitry could also be arranged to receive and monitor read transactions, or in a yet further alternative implementation the gating circuitry may be arranged to monitor read transactions but not write transactions.
Particular example implementations will now be discussed with reference to the accompanying figures.
Shared resource management circuitry 20 is provided to arbitrate access to the shared resource 25 by the plurality 10 of initiator components, and in particular to determine, at any point in time, which initiator component 12, 14, 16, 18 is to be considered as the currently granted initiator component. A storage structure 30 is provided in which the shared resource management circuitry 20 is arranged to indicate the currently granted initiator component. The shared resource management circuitry can be implemented in a variety of different ways. For instance, the shared resource management circuitry may be implemented as a separate hardware element to the various initiator components, for example taking the form of a separate CPU, or alternatively could be implemented by a suitable software process running on one of the initiator components.
Gating circuitry 35 is provided in a communication path between the initiator components 12, 14, 16, 18 and the shared resource 25, so as to intercept any transaction initiated by one of those components that is destined for the shared resource, and to reference the storage structure 30 in order to determine whether the initiator component responsible for that transaction is indicated as the currently granted initiator component. If it is, then the gating circuitry merely allows the transaction to be propagated on to the shared resource. However, if the gating circuitry determines that the transaction has been issued by an initiator component that is not indicated in the storage structure as the currently granted initiator component, the gating circuitry is arranged to block onward propagation of that transaction to the shared resource 25, and instead is arranged to trigger a recovery action by asserting a signal over path 45.
As will be discussed in more detail later, a variety of different techniques can be used to trigger the recovery action, and hence whilst in some implementations the signal over path 45 may be sent to the initiator component whose transaction has been blocked, in an alternative implementation the signal over path 45 may be sent directly to the shared resource management circuitry 20. Irrespective of the technique used to trigger the recovery action, the aim of performing the recovery action is to seek to facilitate future handling of the transaction that has been blocked. Hence, in accordance with the techniques described herein, the recovery action involves performance of steps with the aim of bringing about an update to the storage structure contents, so as to indicate the initiator component whose transaction has been blocked as being the currently granted initiator component, so that that blocked transaction can be re-tried.
Whilst in one example implementation, when the gating circuitry 35 blocks a given transaction, it may effectively discard that transaction, with the transaction in due course being re-initiated from the relevant initiator component once the recovery action has been performed, in an alternative example implementation the gating circuitry 35 may be provided with a local buffer storage 40 into which it can buffer one or more transactions. In that case, the buffer storage 40 may be used to locally buffer a given transaction that has been blocked, so that when in due course the recovery action has been performed, and it is detected that the storage structure indicates the relevant initiator component as now being the currently granted initiator component, the gating circuitry can directly propagate the given transaction onto the shared resource 25 without that transaction needing to be reinitiated by the relevant initiator component.
Both the gating circuitry 35 and the storage structure 30 may be implemented in a variety of ways. For example, the gating circuitry 35 could be provided as a centralised hardware structure that is arranged to receive transactions destined for the shared resource 25 that are issued by any of the initiator components 12, 14, 16, 18, with the gating circuitry 35 determining, for any given transaction that it receives, the initiator component that has issued that transaction. This could for example be determined from analysis of certain header information provided within the transaction. Similarly, the storage structure 30 could be a centralised structure whose value identifies the currently granted initiator component. The way in which the value stored in the storage structure identifies the currently granted initiator component can be varied dependent on implementation. For example, assuming there are N initiator components 12, 14, 16, 18 that can initiate transactions in respect of the shared resource 25, then in one example implementation an N-bit one-hot value could be stored within the storage structure 30, such that the single set bit within that one hot value identifies the currently granted initiator component. Alternatively, an at least Y-bit value stored within the storage structure 30 could be used to identify any one of the N initiator components, where N=2y.
In an alternative implementation, rather than providing centralised gating circuitry, an instance of the gating circuitry is provided for each initiator component, and used to monitor the transactions issued by that associated initiator component to the shared resource 25. Similarly, a separate storage element may be provided in association with each initiator component, and used to indicate when that associated initiator component is the currently granted initiator component. Such an approach is illustrated schematically in
Each of the sub-systems 100, 100′, 100″, 100″″ is coupled via a bus 135 with the shared resource 140. Further, shared resource management circuitry 130 (referred to in
In the example of
Once the initiator component has issued the grant request signal at step 210, it then at step 215 monitors the associated storage element 115 to detect when it has been granted access to the shared resource. Once it detects that it has been granted access, then the process proceeds to step 220 where the first transaction is initiated.
Thereafter, the process proceeds to step 225 where it is determined whether an interrupt has been received from the gating circuitry. Such an interrupt signal would indicate that, at the point in time the transaction is reviewed by the gating circuitry 120, the gating circuitry has determined that the resource grant register 115 no longer indicates the associated initiator component 110 as the currently granted initiator component, and that hence a recovery action is needed. In some example implementations, the gating circuitry may be arranged, in combination with issuing such an interrupt signal, to also send any transaction response signal expected by the initiator component in order to be compliant with the transaction protocol employed within the system. Such a transaction response signal will be referred to herein as a dummy response signal, and can take any suitable form. For example, for a write transaction, the dummy response signal may take the form of a write response signal, but the issuance of the interrupt signal in combination with the dummy response signal will cause the initiator component in due course to discard the write response signal.
If an interrupt from the gating circuitry is detected at step 225, then the initiator component will interrupt its current processing operations, and instead perform at step 250 the required interrupt service routine indicated by the interrupt signal. Performance of the interrupt service routine will cause the initiator component to re-request access to the shared resource, by issuing a grant request signal to the shared resource management circuitry 130. Thereafter, in one example implementation the initiator component monitors the associated resource grant register 115 in order to determine when it has been re-granted access to the shared resource, and thereafter, as indicated at step 255, the sequence of transactions are resumed once access has been re-granted.
In one example implementation, such resumption may involve the initiator component resending the transaction that had been blocked, but as discussed earlier, in an alternative example implementation the gating circuitry may be able to locally buffer that transaction, so that there is no need for the transaction to be resent from the initiator component once access has been re-granted. Instead, the initiator component may merely notify the gating circuitry that access has been re-granted, allowing the gating circuitry to release the buffered transaction, or alternatively the gating circuitry may be arranged to monitor the associated resource grant register 115 itself, and release the transaction when the initiator component has been re-granted access. In one example implementation where the gating circuitry monitors the associated resource grant register 115 at this stage, then once the initiator component has issued the grant request signal the initiator component may be allowed to perform processing in one or more other contexts until notified by the gating circuitry that it has once again been indicated as the currently granted initiator component, at which point that initiator component could return to the original context that was using the shared resource, and continue performing the required processing operations in that context. Following resumption of the sequence of transactions at step 255, the process returns to step 225.
If at step 225 it is determined that no interrupt has been received from the gating circuitry, it is then determined at step 230 whether a transaction response has been received in the absence of an interrupt, this indicating that the transaction has been successfully propagated to the shared resource, and that hence the initiator component can progress to handling a subsequent transaction. As shown in
Following detection of a successful transaction response at step 230, it is determined at step 235 whether any more transactions are to be sent in the sequence, and if so the next transaction is identified at step 240, whereafter that transaction is initiated at step 220. Once all of the transactions have been processed, then the sequence of steps shown in
When a transaction is received from a given initiator component (which for ease of discussion will be referred to as initiator component X for the purposes of
If the storage structure does indicate that the initiator component X is the currently granted initiator component, then the process proceeds to step 360, where the gating circuitry allows the onward propagation of the transaction to the shared resource. However, if it is determined that the storage structure does not indicate that initiator component X is the currently granted initiator component, then the process proceeds to step 365 where the transaction is blocked by the gating circuitry. As mentioned earlier, in association with blocking the transaction the gating circuitry may issue a dummy response if this is deemed appropriate in order to comply with the transaction protocol. In addition, at step 370, the recovery action is triggered, by asserting a signal to either the associated initiator component, or in an alternative implementation to the shared resource management circuitry.
As a further modification to the approach of
Through use of the techniques described herein, it is possible to reduce the chance of multiple initiator components accessing a shared resource at the same time by ensuring that the resource management circuitry only indicates one initiator component as being the currently granted initiator component at any point in time, with the use of the gating circuitry then ensuring that expected program flow is only broken when a real access violation is detected (i.e. when a transaction being reviewed by the gating circuitry originates from an initiator component that is at that point in time no longer indicated as being the currently granted initiator component). Further, it simplifies the functionality performed at an initiator component, as the initiator component is only required to check whether it is granted access once after it has requested access, and thereafter can assume that it continues to be granted access, due to the gating circuitry detecting any situation where the initiator component seeks to make an access to the shared resource when it is no longer the currently granted initiator component.
Other example arrangements are set out in the following clauses:
1. An apparatus comprising:
In the present application, the words “configured to . . . ” are used to mean that an element of an apparatus has a configuration able to carry out the defined operation. In this context, a “configuration” means an arrangement or manner of interconnection of hardware or software. For example, the apparatus may have dedicated hardware that provides the defined operation, or a processor or other processing device may be programmed to perform the function. “Configured to” does not imply that the apparatus element needs to be changed in any way in order to provide the defined operation.
Although illustrative embodiments of the invention have been described in detail herein with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes, additions and modifications can be effected therein by one skilled in the art without departing from the scope and spirit of the invention as defined by the appended claims. For example, various combinations of the features of the dependent claims could be made with the features of the independent claims without departing from the scope of the present invention.
