Patent Application
20190179665
Aspects of the present disclosure relate to configuring the hardware of a microcontroller system based on configuration data. More specifically, the present application relates to coordinating a transition to a configuration of operational units associated with a microcontroller system.
A computer system usually includes a programmable unit, such as a CPU, and memory, on which program code to be executed by the programmable unit, and data related to an application running on the computer system can be stored. Memory may be classified as read-only memory (ROM), non-volatile memory (i.e. Flash) and random access memory (RAM). A computer system furthermore includes peripheral units for providing input/output, clocking, power, and/or co-processors or hardware accelerators for providing specific computing tasks.
A microprocessor usually does not have large amount of memory, such as RAM and ROM, and other peripheral units on the chip. Even though according to recent developments, high performance microprocessors may also have cache memories, graphical processing units and other accelerators on-chip, they usually have a high amount of resources like RAM, ROM, I/O ports, etc., to be added externally in order to provide a functional microprocessor computer system. Microprocessors may have applications that are usually not dedicated to specific hardware.
A microcontroller system, for example, has a programmable unit, in addition with a fixed amount of code and data memory, and other operational or peripheral units all integrated on a single chip. Microcontroller systems are therefore often referred to as system-on-chip (SoC) and/or as system-in-package (SiP) computer systems. Microcontroller systems may be designed for specific applications, i.e. to permit conducting of end-user related coordinated functions, tasks, or activities. As an example, a microcontroller system application processes an input provided by some peripheral units, and provides an output based on the processing. Microcontroller systems typically need small resources in terms of RAM, ROM, Flash, I/O ports, etc., which may be embedded, as mentioned, on a single chip or system-in-package. This in turn reduces the size and the cost compared to microprocessor systems.
Microcontroller systems are capable of using different configurations of their hardware. For example, the operational units associated with a microcontroller system can be individually configured to tailor energy consumption and/or to provide different levels of safe operation. Developers provide an increasing number of options e.g. for ultra-low energy consumption, such as power gating and clock gating implementations for configuring individual portions, pieces of hardware or hardware circuits (e.g., operational units, functional islands), or software instances used to program the CPU and/or other hardware associated with a microcontroller system thereby increasing complexity. With respect to operational safety, individual operational units may be configured with different levels of access rights and ownership. For example, a section in a memory may be protected such that it can be read during normal operation of the system, but not be overwritten. In another example, an operational unit may be configured such that certain access rights are required by other pieces of the hardware or by the software to access the circuit. Often, the configuration of the individual hardware circuits associated with a microcontroller system involves more than 200 parameters that have to be defined. It is therefore a challenge for the users of the microcontroller system to provide applications that make use of the microcontroller system in an energy-optimized fashion with an appropriate level of operational safety, in order to optimize energy consumption and/or safety per performed task, to achieve fast development time, and reduce software maintenance efforts. The designer of such microcontroller systems faces the challenge to design a scalable hardware beneficially for software programmers. Software has to properly handle the transition conditions between configurations. Further, the configuration data shall enable software to be used in different hardware compositions using portions of the configuration data identifying the structure and arrangement of the set of configuration data.
Thus, there is considerable need for apparatuses and methods that offer flexible, scalable and simplified handling of microcontroller system configurations. In particular, need arises for coordinating the transition to a configuration of a microcontroller system when a large number of operational units is involved.
The present invention provides apparatus and methods for coordinating a configuration of a microcontroller system using a set of configuration data of a plurality of sets of configuration data to identify relevant data and coordinate a transition to a configuration associated with at least one operational unit of the microcontroller system.
In some aspects, a microcontroller system is provided. The microcontroller system comprises a central processing unit, memory associated with the microcontroller system, and configuration control means. The configuration control means is operable to determine a set of configuration data of a plurality of sets of configuration data associated with at least one operational unit, wherein the at least one operational unit is associated with the microcontroller system. Each set of said plurality of sets of configuration data defines a configuration of said at least one operational unit. Furthermore, each set comprises coordination information to coordinate a transition to said configuration of said at least one operational unit. The configuration control means is further operable to configure the microcontroller system corresponding to said determined set of configuration data. The configuring of the microcontroller system includes coordinating the transition to said configuration according to said coordination information, wherein said coordinating employs one or a plurality of coordination states, each coordination state being associated with at least partly configuring said at least one operational unit according to said configuration, and/or configuring said at least one operational unit by an intermediate configuration.
In other aspects, a method of configuring a microcontroller system is provided. The method includes determining a set of configuration data of a plurality of sets of configuration data. The plurality of sets of configuration data are associated with at least one operational unit, wherein the at least one operational unit is associated with the microcontroller system. Each set of the plurality of sets of configuration data defines a configuration of the at least one operational unit, and each set comprises coordination information to coordinate a transition to the configuration of the at least one operational unit. The method further includes configuring the microcontroller system corresponding to the determined set of configuration data. The configuring the microcontroller system includes coordinating the transition to the configuration according to the coordination information. The coordinating employs one or a plurality of coordination states, wherein each coordination state is associated with at least partly configuring the at least one operational unit according to the configuration, and/or configuring the at least one operational unit by an intermediate configuration.
In further aspects, a computer program is provided that comprises program instructions which are computer-executable to implement the steps of determining a set of configuration data of a plurality of sets of configuration data. The plurality of sets of configuration data are associated with at least one operational unit, wherein the at least one operational unit is associated with a microcontroller system. Each set of the plurality of sets of configuration data defines a configuration of the at least one operational unit, and each set comprises coordination information to coordinate a transition to the configuration of the at least one operational unit. The program instructions are further executable to implement configuring the microcontroller system corresponding to the determined set of configuration data. The configuring the microcontroller system includes coordinating the transition to the configuration according to the coordination information. The coordinating employs one or a plurality of coordination states, wherein each coordination state is associated with at least partly configuring the at least one operational unit according to the configuration, and/or configuring the at least one operational unit by an intermediate configuration.
Various objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description, along with the accompanying drawings in which like numerals represent like components.
In order to better understand the present disclosure and to appreciate the practical applications thereof, the following figures are provided and referenced hereafter. It should be noted that the figures are given as illustrative examples only and in no way limit the scope of the disclosure.
The present invention will be described hereinafter in more detail with reference to the accompanying figures, in which examples of exemplary embodiments of the invention are illustrated. However, the present invention may be embodied in different forms and should not be construed as limited to the illustrative examples set forth herein. Rather, these examples are provided so that this disclosure will be thorough and will convey the scope of the invention to persons skilled in the art.
In operation, an event (e.g., an interrupt, an exception, a TRAP, a wake-up signal, etc.) may arrive at the event controller to trigger the microcontroller system to perform a task. The event controller may trigger configuration of the hardware circuits associated with the microcontroller system to properly handle the request behind the interrupt.
However, while conventional methods allow for configuring microcontroller systems according to some specific or desired configuration, it cannot be specified how to transit from a previous configuration to a new configuration. A need may therefore arise to optimize the “choreography” of applying a configuration to operational units in terms of power consumption and/or execution speed. This may be especially the case when many operational units of the microcontroller system are involved in a configuration.
There are cases where the configuration of a second operational unit depends on the first operational unit being already configured. As an example, a second operational unit may have to wait until a first operational unit provides a stable power supply or a stable clock signal to it. Conventionally, operational units that depend on the configuration of another unit may wait for a local signal, such as a “ready” signal before applying the configuration. Often, digital circuits may settle quickly after being powered up, and are immediately ready for operation. In contrast, power gating, for example, may require capacitors to support peak energy during switching and operational activity. The power gate transistor and capacitor may constitute a highly variable delay element. Powering-up power-gated circuits usually needs the respective supply voltage being settled before the hard- and/or software can reliable interact with other circuits. Moreover, upon power-up or upon change of their operation parameters, analog circuits may require settlement of their voltage until reliable operation can be ensured. Examples that require to settle for proper operations are, e.g., when a comparator is switched from low speed to high speed, a voltage reference is to be powered up, a channel to an A/D converter is to be selected, etc.
Furthermore, in some cases, an operational unit may be internally designed to conduct initialization steps in a specific order. For example, the ramp-up behavior of subsystems of a microcontroller system may be determined by the hardware designer of that component. However, such local and “hard-wired” solutions are inflexible and do not allow to optimize system performance and/or energy consumption of the entire system. Hence, even when there are no strict sequential dependencies, application designers and programmers of microcontroller systems may wish to optimize the dynamic process when a microcontroller system transits to a new configuration.
A need for a more flexible handling of microcontroller system configurations may therefore exist. Embodiments of the present invention therefore involve coordination information to coordinate a transition to a configuration of operational units of the microcontroller system.
The event control means 250 according to
According to some aspects, configuration control means 255 may be adapted to configure the operational units of the microcontroller system, which is illustrated in
In some aspects, the configuration of the operational units may be related to energy consumption and/or safe operation of the microcontroller system. As an example, energy consumption of a microcontroller system can be influenced by power gating, clock gating, and/or dynamic voltage/frequency scaling of operational units associated with the system. In power gating, the supply voltage of an operational unit can be switched either on or off. In this way, static energy consumption of operational units (e.g., due to leakage currents semiconductor devices) can be minimized. Clock gating may reduce the dynamic or switching energy consumption of operational units. Clock gating turns off clocks, thereby freezing the operational state while still maintaining the original functionality of a unit. A further technique to tailor energy consumption of an operational unit is dynamic voltage/frequency scaling. Usually, the maximum frequency at which a hardware component can operate is dependent on the supply voltage. For example, operational units may operate based on a supply voltage that is reduced compared to the maximum supply voltage. In these cases, the maximum frequency at which the system can operate is reduced. However, in these configurations, the energy consumption is limited compared to operation at maximum supply voltage and clock frequency. On the other hand, at high supply voltages and clock frequencies, computational speed is increased, but the static and dynamic energy consumption is also increased. Therefore, in cases where an operational unit may not require the full computational performance, supply voltage as well as clock frequency may be reduced at the same time, achieving a lower energy consumption.
Safe operation of the microcontroller system may be required for preventing resources of the system (e.g., operational units, such as memory segments or other operational modules) from intentionally or unintentionally being corrupted. For example, faults may occur when two or more different units of program execution (e.g., threads) are running in multi-tasking operation. In this case, a first thread may intentionally or unintentionally corrupt the code, data, or stack of another thread. In order to separate the resources of different threads and protect them from intended or unintended access, segments of memory and/or operational units of the microcontroller system may be configured with different levels of protection and access rights. Furthermore, upon detection of a fault, operational units may be configured with a specific protected state in order to recover from fault. For example, such a safe environment may be implemented in a way operational units are associated with identification numbers and/or vectors (ID). A currently active ID, IDnow and a future IDnext associated with an operational unit (after a new configuration getting active) may be part of the configuration data. The currently active IDnow associated with the operational unit may be compared with the IDnow according to the configuration data, where, in case it matches, the process continues. Otherwise the mismatch may be signaled to a safe operation hard- or/and software instance. Furthermore, the currently active IDnow may be part of the return data available in a return situation (IDreturn=IDnow), e.g, from an event, where a safe operation hard- or/and software instance may check whether IDreturn equals IDnow and issue an alert when both IDs are not equal. In other examples, the IDnext may be used to replace the current active IDnow in a “rolling key” mechanism. For example, the replacement may be used to protect the parts of the same system ensuring safe/secure operation in a dynamical way. Furthermore, the ID mechanism in this example may be used to verify that in specific situations the used hard- and/or software (e.g., an event service routine, ESR) match. The ID protection may also be used for specific hard- and/or software partitioning in a microcontroller system and for safe or secure encapsulation from other partitions.
In some aspects of the present disclosure, configuration control means 255 is operable to determine (e.g., identify) a set of configuration data of a plurality of sets of configuration data. The plurality of sets of configuration data are associated with at least one operational unit. The at least one operational unit is associated with the microcontroller system. In the techniques described herein, each set of said plurality of sets of configuration data define a configuration of said at least one operational unit. Furthermore, each set may comprise coordination information. The latter coordination information is to coordinate a transition to a configuration of said at least one operational unit. Furthermore, the configuration control means is operable to configure the microcontroller system corresponding to the determined set of configuration data. The configuring the microcontroller system includes coordinating the transition to the configuration according to the coordination information. The coordinating further employs one or a plurality of coordination states, wherein each coordination state is associated with at least partly configuring said at least one operational unit according to said configuration, or configuring said at least one operational unit by an intermediate configuration, or both.
As illustrated in transition 320, power and clock unit 230 is first configured to provide A/D peripheral 290 with a first voltage V1. As illustrated by Petri Net 300, concurrently by transition 340, power and clock unit 230 is configured to ramp up its PLL to target frequency f0. After expiry of a first time interval τ1, it may be guaranteed that the output voltage of the power and clock unit 230 is sufficiently settled, and that the target frequency f0 is stable. This is in
As can be seen from this illustrative example, the respective coordination information associated with the plurality of sets of configuration data generally defines a “choreography” to coordinate the transition or the transitions to a configuration (e.g., the first configuration, such as target frequency f0 and voltage V2 for power and clock unit 230, and sampling frequency f1 for A/D peripheral 290) of one or more operational units. In some aspects, by determining a set of configuration data of a plurality of sets of configuration data, wherein the plurality of sets are each associated with (the same) at least one operational unit (wherein for illustrative purposes in the present example the at least one operational unit may include power and clock unit 230 and A/D peripheral 290), it is possible to provide different coordination information associated with a configuration (e.g., the first configuration of power and clock unit 230 and A/D peripheral 290, as mentioned above) of the operational unit(s). A configuration in this respect may cover a part of or all aspects configurable with the one or more operational units. For example, an operational unit may be configurable by multiple parameters, where the configuration as discussed above is associated with a part of those parameters, while other parameters of the operational unit may be configured with a fix or a default parameter setting. More specifically, in the above-described example, power and clock unit 230 may not only supply A/D peripheral 290 with a supply voltage and a clock frequency, but also other units, which may be configurable separately by parameters related to supply voltages and/or dock frequencies from power and clock unit 230. Furthermore, the first set of configuration data defining the first configuration and coordination to that configuration of the at least one operational unit may be partly overlap with a second set of configuration data defining a different configuration (or coordination information) of the at least one operational unit. In this case, the first and second sets of configuration data may coincide partly. For example, a set of configuration and coordination data may include parameter values stored in a piece of memory accessible by the microcontroller system. In this case, the overlapping part associated with two or more sets of configuration data may need to be stored only once to save memory space.
In an example, a default coordination information may be stored in a ROM mask of the microcontroller system or may implicitly be defined by the hardware designer of those operational unit(s), as discussed above. By determining a set of configuration data of the plurality of sets of configuration data, the application designer or programmer of the microcontroller system may be able to use one or more different alternative sets of configuration data related to the configuration of the operational unit(s) to tailor power consumption and/or operational speed. In this respect, he is not barred to a default coordination process for a configuration. To illustrate this with respect to the example of
In some aspects, the configuration control means may be operable to determine or identify the set of configuration data of the plurality of sets of configuration data during a startup, boot, or reset state (or mode). In some examples, the determined or identified set of configuration data may then be valid for the entire duration of system operation (e.g., until the next startup, boot, or reset is being performed). In this case, the determined set of configuration data may be used for appropriately configuring the microcontroller system and coordinating the transition to that configuration each time the corresponding configuration of the system is triggered. Hence, in this example, by de-coupling the determination of a set of configuration data and the configuration of the microcontroller system, the determination of a valid set of configuration data does not need to be repeated every time a configuration corresponding to the determined configuration data is triggered.
In some aspects, the determining of a set of configuration data may not or not only be accomplished at startup of the system. Rather, the determining of a set of configuration data may be conducted at an instant when the system is to be configured to the aforementioned configuration e.g., in reaction to an incoming event, etc. In these aspects, for example, configuration control means 255 may be fully operable as described herein when the microcontroller system is in a normal state of operation (such as a run state/mode, idle mode, etc.), in which a central processing unit of the microcontroller system (such as CPU 210) is configured and/or available for handling instructions of an application program. Such normal state of operation may be different from a startup, boot, or reset state (or mode), in which only system programs, for example, microcontroller system setup is operated in order to initialize or reset the system into a defined initial configuration. Parts of the plurality of sets of configuration data may reside in a memory (such as a ROM, or other non-volatile, or other types of memory), wherein additionally or alternatively parts of the sets of configuration data may be loaded to a memory (e.g., into a configuration register) during system start.
As mentioned, the configuration control means is operable to coordinate the transition to a configuration (e.g., the first configuration, as mentioned above) based on the coordination information. In some aspects, in order to facilitate the coordination, the coordinating employs one or a plurality of coordination states, which will be illustrated in more detail in the following. Again, only as a non-limiting example,
Correspondingly, in coordination state Z1, power and clock unit 230 is configured with voltage V2. Furthermore, A/D peripheral 290 is configured with target frequency f1. Hence, in state Z1, the target configuration is finalized by partly configuring power and dock unit 230 and A/D peripheral 290. In coordination state Z1, the output voltage of the power and clock unit and the output frequency of A/D peripheral 290 may not be settled and ready for operation. However, in return state Z2, the target configuration is considered settled. In some aspects, a coordination state may be associated with partly configuring the at least one operational unit according to a target configuration. Additionally, or alternatively, a coordination state may be associated with configuring the at least one operational unit by an intermediate configuration, wherein the latter may differ from a target configuration. In some aspects, there may be only one coordination state. In some aspects, the coordinating may employ a plurality of coordination states. The handling of coordination states and the corresponding configuration steps may be implemented by electronic hardware circuits in configuration control means 255, or any other suitable circuitry associated with microcontroller system 200.
In some aspects according to the present disclosure, each set of said plurality of sets of configuration data includes one or more parameter values being stored in a data structure. The parameter values define the configuration (e.g., the target configuration associated with the determined set of configuration data) of the at least one operational unit and the coordination information (and/or their location). In these aspects, the configuration control means may be further operable to identify a data structure of the determined set of configuration data and extract the parameter values.
This step may involve identifying the determined set of configuration data, ascertaining internal structure of the configuration data, e.g. the length, order and content, and the coordination information towards the target configuration to coordinate the transition to the latter configuration including intermediate configuration steps. In some examples, the coordination data may include conditions for the transition to specific and target configurations, as will be explained below.
In the exemplary example according to
In some aspects according to the present disclosure, the plurality of sets of configuration data comprise at least two sets of configuration data defining a same configuration of said at least one operational unit, wherein each said at least two sets of configuration comprise different coordination information. In these aspects, alternative possibilities of coordination for transition to the same (target) configuration associated with the at least one operational unit may be provided. In one example, a first set of configuration related to a specific configuration may include coordination information designed to provide a fast transition to the target configuration. A second set of configuration data related to that specific configuration may include coordination information designed to provide transition designed to save power.
In some aspects according to the present disclosure, the coordination information may comprise an indication of a sequence of the one or more coordination states. For example, with reference to
In some aspects according to the present disclosure, the coordination information may include an indication of a latency for a transition from one of said coordination states to a next state. The latency may be a time interval measured in seconds, or correspondingly a number of clock or instruction cycles, etc. As shown in the exemplary example of
In some aspects of the present disclosure, the coordination information may include trigger information for a transition from one of said coordination states to a next state, said trigger information may identify a trigger condition. One of the trigger conditions may be, as mentioned, a latency triggering a transition of coordination states. However, there may also be a combination of conditions possible to trigger a coordination state transition. For example, as mentioned with reference to
In some aspects of the present disclosure, trigger information may include branching information for a transition from said one of said coordination states to either a first next state or a second next state. This is illustrated in an exemplary and non-limiting example with respect to
In some aspects of the present disclosure, the configuration control means is further operable to determine branching information and to adjust the configuration based on the branching information. This may be useful in cases where operating conditions of the microcontroller system during coordination process, such as available battery voltage, temperature, system load, etc., may indicate that the target configuration should be modified. In some aspects, the configuration control means may be operable to adjust the (target) configuration based on a feedback signal from the at least one operational unit. Such feedback allows to flexibly adapt the configuration. In some cases, configuration control means 255 may configure the at least one operational unit (e.g., in a first coordination state) to provide a feedback signal or data. Configuration control means 255 may further be operable to, adapt the configuration of the at least one operational unit (e.g., in a second coordination state), based on the feedback signal.
In coordination state Z′1, the frequency divider of A/D peripheral 290 is configured with frequency f2 instead of frequency f1, which is lower, thereby saving power for sampling the input signals to A/D peripheral 290. After expiry of time interval τ1, coordination state Z′1 is left to terminate the configuration at state Z2. Back to coordination state Z1 440, the trigger information may indicate to terminate the configuration at state Z2 when it is determined that the higher frequency f1 is required to sample the input signals to A/D peripheral 290. As can be noted from the examples given in
In some aspects of the present disclosure, the microcontroller system may comprise an event receiving means operable to receive an event, such as event control means 250 as shown in
As the plurality of sets of configuration data are related to a particular event, the coordination to a configuration, (e.g. the first configuration, as mentioned above) may be conducted upon arrival of a specific event. In an example, upon arrival of a specific event, the microcontroller may be configured based on the event, e.g., configured suitable for executing an associated event service routine with optimized power and/or security settings. A configuration based on an event is further specified in application PCT/EP2015/061274, filed on May 21, 2015, also assigned to the applicant of the present disclosure, which is expressly incorporated by reference herein in its entirety. Events may be provided to the configuration control means 255 when they are accepted by event control means 250. As mentioned, in case the configuration data is related to a particular event, also the coordination information can be tailored for transiting to that configuration in an optimum fashion. As an example, an event may require reading input data from A/D peripheral 290, as explained with relation to
Furthermore, by collecting the plurality of sets of configuration data from the memory, the particular coordination information (e.g., the collecting of the plurality of sets of configuration data, and/or the determining of a set of configuration data of the plurality of sets of configuration data) may be based on the event. This may include collecting pre-configured sets of configuration data that relate to the event or a specific group of events, e.g., in reaction to the event received and accepted by event receiving means 250, or based on an event being expected to be received, e.g., depending on a particular operational state or scenario of the microcontroller system. These examples may include determining a set of configuration data in reaction to the event, e.g., based on arguments of the event vector, and/or based on a configuration that was active upon receiving the event, based on the application (e.g. the unit of program execution) that triggered the event, etc. Therefore, it is possible to provide coordination information that can be individually adapted to operating conditions when an event is received or expected. Furthermore, in some aspects, as the collecting of the plurality of sets of configuration data, and/or the determining of a set of configuration data of the plurality of sets of configuration data may be based on the event, the amount of coordination information that is to be considered in the sets of configuration data may further be reduced. More specifically, in these cases, only that coordination information may be considered in the sets of configuration data that may be respectively different from a pre-defined or default configuration. For example, with reference to
Referring now to
Upon arrival of an event, processing of the event starts with stage 902. This stage may be executed by event control means 250 of the microcontroller system 200 as shown in
In order to switch from execution of the process that was present upon arrival of the event, the ERS control stage 904 may stop the latter process and save all information that is necessary for restoring the execution after returning from the event. This data may be denoted as return data. The return data includes, for example, the program counter (PC) of the process executed upon receiving the event pointing toward the instruction that is to be executed next, the status register (SR) or registers of the CPU, including the processor status word (PSW). The return data may also include the present pointer to the stack. In some designs, for reasons of operational safety, all CPU registers may be stored as well, even though they may not be touched during execution of the interrupt service routine. The return data may be stored on a stack memory configured in memory 220 or 280, respectively. In some embodiments, the CPU itself may include memory for the stack. The stack pointer is updated accordingly. Furthermore, in order to execute the event service routine (ESR), the program counter of the CPU may be loaded with the program counter PCESR of the event service routine pointing toward the first instruction thereof.
In order to implement the concepts according to the present disclosure, the ERS control stage 904 may also include the ability to change from a system configuration active upon receiving the event to a new target system configuration, wherein the transiting to the new system configuration is facilitated according to the methods as explained above. In order to provide the ability to return to the configuration that was active upon receiving the event, the respective system configuration may be saved. After saving the system configuration information of the configuration (or, e.g., the corresponding pointer) that was active upon receiving the event, the ERS control stage may collect one or a plurality of sets of configuration data including coordination information from memory 220, 225 or 280. Moreover, the ERS control stage may determine a set of configuration data of the sets of configuration data. Furthermore, the ERS control stage 904 may configure the microcontroller system 200 corresponding to the determined set of configuration data. Transition to the configuration may be accomplished according to the coordination information, using the concepts as explained above. The ERS control stage may further trigger execution of the event service routine (ESR) 906 in order to service the event.
As mentioned above, the advantage of implementing the operation of the configuration control means 255 at least in part within the boundaries of atomic operation (e.g., the steps related to the ERS control stage), is that execution of this stage cannot be disrupted, and the respective data cannot be corrupted by some faulty conditions that may occur when storage process 904 is interrupted by another process. For example, the latency to start with the ESR 906 may be minimized by having a well-defined number of data to be stored during storage process 904, e.g., a defined number of CPU registers, peripheral registers, etc. The restoring process 908 may also rely on correct return data and correct number of return data so that the return process is correctly executed. However, for example, in case the storage process 904 is interrupted by another process, a faulty condition, as mentioned above, may occur. In this case, the interrupting process may have no indication that the storage process is still in progress. This may end in an unsafe operation in a critical scenario that may even be hard to identify. In order to avoid such faulty conditions, in some examples, the steps related to collecting the set(s) of configuration data, the determining a set of configuration data, and/or the configuration of the microcontroller system according to the determined set of configuration data performed by configuration control means 255 may be performed within the boundaries of atomic operation, initiated by configuration control means 255 and/or the event control means 250 without any intervention of an operating system. Some examples may also include the steps of saving system configuration information associated with a system configuration active upon receiving the event and the execution of the event service routine within the atomic operation boundaries of the ERS control stage 904. Furthermore, in some examples, the entire process triggered by receiving the event until returning from the event may be within the boundaries of atomic operation, to conduct event service in an energy and performance efficient way. In other examples, atomic operation may be divided into multiple parts of atomic operations, which reduces latency, as the portions underlying atomic operations may be fix by implementation or be controlled by configuration control means. Such divided atomic operation may be useful to ensure that all steps are executed in the required sequence and in the required configuration. Stage 906 in
After execution of the event service routine is terminated, the processor state of the process that was active upon receiving the event may be restored in order to continue execution of the latter process. In microcontroller systems, the return data as mentioned above, e.g. the program counter of the process executed upon receiving the event, the status register or registers of the CPU, including the processor status word, etc., may be restored from the stack or the stacks in order to switch from execution of the event service routine to continue the process executed by the microcontroller system 200 that was present upon receiving the event. This is performed during the return from event (RETE) stages 908 and 910. In stage 908, the return data as described above is restored. During stage 910, the program counter is loaded with the next instruction PCNEXT of the program flow of the process to be returned to.
RETE stages 908 and 910 may also include the ability to restore the system configuration active upon receiving the event. In this respect, e.g., RETE stage 908 may also include restoring the configuration information associated with the system configuration active upon receiving the event, and e.g., RETE stage 910 may also include configuring the microcontroller system corresponding to the system configuration active upon receiving the event, as described above. However, in order to coordinate the restoring of the previous configuration, the sets of configuration data may also include coordination information to coordinate the restoring of the previous configuration. The return from event stages 908 and 910 including the restauration of the system configuration as described may be implemented by the configuration control means 255 and/or the event control means 250 using an atomic process that is initiated without any intervention of an operating system and cannot be interrupted within the boundaries of atomic operation, as discussed above. In some situations, however, restauration of the system configuration that was active before receiving the event may not be useful. This may be indicated at runtime (e.g., as an argument of an event vector) by a return data indicator defining the behavior of the RETE stage 908. In an example, a sequence of events may be expected requiring a particular target configuration. In such cases, a configuration may be kept after the return from the respective event so that repeated re-configuring of the microcontroller system can be avoided.
In some aspects of the present disclosure, the set of configuration data may be determined based at least in part on event execution control data associated with the event. In some aspects, any information that is available at the time when the event is received can be used as execution control data. For example, event execution control data may be data that is received with the event or may be otherwise available at the time instant when the event is received. As a more specific example, an event signal may comprise an event vector identifying the event, and include a pointer pointing toward a program counter of an event service routine. The event vector may further include arguments (e.g., parameters) for configuring the event. In some aspects, techniques according to the present disclosure may include determining the set of configuration data including the coordination information based on the address and the arguments of the event vector.
In some aspects according to the present disclosure, the event execution control data may include system state information associated with the execution status of the microcontroller system. Execution status information may be associated with information characterizing an inner state of the system at the time when the event arrives. Examples of such data may be the content of program status registers, condition code registers, the program stack storing return data, peripheral unit status, i.e., data needed to continue the interrupted process after the event is served, status of operational units, etc.
In some aspects according to the present disclosure, the system state information includes a system configuration active upon receiving the event. In some examples, this information may be stored on a stack for serving the event, in order to return to the system configuration that was active upon receiving the event. In some cases, the system configuration that was active upon receiving the event may not provide sufficient resources for serving the event. Hence, for serving the event, for example, some operational units of the microcontroller system shall be properly configured. Therefore, the configuration of the microcontroller may be changed, an appropriate set of configuration data including the coordination information for applying this change may be determined for transiting to the configuration used to service the event.
In some aspects according to the present disclosure, program code associated with an event service routine for handling the event and said sets of configuration data is stored in respective portions of the memory 220, 225, 280, wherein a memory location for collecting said sets of configuration data including the coordination information is based on an event identifier associated with said event. In some examples, the configuration data include a definition of a particular target configuration of the microcontroller system (e.g., a set of respective configuration parameters related to the operational units to be configured), the coordination information to transit to said particular target configuration, as well as the structure information about the set of configuration data. In some examples, the memory location for collecting the sets of configuration data from the memory as explained above may be derivable from an event identifier, e.g., an event vector or an event signal, etc., so that collection of the sets of configuration data including the coordination information can be accelerated. Furthermore, it is to be appreciated that the configuration data need not be stored in a register, which is rather expensive. Rather, for storing the configuration data, the same type of memory which is also used for storing the event entry pointer and/or code of the event service routine can be used. This enables an inexpensive design for different configurations of the system. Furthermore, the set of configuration data in the memory can be changed in case of a software or hardware modification by changing the data in the memory without executing a dedicated step to store new configuration data in a register.
For processing of the event, in this example, event control means 250 may accept the event by executing control stage 902, as explained above. Further, in the present example, configuration control means 255 may execute ERS control stage 904. As explained above, in stage 904 all information that is necessary for restoring the execution after returning from the event may be saved. Furthermore, stage 904 includes the collecting of the sets of configuration data. As an exemplary example, configuration data sets #1 to #6 are collected by configuration control means 255 from memory 280, as illustrated in
In some examples, collecting configuration data sets may include retrieving the data from the memory and store the data in a register associated with configuration control means 255. Alternatively, as shown in
Further in ERS control stage 904, a set of configuration data out of the sets #1, #2, #3, #4, #5 and #6 is determined. In the present example, this selection can be based on the selector bits z0 and z1. In an example, selector bits z0 and z1 may indicate a unit of program execution, e.g., a thread related to a specific application that triggered the event. However, selector bits z0 and z1 may also relate to other software units, such as hardware drivers that may have triggered the event. In other examples, the selection of a set of configuration data may also be based on the event identifier (e.g., an interrupt address, having M bits in
ERS control stage 904 may further configure the microcontroller system 200 corresponding to the determined set of configuration data. The ERS control stage may further trigger execution of the event service routine (ESR) 906 in order to service the event. In the present example, the most significant M bits may be used as the effective address of the program counter address PCESR. In other embodiments, the most significant M bits may directly serve as the program counter address PCESR pointing toward the first instruction of the event service routine in memory 280. After executing the event service routine, RETE stages 908 and 910 may restore the system configuration active upon receiving the event, as explained above. As an alternative, the most significant M bits may point toward the set of configuration data. In this alternative, the address of the PCESR or pointer to PCESR may be derivable using a known offset. In the example according to
While in the foregoing example, the plurality of sets of configuration data is stored in respective portions of memory 280, and a pointer (illustrated by the dashed arrow in
According to some aspects of the present disclosure, the program code associated with an event service routine for handling the event and at least one of the sets of configuration data including the coordination information is stored in contiguous portions of the memory. In these aspects, the memory location of the system setting information can be easily derived, e.g., from the program counter pointing toward the block of memory locations. Furthermore, the sets of configuration data or at least one of those (e.g., the one determined from the plurality of sets of configuration data) can be loaded from the memory together with the program instructions of the event service routine e.g., by using a burst read mode, which accelerates reception of the system setting information associated with the one or more operation modes. Moreover, by storing the sets of configuration data together with the respective program code, the related sets of configuration data including the coordination information can be included in a simple fashion, when a new application or other function is downloaded and installed on the microcontroller system.
Storing the configuration data including the coordination information and the program code associated with the event service routine in contiguous portions of the memory may in particular be useful where each event shall be configured with different configuration data including coordination information.
In this example, an event may arrive having an event vector of length N bits as illustrated in
In this example, it may not be necessary for ERS control stage 904 to retrieve the sets of configuration data and the instructions of the event service routine separately. Instead, the first M bits of the event vector address are used as a pointer pointing toward the first configuration data set. Furthermore, the length of the configuration data sets is known to configuration control means, for example by an initialization of configuration control means 255. Therefore, ERS control stage 904 can derive the program counter PCESR pointing toward the first instruction of the event service routine. For example, in
According to aspects of the present disclosure, the collecting of one or a plurality of sets of configuration data may comprise collecting one or a plurality of sets of configuration data from the memory based on at least one pointer pointing toward at least one set of configuration data stored in a portion of the memory. In some implementations, the amount of data to be collected may be large. In these situations, it may be desirable to reduce the amount of data that has to be retrieved from memory 220, 225 or 280 during the collection. Hence, instead of physically collecting the data, only a pointer may be received or derived, which points towards the configuration data. In some examples, a single pointer may be obtained pointing towards a contiguous portion of the memory storing the sets of configuration data. In these examples, an offset may be determined upon determining a set of configuration data of the sets of configuration data that is used for configuring the microcontroller system. In other examples, pointers to individual sets of configuration data may be obtained or derived. In these examples, a pointer pointing toward the particular set of configuration data may be selected upon determining a set of configuration data of the sets of configuration data.
In some aspects of the present disclosure, the configuration control means 255 may include a state machine, operable to coordinate the transition to said configuration according to said coordination information, wherein said state machine is operable to coordinate the transition to said configuration within an atomic process.
In operation, configuration control means 255 may store the sets of configuration data including a target configuration in configuration register 1210. Furthermore, related coordination information may be stored in coordination register 1220. A set of configuration data may be determined by configuration control means 255 by the methods as explained above. In order to configure the microcontroller system corresponding to the determined set of configuration data, configuration state machine 1230 may receive the configuration from a configuration register 1210, and the coordination information from coordination information register 1220. Hence, one or a plurality of coordination states, the corresponding configuration, and the respective state transition function is provided to configuration coordination state machine 1230. Configuration coordination state machine 1230 then performs the configuration, wherein each coordination state may be associated with partly configuring the respective at least one operational unit according to the target configuration, and/or configuring the respective at least one operational unit by an intermediate configuration. In some examples, configuration state machine 1230 may perform operations as described with
As explained in detail above with respect to exemplary examples related to microcontroller system 200, the method as explained above generally defines a “choreography” to coordinate the transition or the transitions to a configuration (e.g., a first configuration) of one or more operational units. By determining a set of configuration data of the plurality of sets of configuration data according to method 1300, the application designer or programmer of the microcontroller system can use one or more different alternative sets of configuration data related to the configuration of the operational unit(s) to tailor power consumption and/or operational speed.
In some aspects, the techniques as explained above may be implemented by a computer program comprising program instructions executable to implement all steps of the method. The computer program may be associated with a computer program product directly loadable into the internal memory of a digital computer, comprising software code portions for performing the steps of said method when said product is run on a computer. However, the program instructions as mentioned above may also serve to implement the techniques as described herein by electronic circuits. For example, the program instructions may include hardware description language code. In some embodiments, corresponding functions of the computer program may be stored on computer-readable medium having computer-executable instructions adapted to cause the computer system to perform one of the methods as described above.
The various components, configurations, operations, portions, operational units, functional islands, operational modules, circuits, event control means, configuration control means, methods and steps, etc., have been described generally in terms of their functionality. Whether such functionality is implemented as hardware or processor executable instructions depends upon the particular application and design constraints imposed by the overall microcontroller system. Additionally, the various operations of methods described above may be performed by any suitable means capable of performing the operations, such as hardware and/or software components, electronic circuits and/or modules. Any operation as illustrated above may be performed by corresponding functional means capable of performing the operations, such as event control means 250 and configuration control means 255. Skilled persons in the art may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2016/064044 | 6/17/2016 | WO | 00 |
