This application claims the benefit of Taiwan application Serial No. 105129795, filed Sep. 13, 2016, the subject matter of which is incorporated herein by reference.
The invention relates in general to an electronic signal receiving apparatus, and more particularly to a technology for estimating carrier frequency offset (CFO) in an electronic signal receiving apparatus.
Various types of communication systems get more and more popular as related technologies in the electronics field continue to advance. Both a transmitter and a receiver of a communication system are provided with at least one oscillation signal source (e.g., a quartz oscillator) that provides a clock signal as a basis for circuit operations. Clock frequencies of the transmitter and the receiver need to achieve certain consistency in operation so that the receiver can correctly parse signals sent from the transmitter. The frequency of a clock signal that the receiver adopts for down-converting an input signal might differ from the frequency of a clock signal that the transmitter adopts for up-converting a baseband signal, and such issue is commonly referred to as carrier frequency offset (CFO) at the receiver. The CFO may lead to inter-carrier interference, causing negative effects such as degraded system performance of the receiver, and the receiver may even become incapable of parsing its input signal in some severe cases. Exact matching between the oscillators of a transmitter and a receiver is extremely difficult, and so the receiver is usually designed with a mechanism for compensating CFO. In general, frequency offset compensation can be effectively conducted only if a receiver estimates the value of the CFO correctly.
However, if the signal y(t) is propagated through a multipath, the input signal y(t) is often mixed with an echo signal. The echo signal may affect the energy distribution of the foregoing 4th order spectrum Z(f) to an extent that the peak frequency Ω calculated by the peak frequency determining circuit 13 is not four times the CFO (a four-fold CFO), in a way that the frequency offset determining circuit 14 generates an incorrect estimated CFO ΔfE.
The invention is directed to an apparatus and method for estimating carrier frequency offset.
According to an embodiment of the present invention, an apparatus for estimating carrier frequency offset is provided. The apparatus includes N notch filters, an Mth power circuit, a spectrum generating circuit, a peak frequency determining circuit, a comparing circuit and a frequency offset determining circuit. The N notch filters have respective different notch frequencies, and filter an input signal to generate N filtered signals, where N is an integer greater than 2. The Mth power circuit performs an Mth power calculation on the N filtered signals to generate N Mth power filtered signals, where M is an integer greater than 1 and is associated with a modulation scheme of the input signal. The spectrum generating circuit generates respective Mth order spectra for the N Mth power filtered signal. The peak frequency determining circuit determines N peak frequencies according to the N Mth order spectra. The comparing circuit identifies an optimal peak frequency from the N peak frequencies, wherein the optimal peak frequency is a peak frequency that is different from the other peak frequencies among the N peak frequencies. The frequency offset determining circuit determines an estimated carrier frequency offset according to the optimal peak frequency.
According to another embodiment of the present invention, a method for estimating carrier frequency offset is provided. According to an input signal, N different notch frequencies are set, where N is an integer greater than 2. The input signal is filtered by the N different notch frequencies to generated N filtered signals. An Mth power calculation is performed on the N filtered signals to generate N Mth power filtered signals, where M is an integer greater than 1 and is associated with a modulation scheme performed on the input signal. Respective Mth order spectra are generated for the N Mth power filtered signals. Respective peak frequencies of the N Mth order spectra are determined. An optimal peak frequency is identified from the N peak values, wherein the optimal peak frequency is a peak frequency that is different from the other peak frequencies among the N peak frequencies. An estimated carrier frequency offset is determined according to the optimal peak frequency.
The above and other aspects of the invention will become better understood with regard to the following detailed description of the non-limiting embodiments. The following description is made with reference to the accompanying drawings.
It should be noted that, the drawings of the present invention include functional block diagrams of multiple functional modules related to one another. These drawings are not detailed circuit diagrams, and connection lines therein are for indicating signal flows only. The interactions between the functional elements/or processes are not necessarily achieved through direct electrical connections. Further, functions of the individual elements are not necessarily distributed as depicted in the drawings, and separate blocks are not necessarily implemented by separate electronic elements.
Based on the Applicant's observation, the shape of a spectrum Y(f) of an input signal y(t) without any echo signal is usually symmetrical to a center frequency fcenter, as shown in
The apparatus and method for estimating CFO of the present invention may be applied to a receiver of various communication systems, for example but not limited to, a Digital Video Broadcasting-Satellite (DVB-S) receiver or a Digital Video Broadcasting-Cable (DVB-C) receiver.
An input signal y(t) of the CFO estimating circuit 300 is a quadrature phase shift keying (QPSK) baseband signal. In practice, the baseband signal may be, for example but not limited to, a radio-frequency (RF) signal generated through a low-noise amplifier (LNA), a down-converting circuit, an analog-to-digital converter (ADC), and a low-pass filter (LPF) in a receiver.
The notch frequency setting circuit 36 sets different notch frequencies fN1, fN2 and fN3 for the notch filters 35A to 35C according to the input signal y(t). The notch filters 35A to 35C perform a filtering process on the input signal y(t) to generate filtered signals y1(t), y2(t) and y3(t). Based on the spectrum Y′(f) shown in
The 4th power circuit 31 performs a 4th power calculation on the filtered signals y1(t), y2(t) and y3(t) to generate respective 4th power filtered signals y14(t), y24(t) and y34(t). The spectrum generating circuit 32 then generates corresponding 4th order spectra Z1(f), Z2(f) and Z3(f) according to the 4th power filtered signals y14(t), y24(t) and y34(t), respectively. In practice, the spectrum generating circuit 32 may be, for example but not limited to, a fast Fourier transform (FFT) circuit. The peak frequency determining circuit 33 determines peak frequencies Ω1, Ω2 and Ω3 from the 4th order spectra Z1(f), Z2(f) and Z3(f), respectively. It should be noted that, implementation details of the 4th power circuit 31, the spectrum generating circuit 32, the peak frequency determining circuit 33 are generally known to one person skilled in the art, and shall be omitted herein.
Taking the input signal shown in
The comparing circuit identifies an optimal peak frequency Ω0 from the peak frequencies Ω1, Ω2 and Ω3, and outputs the optimal peak frequency Ω0 to the frequency offset determining circuit 34. The optimal peak frequency Ω0 is a peak frequency that is different from the other peak frequencies among multiple peak frequencies. Next, the frequency offset determining circuit 34 determines an estimated CFO ΔfE according to the optimal peak frequency Ω0. In one embodiment, the frequency offset determining circuit 34 may divide the optimal peak frequency Ω0 by four to generate the estimated CFO ΔfE.
In one embodiment, the comparing circuit 38 may be realized through executing an instruction stored in a memory by a processor.
When it is determined that the peak frequencies Ω1 and Ω2 are different in step S71, it is determined whether the peak frequencies Ω2 and Ω3 are the same in step S73. When it is determined that the peak frequencies Ω2 and Ω3 are the same in step S73, it means that the peak frequency Ω1 is different from the other two peak frequencies Ω2 and Ω3, and so the peak frequency Ω1 is outputted as the optimal frequency Ω0. When it is determined that the peak frequencies Ω2 and Ω3 are different in step S73, it means that the peak frequencies Ω1, Ω2 and Ω3 are all different, which means that the input signal y(t) is severely interfered by noise. Thus, in step S77, one of the peak frequencies Ω1, Ω2 and Ω3 may be outputted as the optimal peak frequency Ω0. Taking
One person skilled in the art can understand that, the order of the determination steps or combinations of the determination logics may be equivalent exchanged, and such modifications do not affect the overall effect of the determination process.
It should be noted that, in other embodiments of the present invention, the CFO estimating apparatus 300 may include four, five or even more notch filters.
It should be noted that, in other embodiments of the present invention, the 4th power circuit 31 may be replaced by an Mth power circuit, where M is a positive integer greater than 1 and is associated with a modulation scheme performed on the input signal y(t). For example, when the modulation scheme of the input signal y(t) is QPSK, the integer M may be equal to an integral multiple of 4, e.g., 4 or 8. Similarly, when the modulation scheme of the input signal y(t) is 8 phase shift keying (8PSK), the integer M may be an integral multiple of 8, e.g., 8 or 16. However, corresponding to the Mth power circuit, the peak frequency Ω determined by the peak frequency determining circuit 33 corresponds to an M-fold CFO Δf, and so the frequency offset determining circuit 34 may generate the estimated CFO ΔfE according to the value M. For example, when M=8, the frequency offset determining circuit 34 may divide the peak frequency Ω identified by the peak frequency determining circuit 33 by 8 to generate an estimated CFO ΔfE.
In practice, the peak frequency determining circuit 33, the frequency offset determining circuit 34 and the comparing circuit 38 may be realized by fixed and programmable logic circuits, e.g., programmable logic gate arrays, application-specific integrated circuits, microcontrollers, microprocessors and digital signal processors (DSP). Further, the peak frequency determining circuit 33, the frequency offset determining circuit 34 and the comparing circuit 38 may also be realized through executing an instruction stored in a memory by a processor.
One person skilled in the art can understand that, operation variations in the description associated with the CFO estimating apparatus 300 are applicable to the CFO estimating in
While the invention has been described by way of example and in terms of the embodiments, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
Number | Date | Country | Kind |
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105129795 | Sep 2016 | TW | national |