This application claims the benefit of Taiwan application Serial No. 100133048, filed Sep. 14, 2011, the disclosure of which is incorporated by reference herein in its entirety.
1. Technical Field
The disclosed embodiments relate in general to an apparatus and a method for processing image feature descriptor.
2. Description of the Related Art
Referring to both
Before matching the features, the feature coordinates of a to-be-matched feature point 22 is read from the dynamic random access memory 11 to determine whether the to-be-matched feature point 22 falls within the matching search window 21. If so, the vector of the to-be-matched feature point 22 is then read from the dynamic random access memory 11 to perform feature matching.
The disclosure is directed to an apparatus and a method for processing image feature descriptors. With the headers and the vectors being stored to a header storage unit and a vector storage unit respectively, the read efficiency during feature matching is thus increased.
According to one embodiment, an image feature descriptor processing apparatus is provided. The image feature descriptor processing apparatus comprises a header storing unit, a vector storing unit, a feature capture unit, a distribute unit, and a memory controller. The feature capture unit captures image feature descriptors. The distribute unit generates a header base address, a vector base address, headers, and vectors according to the image feature descriptors. The memory controller continuously writes the headers to the header storage unit according to the header base address and continuously writes the vectors to the vector storage unit according to the vector base address.
According to another embodiment, an image feature descriptor processing method is provided. The image feature descriptor processing method comprises the steps of capturing image feature descriptors; generating a header base address, a vector base address, headers, and vectors according to the image feature descriptors; and continuously writing the headers to the header storage unit according to the header base address and continuously writing the vectors to the vector storage unit according to the vector base address.
In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the disclosed embodiments. It will be apparent, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are schematically shown in order to simplify the drawing.
Referring to both
The header storage unit 31 and the vector storage unit 32 can such as share the same dynamic random access memory (DRAM).
The feature capture unit 33 is coupled to the distribute unit 34. The memory controller 35 is coupled to the header storage unit 31, the vector storage unit 32, the distribute unit 34 and the feature compare unit 36. The feature capture unit 33 captures image feature descriptors F1˜Fn, wherein n is a positive integer. The feature capture unit 33 generates image feature descriptors F1˜Fn according to such as the scale invariant feature transform (SIFT) algorithm.
The distribute unit 34 generates a header base address HA, a vector base address VA, headers H1˜Fn and vectors V1˜Vn according to image feature descriptors F1˜Fn. The headers H1 comprises a feature number FN1, feature coordinates FC1 and an orientation O1. The feature descriptor F2 comprises a feature number FN2, feature coordinates FC2 and an orientation O2. By the same analogy, the feature descriptor Fn comprises a feature number FNn, feature coordinates FCn and an orientation On. Furthermore, the headers H1˜Hn can respectively comprise other information not belonging to the vectors V1˜Vn. In addition, the headers H1 can merely comprise the feature number FN1 and the feature coordinates FC1 but not the orientation O1.
The memory controller 35 continuously writes the headers H1˜Hn to the header storage unit 31 according to the header base address HA, so that the headers H1˜Hn are continuous in the memory address of the header storage unit 31. The memory controller 35 continuously writes the vectors V1˜Vn to the vector storage unit 32 according to the vector base address VA, so that the vector V1˜Vn are continuous in the memory address of the vector storage unit 32.
Referring to
Then, as indicated in step 54, the memory controller 35 continuously reads at least a part of headers from the header storage unit 31. Then, as indicated in step 55, the feature compare unit 36 locates the feature descriptors falling within a matching search window according to headers H1˜Fn. Then, as indicated in step 56, the memory controller 35 reads the vectors of the feature descriptors falling within the matching search window from the vector storage unit 32. Then, as indicated in step 57, the feature compare unit 36 performs feature matching according to the vectors of the feature descriptors falling within the matching search window. Since the image feature descriptor processing apparatus 3 can continuously read at least a part of headers, the time for reading the headers is thus reduced and the feature matching speed is increased accordingly. When the present embodiment is used in a dynamic random access memory which has superior efficiency in continuous access, the overall feature matching speed is increased.
Referring to both
As indicated in step 74, the memory controller 35 continuously reads the headers H1˜Hn from the header storage unit 31. As indicated in step 76, the memory controller 35 temporarily stores the headers corresponding to the feature points falling within the matching search window to the header register 37. Then, as indicated in step 77, the memory controller 35 reads the vectors of corresponding feature descriptors from the vector storage unit 32 according to the headers temporarily stored in the header register 37.
The image feature descriptor processing apparatus 6 firstly continuously reads the headers stored in the header storage unit 31 and then reads the vectors of the feature descriptors falling within the matching search window from the vector storage unit 32 according to the headers temporarily stored in the header register 37, so that the time for reading the headers is reduced and the feature matching speed is increased accordingly.
It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments. It is intended that the specification and examples be considered as exemplary only, with a true scope of the disclosure being indicated by the following claims and their equivalents.
Number | Date | Country | Kind |
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100133048 | Sep 2011 | TW | national |