Claims
- 1. An apparatus for simulating switched capacitor circuits, comprising:
a programmable computing device; a design tool associated with the programmable computing device and configured for interaction with a user, the design tool comprising computer program code embodied in the programmable computing device including a sub-circuit definition for defining a sub-circuit of a programmable circuit device; and a behavioral simulator associated with the design tool and configured to represent each sub-circuit via a set of discrete time-domain equations giving output of the sub-circuit as a function of input to the sub-circuit.
- 2. The apparatus of claim 1 further comprising a user interface associated with the programmable computing device and configured to enable a user at the user interface to interact with the design tool.
- 3. The apparatus of claim 2 wherein the set of discrete time-domain equations is provided by a sub-circuit simulation model for the sub-circuit.
- 4. The apparatus of claim 3 wherein each sub-circuit simulation model is compatible with the design tool and is used by the design tool, but is not an integral part of the design tool.
- 5. The apparatus of claim 3 wherein the sub-circuit simulation model is part of a sub-circuit definition.
- 6. The apparatus of claim 5 wherein the sub-circuit definition provides the sub-circuit simulation model in a manner that eliminates the need to recompile the design tool when new sub-circuits are created, or when existing sub-circuits are modified by a user of the design tool.
- 7. The apparatus of claim 3 wherein a sub-circuit simulation model comprises one or more algorithms.
- 8. The apparatus of claim 7 wherein the one or more algorithms are each realized at least in part in interpreter code.
- 9. The apparatus of claim 8 wherein the design tool is configured to store data about a state of a circuit being simulated.
- 10. The apparatus of claim 9 wherein the behavioral simulator is configured to combine the algorithms with the data about the state of the circuit being simulated and return information about a state of the sub-circuit.
- 11. The apparatus of claim 10 wherein the behavioral simulator returns information about output voltage for the sub-circuit.
- 12. The apparatus of claim 1 wherein the design tool is configured to define a sub-circuit of a field programmable analog array.
- 13. The apparatus of claim 12 wherein the sub-circuit comprises switched-capacitor circuits realizable in a field programmable analog array.
- 14. The apparatus of claim 1 wherein the behavioral simulator is configured to provide input signals to selected circuit nodes of the sub-circuit.
- 15. The apparatus of claim 1 wherein the behavioral simulator is configured to display output data from selected circuit nodes of the sub-circuit.
- 16. The apparatus of claim 1 wherein the design tool enables a user to assign each of a plurality of sub-circuits with one or more clock signals.
- 17. The apparatus of claim 16 wherein the behavioral simulator is configured to simulate clock ticks and is operative to execute individual behavioral sub-circuit models in a particular order as determined at least in part by the clock ticks and a wiring layout connecting together the sub-circuits.
- 18. The apparatus of claim 3 wherein the sub-circuit simulation model is provided by a configurable analog module in the form of a text file that is capable of being read by the design tool.
- 19. The apparatus of claim 18 wherein the configurable analog module is selected and placed in memory of the programmable computing device at a detectable location relative to other sub-circuits, and the sub-circuits are then wired together.
- 20. A method for simulating switched-capacitor circuits realized in a field programmable circuit device, comprising:
providing a programmable computing device, a design tool associated with the programmable computing device, and a behavioral simulator associated with the design tool; embodying computer program code in the programmable computing device including a sub-circuit definition for defining a sub-circuit of a programmable circuit device; and modeling a circuit as a collection of one or more sub-circuits, with each sub-circuit being represented by a set of discrete time-domain equations giving output as a function of input.
- 21. The method of claim 20 further comprising providing a user interface associated with the programmable computing device, and visually rendering a modeled circuit on the user interface.
- 22. The method of claim 21 further comprising visually rendering a plurality of sub-circuits on the user interface, and further comprising wiring together at least two of the sub-circuits.
- 23. The method of claim 22 further comprising placing at least one signal generator on the user interface in association with the wired-together sub-circuits.
- 24. The method of claim 22 further comprising placing at least one oscilloscope probe via the user interface in association with the wired-together sub-circuits.
- 25. The method of claim 20 wherein a sub-circuit is provided by a configurable analog module in the form of a text file that is capable of being read by the design tool.
- 26. A method for simulating switched-capacitor circuits, comprising:
providing a programmable computing device having a user interface, a design tool associated with the programmable computing device, and a simulator associated with the design tool for representing individual configurable analog modules via a set of discrete time-domain equations giving output of the configurable analog module as a function of input of the configurable analog module; selecting a particular configurable analog module via the user interface; placing the selected configurable analog module on the user interface in association with another configurable analog module; and wiring together the selected configurable analog module with the another configurable analog module via the user interface.
- 27. The method of claim 26 wherein the simulator uses a wirelist comprising a list of wires placed by a user in order to connect together the one configurable analog module with another configurable analog module.
- 28. The method of claim 26 wherein each of the sets of discrete time-domain equations provides simulation equations, and further comprising executing the simulation equations sequentially in an order determined by a clock associated with each configurable analog module.
- 29. The method of claim 28 further comprising detecting zero-delay loops within a circuit of the sub-circuits which is incapable of being simulated correctly, and warning a user upon detection of a zero-delay loop.
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application claims priority in U.S. Provisional Patent Application Serial No. 60/407,509, entitled “Apparatus and Method for Simulating Switched Capacitor Circuits”, which was filed on Aug. 29, 2002, and which is incorporated by reference herein.
Provisional Applications (1)
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Number |
Date |
Country |
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60407509 |
Aug 2002 |
US |