Patent Application
20060238936
This invention relates generally to a transient blocking apparatus and methods that employ relays in conjunction with depletion mode devices for uni-directional and bi-directional protection against transients.
Many circuits, networks, electrical devices and data handling systems are operated in configurations and environments where external factors can impair their performance, cause failure or even result in permanent damage. Among the most common of these factors are over-voltage and over-current transients. Protection against these is important and has been addressed in the prior art in a number of ways, depending on the specific electronics and their application.
Fuses that employ thermal or magnetic elements are one common protection measure. For example, some circuits employ relays in their systems to cause protective blocking in either direction. Exemplary prior art protection circuits that use relays, including circuits with MOSFETs, include U.S. Pat. Nos. 4,453,191; 4,484,245; 5,536,980; 5,926,354; 6,373,670; 6,759,835 and 6,891,705.
Protection circuits are further specialized depending on conditions and application. For example, in the case of protecting batteries or rechargeable elements from overcharging and over-discharging one can refer to circuit solutions described in U.S. Pat. Nos. 5,789,900; 6,313,610; 6,331,763; 6,518,731; 6,914,416; 6,948,078; 6,958,591 and U.S. Published Application 2001/00210192. Still other protection circuits, e.g., ones associated with power converters for IC circuits and devices that need to control device parameters and electric parameters simultaneously also use these elements. Examples can be found in U.S. Pat. Nos. 5,929,665; 6,768,623; 6,855,988; 6,861,828.
When providing protection for very sensitive circuits, such as those encountered in telecommunications the performance parameters of the fuses and protection circuits are frequently insufficient. A prior art solution which satisfies a number of the constraints and is embodied in a transient blocking unit (TBU) is taught in international applications PCT/AU94/00358; PCT/AU04/00117; PCT/AU03/00175; PCT/AU03/00848 as well as U.S. Pat. Nos. 4,533,970; 5,742,463 and related literature cited in these references.
One significant theoretical limitation of the TBU is that it relies on the use of both n-channel and p-channel field effect transistors (FETs). While n-channel FETs with the correct characteristics can be manufactured quite easily, p-channel FETs with low resistance and moderate breakdown voltage are expensive. The theoretical limiting factor involved in making the p-channel FET is that the mobility of carriers in p-channel material is considerably lower than that in n-channel material. For these reasons, building large volumes of TBUs with low series resistance, low voltage drop and a reliable and repeatable trip current Itrip results in a price-performance trade-off that limits the number of applications for which this solution is appropriate.
In view of the above prior art limitations, it is an object of the invention to provide an transient blocking apparatus that has a low series resistance, low voltage drop and is sufficiently low-cost to be feasible for additional high volume applications.
It is another object of the invention to ensure that the apparatus have a very reliable and repeatable trip current Itrip and be highly robust.
Still another object of the invention is to provide for a method for transient blocking that can be employed for uni-directional or bi-directional blocking at lower cost than TBUs containing p-channel FETs.
These and other objects and advantages of the invention will become apparent from the ensuing description.
The objects and advantages of the invention are addressed by an apparatus for blocking a transient, and by a method for implementing transient blocking. The apparatus has a depletion mode n-channel device located at its input. A normally closed relay is interconnected with the depletion mode n-channel device and the input in such a way that at a predetermined current value the transient causes the normally closed relay to switch into an open state and apply a bias voltage Vn on the depletion mode n-channel device that is sufficiently high to switch off the depletion mode n-channel device and thus block the transient. The depletion mode n-channel device used in the apparatus of invention is preferably a high-voltage depletion mode device such as a high-voltage metal-oxide-semiconductor field effect transistor (MOSFET).
The normally closed relay that is particularly well-suited for the apparatus of the invention is a micro-electro-mechanical relay or MEM relay. The relay has a series resistor R1 and a parallel resistor R2, where R2>R1. Alternatively, a single shunt resistor having a certain shunt resistance Rs can be connected across the relay. The shunt resistance Rs should be selected sufficiently high to result in an acceptable current leakage through the relay. In still other embodiments or the same embodiments, the apparatus is further equipped with a protective element for protecting the depletion mode n-channel device. More specifically, when an NMOS transistor plays the role of the depletion mode n-channel device the protective element can be a Zener or an avalanche diode connected between its source and gate terminals. Alternative components that can be used as a protective element include bipolar transistors wired as diodes, MOSFETs wired as diodes and polysilicon diodes.
The apparatus can be rendered bi-directional, i.e., it can be easily adapted to block transients of either polarity. To accomplish this, an additional depletion mode n-channel device is placed at an output of the apparatus and interconnected to block a reverse transient. More precisely, the additional depletion mode n-channel device is interconnected with the normally closed relay such that at a certain reverse current value the reverse transient causes the switching of the normally closed relay into an open state, thereby producing a bias voltage Vn on additional depletion mode n-channel device that switches off the additional device and thus blocks the reverse transient. As in the previous cases, a protective element such as a diode can be used to protect the additional device.
The method of invention calls for providing a transient blocking apparatus with a depletion mode n-channel device at an input of the transient blocking apparatus. In another step, a normally closed relay is interconnected with the depletion mode n-channel device and the input in such a way, that at a certain current value the transient induces the switching of the normally closed relay to an open state. Once the relay is switched to its open state, the consequent bias voltage Vn on the depletion mode n-channel device causes the device to switch off and thus block the transient.
Preferably, the method is practiced in situations where the normally closed relay has a series resistor R1 and a parallel resistor R2, such that R2>R1. In some embodiments, a shunt resistor having a shunt resistance Rs is connected across the normally closed relay in order to minimize current leakage. In the same or other embodiments, protective elements can be connected to the depletion mode n-channel device. Also, the method can be extended to bi-directional transient blocking by providing an additional depletion mode n-channel device at an output of the transient blocking unit so that it can block a reverse transient, i.e., a transient of opposite polarity.
A detailed description of the preferred embodiments of the invention is presented below in reference to the appended drawing figures.
The present invention and its principles will be best understood by first reviewing prior art uni-directional and bi-directional transient blocking units (TBUs) designed for over-voltage and over-current protection. The diagram in
More specifically, devices 14, 16 have corresponding n- and p-channels 15, 17 as well as gate G, source S and drain D terminals. Resistances Rn, Rp of devices 14, 16 are low when voltage differences or bias voltages Vgsn and Vgsp between their gate G and source S terminals are zero. Normally, TBU 10 is unblocked and devices 14, 16 act as small resistors that allow a load current Iload to pass to load 12. Application of negative bias Vgsn to n-channel device 14 and positive bias Vgsp to p-channel device 16 increases resistances Rn, Rp, as indicated by the arrows and turns devices 14, 16 off. The interconnection of devices 14, 16 source-to-source and gate-to-drain reinforces the process of biasing both devices “off” in response to a transient. Specifically, as load current Iload increases device 16 develops a larger voltage drop across it, thus increasing negative bias Vgsn applied to device 14 and consequently increasing resistance Rn. Higher resistance Rn increases positive bias Vgsp on device 16 thereby increasing Rp. Thus, the transient alters bias voltages Vgsn and Vgsp in concert, such that devices 14, 16 mutually increase their resistances Rn, Rp and switch “off”, and thus TBU 10 blocks the transient.
The above principle of interconnection of n- and p-channel devices to achieve mutual switch-off (sometimes also referred to as mutual pinch-off) is extended to bi-directional TBUs by using two uni-directional TBUs with one configured in reverse to block negative spikes. A simpler, bi-directional TBU 20 that protects load 12 from negative and positive spikes, is shown in
In fact, the prior art teaches a number of variants of TBUs based on the above principles. These include, among other, TBUs that use p-channel devices at inputs, a larger number of n-channel or p-channel devices as well as TBUs that employ high-voltage depletion devices. More detailed information about prior art TBUs and associated applications and methods can be found in published literature including, in particular, PCT/AU94/00358; PCT/AU04/00117; PCT/AU03/00175; PCT/AU03/00848; PCT/AU03/01326 and U.S. Pat. No. 5,742,463 that are herein incorporated by reference.
A normally closed relay 106 is interconnected with MOSFET 104 and indirectly with input 102 via device 104. Specifically, relay 106 is connected directly to source S terminal of MOSFET 104 and to its gate G terminal via a diode 108. Diode 108 is preferably an avalanche diode and is provided to prevent excessive voltage spikes on gate G terminal of MOSFET 104 from causing damage or circuit malfunction.
It should be noted, that since relay 106 is interconnected with gate G and source S terminals of MOSFET 104, it is not directly exposed to the high voltages associated with transients that appear at drain D of MOSFET 104. As a result, relay 106 is preferably designed to have a low withstand voltage. This is advantageous, because low withstand voltage relays can be manufactured extremely inexpensively. In addition, because of size and performance reasons, relay 106 is preferably not an electromechanical relay, but rather a MEM relay that is activated piezo-electrically or in some other fashion, including electrostatically or magnetically. More specifically, although conventional electromechanical relays can be used in apparatus 100, their size will limit the usefulness of such apparatus. Also, conventional relays commonly use coil-based magnetic activation and the coil is wired from input to output of the relay device. Thus, the finite resistance of the coil places a cap on the maximum resistance of such relay device in the open or off-state.
Normally closed relay 106 has a series resistor 110 with a series resistance R1 and a parallel resistor 112 with a parallel resistance R2. Series resistor 110 and gate G terminal of MOSFET 104 are both connected to an output 114 of apparatus 100. The resistance values are chosen such that parallel resistance R2 is larger than series resistance R1, i.e., R2>R1. Series resistor 110 provides the voltage at gate G terminal of MOSFET 104. It is the voltage level at gate G that switches the normally “on” MOSFET 104 to its off state at a certain current level or trip current Itrip.
During operation, the interconnection of relay 106, depletion mode MOSFET 104 and input 102 ensures that at a predetermined current value a transient causes normally closed relay 106 to switch into an open state. This causes a bias voltage Vn to be applied on MOSFET 104 that is sufficiently high to switch off it off and thus block the transient. The details of this action will be best understood by referring to a graph illustrating the transition of relay 106 from closed state to open state, as shown in
For comparison purposes,
Rtot=RFET+R1, (eq. 1)
Where RFET is the resistance of MOSFET 104. Upon tripping of relay 106 into open state, the total resistance increases to:
Rtot=RFET+R2+R1. (eq. 2)
This increase in resistance is so large, that it effectively blocks the current passing through apparatus 100 to output 114. As seen from blocked range 126, the slope of I-V curve 120 in this range is very small and linear.
Due to the construction and operation parameters in accordance with the invention, transient blocking apparatus 100 has a low series resistance, low voltage drop and is sufficiently low-cost to be feasible for volume manufacture. In addition, as confirmed by I-V curve 120, apparatus 100 ensures a very reliable and repeatable trip current Itrip.
In this embodiment, relay 136 is a small MEM relay that may be activated electrostatically, piezo-electrically, magnetically or in some other fashion. In the preferred case, its manufacture is compatible with MOSFET 134. Relay 136 can consist of many parallel paths, such as individual cantilevers or similar structures that each carry a fraction of the current. A person skilled in the art will also appreciate that the use of a “redundant” relay structure with many parallel paths can result in increased manufacturing yield, decreased resistance and increased reliability, since a small number of these parallel paths that are either permanently “closed” or permanently “open” will not affect circuit operation.
In contrast to the above embodiment, relay 136 is driven by a voltage across the total circuit of apparatus 130 from input 132 to output 144 rather than the voltage drop from gate G to the output. For this reason, relay 136 is connected directly to input 132. The individual parallel paths can be designed to operate at different “speeds” to provide a stepped transition from the normally “closed” to “open” state. The purpose of stepping the transition is to moderate it so as to minimize transient effects in the circuits of load 12, which apparatus 130 is protecting.
Of course, the basic principles taught above in uni-directional apparatus can be extended to bi-directional apparatus for blocking forward and reverse transients.
In accordance with the invention, the above interconnections ensure that at certain forward current value, namely Itrip, a forward transient causes the switching of normally closed relay 160 into an open state. This action produces a bias voltage Vn between gate G and source S terminals of device 152 and thus causes it to switch off thereby blocking the forward transient. At a certain reverse current value, which in this embodiment happens to be equal to the forward current value, namely Itrip, a reverse transient causes the switching of normally closed relay 166 into an open state. This causes a bias voltage Vn to be applied between gate G and source S terminals of additional device 156. The bias causes additional device 156 to switch off and thus block the reverse transient.
A person skilled in the art will recognize that bi-directional apparatus 150 can be symmetric in the sense that Itrip is the same for forward and reverse currents or non-symmetric, depending on application. Additionally, although both relays 160, 166 in this embodiment are of the MEM type, regular relays can be employed as well. Moreover, relays 160, 166 used in bi-directional apparatus 150 do not have to be connected directly to input 154 and output 158. Instead, in an alternative embodiment they could be connected to source S terminals of devices 152, 154, respectively so as to not expose them to the full rated voltage. Irrespective of the interconnection of relays 160, 166, it is preferable that both devices 152, 154 be high-voltage MOSFETs.
Apparatus 180 employs a series resistor 192 and a parallel resistor 194 for controlling the switch-off characteristics of relay 182 in the manner described above. Two avalanche diodes 196, 198 are used to protect against excessive voltage spikes and damage. Further, in order to adapt single relay 182 for bi-directional operation, additional diodes 200, 202 and resistors 204, 206 are employed to establish both the voltage and its polarity at the control terminal of relay 182. It should be noted that irrespective of whether the control is piezo-electric, electrostatic or magnetic, relay 182 be operated by current of either polarity.
Under some circumstances, since source S terminal of MOSFET 214 is connected to gate G terminal of MOSFET 216, the circuit may experience failures due to biasing conditions of MOSFET 214 in forward operation, or due to biasing conditions of MOSFET 216 in reverse operation. For this reason,
In the present embodiment protective elements 232, 234 are diodes connected across gate G and source S terminals of MOSFET 214 and MOSFET 216. Under normal operating conditions, when no transients are present, relay 212 at input 218 is closed (on state) and diode 232 is forward biased. This maintains MOSFET 214 in the on state. Meanwhile, diode 234 at output 220 is reverse biased, which protects gate G of MOSFET 216.
When a forward transient occurs, the rising voltage (dV/dt) at input 218 couples to the control terminal of relay 212 and causes it to open (off state). Now, as the voltage across relay 212 rises, the bias voltage applied on MOSFET 214 will become more negative, which switches MOSFET 214 off. Because of to diode 232, the maximum bias voltage applied to MOSFET 214 is limited. As gate G potential drops, source S bias is maintained at a low potential through forward biased diode 234 at output 220. The same situation occurs in reverse in the case of a reverse transient. It is preferred that diodes 232, 234 be avalanche or Zener diodes, in order to limit the bias voltage even as breakdown voltage is reached. Zener type diodes should be used with NMOS devices that have relatively thin gate oxides and bias voltages in the 5 V or smaller range. Avalanche diodes should be employed for devices with thicker gate oxides. As will be appreciated by those skilled in the art, other components can be used to fulfill the protective function for n-channel devices. Some example alternatives include bipolar transistors wired as diodes, MOSFETs wired as diodes and polysilicon diodes.
Still another way to help with biasing of source S terminals of depletion mode n-channel devices used in transient blocking apparatus according to the invention involves a shunt resistor.
Among the many advantages of the method and apparatus of invention is the feasibility of the circuit design and its compatibility with volume manufacturing. In fact, depending on the style of NMOS transistors used and the voltage rating of the apparatus all of the elements, with possible exception of the relay, can be integrated in one die. The layout can be done such that the relay can be easily connected, and coupling elements for the switch may be included in the die as well.
A system employing any apparatus in accordance to the invention can be applied to protect load 12 from transients. In particular, the apparatus of invention, both in its uni-directional and bi-directional embodiments has the requisite protection characteristic to be used with sensitive load 12. For example, load 12 can be a telephonic circuit, an opto-electronic circuit or any high-fidelity circuit in general. A person skilled in the art will be able to determine the protection parameters and further adapt the apparatus of invention to any particular system that requires highly reliable and robust transient protection.
Furthermore, while MEM relays that are controlled piezo-electrically, electrostatically or magnetically are called out explicitly, other control techniques that cause the relay to open mechanically may also be employed. In addition, even though depletion mode NMOS FETs are mentioned explicitly, the devices can include any normally on solid state device that can be switched off and is capable of withstanding the maximum transient voltages.
Many other embodiments of the apparatus and method are possible. Therefore, the scope of the invention should be judged by the appended claims and their legal equivalents.
The present application claims priority from provisional U.S. application 60/675,075 that was filed on 25 Apr. 2005 and is herein incorporated in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 60675075 | Apr 2005 | US |
