Patent Application
20060174177
As integrated circuits continue to reach higher levels of performance through shrinking feature sizes, greater integration and higher clock frequencies, manufacturers of integrated circuit testing devices have struggled to improve tester performance while also scaling the cost of the improved testers with the technology. For example, digital integrated circuit testing devices provide hundreds or even thousands of digital test contacts or pins, each providing either clock signals, binary stimulus or capture of binary data to test multiple devices under test (DUTs) in parallel. The testing device also usually includes a DUT interface board that provides the interface between the test electronics and the DUTs. The DUT interface board typically contains thousands of precisely arranged, miniature spring contacts to make the electrical connections with the DUTs. Thus, digital integrated circuit testing devices are traditionally both expensive and complicated.
Mixed-signal integrated circuit testing devices have the additional burdens of providing analog signal stimulus and capturing analog response signals. For example, when testing an analog-to-digital converter (ADC), the test signal is commonly generated by a digital-to-analog converter (DAC) on the testing device, and the digital output of the ADC is captured by the testing device. Likewise, when testing a DAC, the test signal is a digital stream produced by the testing device, and the output of the DAC is an analog signal that is captured by a high-speed ADC on the testing device.
However, the ADC and DAC resources necessary for generation of analog test signals and acquisition of analog output signals add substantial cost to the testing device and consumes expensive “real estate” on the testing device. Mixed-signal resources (i.e., ADCs and DACs) require more space than an equivalent number of digital resources. Thus, the throughput of the testing device is limited by the space available for, and cost of, the mixed-signal resources. In addition, as the density and number of electrical connections increases, the propagation of signals to and from the DUT becomes increasingly problematic.
Therefore, what is needed is a simpler, lower-cost, higher-density, mixed-signal integrated circuit testing device.
Embodiments of the present invention provide an apparatus for testing an integrated circuit device under test (DUT) that avoids the need for DACs or high-speed ADCs. The apparatus includes test electronics for generating a test signal for input to the DUT and receiving a response signal from the DUT. The apparatus further includes an interface connected between the test electronics and the DUT. The interface includes at least one microelectromechanical system (MEMS) filter for filtering an analog signal associated with one of the test signal and the response signal.
In one embodiment, to test ADCs on the DUT, the apparatus further includes a signal generator for generating a signal. The MEMS filter filters the signal to produce a filtered signal at the fundamental frequency of the signal. For example, in one exemplary embodiment, the signal generator is a clock generator that produces a clock signal.
In another embodiment, to test DACs on the DUT, the analog signal is the output of the DAC, and the MEMS filter is operable to isolate one or more frequency components of the analog signal to produce a filtered signal. A signal measurement device samples the filtered signal to obtain a measurement of the DAC.
Advantageously, embodiments of the present invention provide a simpler, lower-cost, higher-density, mixed-signal integrated circuit testing device by utilizing MEMS filters to replace DACs and high-speed ADCs. Furthermore, the invention provides embodiments with other features and advantages in addition to or in lieu of those discussed above. Many of these features and advantages are apparent from the description below with reference to the following drawings.
The disclosed invention will be described with reference to the accompanying drawings, which show important sample embodiments of the invention and which are incorporated in the specification hereof by reference, wherein:
The power supply 110 is shown connected to supply power to each of the components 120, 130, 140 and 150 of the testing device 10. However, it should be understood that in other embodiments, separate power supplies can be used supply power to one or more of the components 120, 130, 140 and 150 of the testing device 10. The timing system 120 provides a timing signal to each of the components 130, 140 and 150 of the testing device 10 to synchronize connections made to the DUT 50 and measurements performed by the testing device 10.
The test controller 130 is operable to control the test electronics 140 and the DUT interface 150. For example, in one embodiment, based on input received by the test controller 130, the test controller 130 causes the DUT interface 150 to make one or more connections between contacts on the DUT interface 150 and device terminals on the DUT 50. In addition, the test controller 130 causes the test electronics 140 to apply one or more predetermined test signals to the DUT 50 through the DUT interface 150 connections, and causes the test electronics 140 to compare resulting output signals from the DUT 50 with respective expected values to determine whether the DUT 50 is acceptable or not.
In accordance with embodiments of the present invention, to test an integrated circuit that includes both digital and analog circuit devices, the test electronics 140 is capable of generating a test analog signal and capturing an output analog signal without requiring bulky or expensive DACs or high-speed ADCs. The generation and capture of analog signals is accomplished using narrow bandpass (high-Quality factor (high-Q)) Micro Electro-Mechanical Systems (MEMS) filters 160 on the DUT interface 150. MEMS filters 160 use the natural vibrational frequency of micro-resonantors to transmit precise frequencies, while attenuating noise and other signals at other frequencies. The MEMS filters 160 can be fabricated directly on the DUT interface 150 or mounted onto the DUT interface 150.
The relative size of a MEMS filters 160 is significantly smaller than a conventional passive filter constructed from inductors and capacitors. Therefore, using MEMS filters 160 instead of conventional passive filters not only saves space on the DUT interface 150, but also allows more MEMS filters 160 than conventional filters to be placed on the DUT interface 150, thereby improving test throughput and lowering the cost per test. In addition, the incorporation of high-Q MEMS filters 160 into the DUT interface 150 enables the realization of mixed-signal test functionality while simplifying the mixed-signal hardware by eliminating the need for DACs and reducing the ADC bandwidth or eliminating ADCs altogether. Thus, using MEMS filters 160 on the DUT interface 150 reduces the cost and complexity of the testing device 10.
An example of a MEMS filter 160 is shown in
The MEMS filter 160 can be fabricated by standard integrated circuit manufacturing processes, such as the one shown in the cross-sectional view of
In operation, an alternating electrical signal at a frequency near the resonant frequency of the disk resonator 600 applied between the input electrodes 610 and 620 causes the disk resonator 600 to vibrate at the frequency of the applied alternating electrical signal. The vibration is only significant at or near the resonant frequency.
Vibration of disk 600 induces a voltage between the output electrodes 630 and 640. The mechanical resonance resulting from vibration of disk 100 has a very high-Q, so that the MEMS filter 160 operates to pass electrical signals at the resonant frequency and attenuate any other undesired frequencies. It should be understood that the particular structure of the MEMS filter 160 shown in
To isolate the desired intermodulation signals, the analog output signal 310 is passed through one or more MEMS filters 160a, 160b . . . 160N. Each MEMS filter 160a, 160b . . . 160N has a particular resonant frequency determined at the time of manufacture of the MEMS filter. Thus, in one embodiment, the particular MEMS filters 160a, 160b . . . 160N that receive the analog output signal 310 are the MEMS filters 160a, 160b . . . 160N whose resonant frequencies are equal to one of the desired intermodulation signal frequencies. In another embodiment, the frequency content of the digital signal 300 is selected to produce intermodulation signal frequencies at the known resonant frequencies of particular MEMS filters 160a, 160b . . . 160N. Thus, the frequency content of the digital signal 300 input to the DAC 60 can be adjusted for optimum operation with the selected MEMS filters 160a, 160b . . . 160N. As a result, a less expensive MEMS filter 160 with a less-precisely defined resonant frequency can be used in embodiments of the present invention.
Each MEMS filter 160a, 160b . . . 160N blocks any signal components outside of the narrow passband of the MEMS filter 160a, 160b . . . 160N to produce respective filtered signals 320a, 320b . . . 320N. The resulting filtered signals 320a, 320b . . . 320N are sampled by respective signal measurement devices (SMDs) 260a, 260b . . . 260N. For example, in one embodiment, the SMDs 260a, 260b . . . 260N are ADCs that sample the resulting filtered signals 320a, 320b . . . 320N at a frequency lower than the respective Nyquist frequencies of the filtered signals 320a, 320b . . . 320N. In other embodiments, a level comparator, peak detection device or other type of SMD 260 could be used to detect a particular intermodulation signal, instead of an ADC.
In one embodiment, the impure analog signal 400 is generated by a simple, inexpensive analog oscillator. In other embodiments, the impure analog signal 400 is a digital signal, such as a clock signal. For example, the impure analog signal generator 240 can be a clock generator that produces the clock signal.
The MEMS filter 160 attenuates harmonics and other undesirable signal components from the impure analog signal 400, resulting in an analog test signal 410 having a sinusoidal waveform of high purity. For example, a clock signal 400 typically resembles a square wave made up of a fundamental frequency and harmonic frequencies. The MEMS filter 160 operates to filter the harmonic frequencies to produce the analog test signal 410 with a sinusoidal waveform at the fundamental frequency of the clock signal used as the impure analog signal 400. The analog test signal 410 is input to the analog terminal of the ADC 70 from the DUT interface 150. The analog test signal 410 causes the ADC 70 to produce a digital output signal 420. The digital output signal 420 passes via the DUT interface 150 and the digital I/O device 220 to the test electronics 140.
Referring now to
In one embodiment, to test the DAC 60, a digital signal generator 210 generates a digital signal 225 that is input to the digital input terminal of the DAC 60 through the digital I/O device 220 and the DUT interface 150. The digital signal 225 causes the DAC 60 to produce an analog output signal 232 that includes sinusoidal waveforms. The analog output signal 232 is measured by a signal measurement device 260 (e.g., an ADC, level comparator, peak detection device or other type of signal measurement device) within the test electronics 140 via the DUT interface 150 and the analog I/O device 250.
In accordance with embodiments of the present invention, instead of utilizing a high-speed ADC that samples at or beyond the Nyquist frequency of the analog output signal 232 to capture the broadband analog response of the DAC 60, the signal measurement device 260 can be a low-speed ADC that samples at a frequency lower than the Nyquist frequency. To accomplish this, the analog output 232 of the DAC 60 is passed through one or more high-Q MEMS filters 160a within the DUT interface 150. Each filter rejects any signal components outside of the narrow passband of the MEMS filter 160a. Each resulting filtered signal 235 is then characterized by sampling the filtered signal 235 at a frequency that is lower than the Nyquist frequency of the analog output signal 232, thus greatly reducing the bandwidth requirements of the ADC.
In embodiments in which the signal measurement device 260 is an ADC, the filtered analog signal 235 is converted into a digital signal 238 by the ADC 260, which is input to a comparator 230 within the test electronics 140. In one embodiment, the comparator 230 is embodied as an electronic circuit for performing the comparison. However, it should be understood that in other embodiments, the comparator 230 can be algorithm or other combination of hardware, software and/or firmware configured to perform the comparison. The comparator 230 compares the digital signal 238 with an expected digital signal to obtain a measurement of the DAC 60. The output of the comparator 230 is used by the test controller 130 (shown in
In another embodiment, to test the ADC 70, an impure analog signal generator 240 within the test electronics 140 generates an impure analog signal 255 that is passed via the analog I/O device to a high-Q MEMS filter 160b within the DUT interface 150. The high-Q MEMS filter 160b filters the impure analog signal 255 to produce the analog test signal 258. In other embodiments, the impure analog signal generator 240 may be located on the DUT interface 150 itself. For example, in one embodiment, the impure analog signal generator 240 is a clock generator that produces a clock signal as the impure analog signal 255. The MEMS filter 160b is selected to attenuate harmonics and other undesirable signal components from the clock signal when used as the impure analog signal 255. The analog test signal 258 is input to the analog input terminal of the ADC 70 from the DUT interface 150.
The analog test signal 258 causes the ADC 70 to produce a digital output signal 265. The digital output signal 265 passes via the DUT interface 150 and the digital I/O device 220 to the comparator 230 within the test electronics 140. The comparator 230 compares the digital output signal 265 with an expected digital signal to obtain a measurement of the ADC 70. The output of the comparator 230 is used by the test controller 130 (shown in
The innovative concepts described in the present application can be modified and varied over a wide rage of applications. Accordingly, the scope of patents subject matter should not be limited to any of the specific exemplary teachings discussed, but is instead defined by the following claims.
